`timescale 1ns / 1ps `include "./../../gen_version/hdl_verilog/version.vh" //@project:partial_postfix_name ProcBd module pro_registers( //------------------------------------------------------------------- //用户寄存器接口 //------------------------------------------------------------------- //此处自动追加用户寄存器定义 //@INSERT_PORT_FLAG output reg [0 : 0] average_enable , output reg [0 : 0] average_ram_reset , output reg [7 : 0] average_number , output reg [15 : 0] average_addr_init , output reg [15 : 0] average_addr_region , output reg [15 : 0] average_addr_over_dly_num, output reg [9 : 0] awg_addr_ctrl , output reg [15 : 0] awg_data_in , output reg [1 : 0] awg_wr_ctrl , input wire [15 : 0] data_awg_rd , output reg [4 : 0] dbi_module_en , output reg [1 : 0] pro_factor_sel , output reg [15 : 0] pro_factor_wa , output reg [1 : 0] pro_factor_wd_high , output reg [15 : 0] pro_factor_wd_low , output reg [0 : 0] pro_factor_wen , output reg [11 : 0] dbi_mult_factor_wa , output reg [0 : 0] dbi_mult_factor_wd_high , output reg [15 : 0] dbi_mult_factor_wd_low , output reg [0 : 0] dbi_mult_factor_wen , output reg [0 : 0] dbi_mult_inter_en , output reg [15 : 0] dbi_mult_interp_mul , output reg [0 : 0] dbi_mult_reset_dsp , output reg [5 : 0] debug_num , output reg [15 : 0] dbi_inter_comp_zero , output reg [7 : 0] dbi_factor_select_pro , output reg [0 : 0] dma_rst_pro , output reg [0 : 0] channel_en , output reg [7 : 0] rst_dcm_control , output reg [0 : 0] data_tx_clk_reset , output reg [0 : 0] data_tx_io_reset , output reg [15 : 0] pro_select_acq_channel , output reg [2 : 0] pro_linkdemux_select , output reg [2 : 0] pro_linkmux_select , output reg [0 : 0] fifo_ram_sel , output reg [15 : 0] user_data_h , output reg [15 : 0] user_data_l , output reg [0 : 0] user_data_valid_h , output reg [0 : 0] user_data_valid_l , output reg [3 : 0] user_data_addr_h , output reg [3 : 0] user_data_addr_l , output reg [15 : 0] protocol_source_ch_sel_b1_l, output reg [15 : 0] protocol_source_ch_sel_b1_m, output reg [3 : 0] protocol_source_ch_sel_b1_h, output reg [15 : 0] protocol_source_ch_sel_b2_l, output reg [15 : 0] protocol_source_ch_sel_b2_m, output reg [3 : 0] protocol_source_ch_sel_b2_h, output reg [4 : 0] protocol_type_b1 , output reg [4 : 0] protocol_type_b2 , output reg [0 : 0] protocol_rst , output reg [4 : 0] protocol_type , output reg [15 : 0] trig_ctrl_word0 , output reg [15 : 0] trig_ctrl_word1 , output reg [15 : 0] trig_ctrl_word2 , output reg [0 : 0] decode_rst , output reg [0 : 0] dsp_set_b1 , output reg [0 : 0] dsp_set_b2 , output reg [11 : 0] decode_ram_predepth , output reg [0 : 0] dsp_wrram_en , output reg [0 : 0] dsp_rdram_en , output reg [4 : 0] trig_type_sel , input wire [0 : 0] ram1_data_flag , input wire [0 : 0] ram2_data_flag , output reg [0 : 0] dpo_digital_trig_en , output reg [0 : 0] dpo_din_test_control , output reg [1 : 0] dpo_en , output reg [3 : 0] dpo_decimation , input wire [7 : 0] dpo_cnt_screen , input wire [7 : 0] dpo_map_dmax , output reg [0 : 0] dpo_channel_mode , output reg [15 : 0] dpo_map_fifo_depth , output reg [15 : 0] dpo_measure_fifo_depth , output reg [0 : 0] dpo_pro_reset , output reg [0 : 0] dpo_parallel_en , output reg [0 : 0] dpx_ram_test_d_ctrl , input wire [6 : 0] dpo_state , output reg [0 : 0] dpo_time_over , output reg [15 : 0] dpo_cnt_screen_max , output reg [15 : 0] dpo_test_ctrl , output reg [15 : 0] pro_pingpong_cnt_thresh , input wire [7 : 0] pro_config_flash_readdata, output reg [0 : 0] pro_config_flash_readstart, output reg [7 : 0] pro_config_flash_spiclock_div, output reg [0 : 0] pro_config_flash_ss , output reg [7 : 0] pro_config_flash_writedata, output reg [0 : 0] pro_config_flash_writestart, input wire [0 : 0] pro_dclk_locked , input wire [0 : 0] crystal_clk_locked , output reg [1 : 0] afc_factor_ch_sel , output reg [15 : 0] afc_factor_wa , output reg [15 : 0] afc_factor_wd_l , output reg [15 : 0] afc_factor_wd_h , output reg [0 : 0] afc_factor_wen , output reg [15 : 0] interp_factor_wa , output reg [15 : 0] interp_factor_wd_l , output reg [15 : 0] interp_factor_wd_h , output reg [0 : 0] interp_factor_wen , output reg [0 : 0] pro_afc_en , output reg [0 : 0] pro_interp_en , output reg [0 : 0] dsp_fifo_start , input wire [15 : 0] prog_fifo_full_all , output reg [15 : 0] pro_fifo_depth , output reg [15 : 0] parallel_fifo_threshold , input wire [15 : 0] soft_fifo_data_count_h12 , input wire [15 : 0] soft_fifo_data_count_l16 , input wire [15 : 0] pro_async_fifo_full_flag , input wire [15 : 0] pro_regul_fifo_full_flag , output reg [15 : 0] inverter_en , output reg [15 : 0] clk_source_select , output reg [15 : 0] v7_ad5668_ctrl_data_high , output reg [15 : 0] v7_ad5668_ctrl_data_low , output reg [15 : 0] v7_ad5668start , output reg [15 : 0] la_decimation_h16 , output reg [15 : 0] la_decimation_l16 , output reg [15 : 0] la_decimation_m16 , output reg [15 : 0] la_prog_full_thresh_high , output reg [15 : 0] la_prog_full_thresh_low , output reg [0 : 0] la_gtx_rdy , output reg [0 : 0] la_gtx_reset , output reg [7 : 0] la_sample_mode , output reg [0 : 0] la_ddr_en , output reg [2 : 0] v7_la_en , output reg [0 : 0] la_soft_reset , output reg [1 : 0] la_trig_edge_sel , input wire [15 : 0] la_triglocal_lock , output reg [15 : 0] la_trig_num , output reg [0 : 0] pc_ddr3_ui_rst_n_la , output reg [0 : 0] pc_ddr3_fifo_wen , output reg [15 : 0] pc_wr_addr_segment_h , output reg [15 : 0] pc_wr_addr_segment_l , output reg [15 : 0] pc_wr_ctrl_depth_h , output reg [15 : 0] pc_wr_ctrl_depth_l , output reg [15 : 0] pc_wr_pre_septh_h , output reg [15 : 0] pc_wr_pre_septh_l , output reg [0 : 0] pc_ddr3_ren_la , output reg [15 : 0] pc_rd_length_h , output reg [15 : 0] pc_rd_length_l , output reg [15 : 0] pc_rd_begin_addr_h , output reg [15 : 0] pc_rd_begin_addr_l , output reg [15 : 0] pc_rd_segment_begin_addr_h, output reg [15 : 0] pc_rd_segment_begin_addr_l, output reg [15 : 0] pc_rd_ctrl_depth_h , output reg [15 : 0] pc_rd_ctrl_depth_l , input wire [0 : 0] init_calib_complete_la , input wire [0 : 0] ddr3_state_2pc_la , input wire [0 : 0] wr_stop_flag_2pc_la , input wire [0 : 0] rd_stop_flag_2pc_la , input wire [15 : 0] ddr3_trig_addr_h_2pc_la , input wire [15 : 0] ddr3_trig_addr_l_2pc_la , input wire [0 : 0] ddr3_pos_trig_flag_2pc_la, output reg [0 : 0] pc_mig_sys_rst_n , output reg [15 : 0] la_ddr3_pk_decimation , output reg [15 : 0] la_ddr3_pk_mode , output reg [0 : 0] la_gtrxcdrhold , output reg [7 : 0] soft_normal_discard_num , output reg [8 : 0] inter_multiple , output reg [2 : 0] normal_interpolation_set , output reg [15 : 0] trig_module_la_trig_predepth_set_h16, output reg [15 : 0] trig_module_la_trig_predepth_set_l16, output reg [15 : 0] trig_module_la_trig_predepth_set_m16, output reg [0 : 0] la_post_inter_en , output reg [15 : 0] pc_wr_pos_depth_h , output reg [15 : 0] pc_wr_pos_depth_l , output reg [15 : 0] pc_fine_h16 , output reg [15 : 0] pc_fine_l16 , output reg [7 : 0] ddr_fast_trans_ch_sel , output reg [0 : 0] fast_en , output reg [0 : 0] pc_ddr_pro_fast_trans_en , output reg [13 : 0] pro_data_fd_fifo_empty_thresh, output reg [13 : 0] pro_data_fd_fifo_full_thresh, output reg [7 : 0] md8g_pro_data_choose , output reg [15 : 0] coefficient_datain_h16 , output reg [15 : 0] coefficient_datain_l16 , output reg [0 : 0] coefficient_data_wren , output reg [0 : 0] fft_config_start , output reg [0 : 0] fft_param_dir , output reg [4 : 0] fft_param_nfft , output reg [13 : 0] fft_param_pointnum , output reg [15 : 0] fft_param_scalesch , output reg [7 : 0] fft_times , output reg [0 : 0] stft_calc_start , output reg [3 : 0] stft_data_select , output reg [13 : 0] stft_step , output reg [7 : 0] acqboardpowerctrl , output reg [0 : 0] scan_datacount_latch , output reg [14 : 0] scan_datacount_passback , input wire [13 : 0] scan_datacount_uploading , output reg [0 : 0] pro_scan_enable , input wire [3 : 0] pro_iserdes_pll_locked , output reg [7 : 0] pro_iserdes_scan_length , input wire [14 : 0] pro_iserdes_sync_done , output reg [0 : 0] pro_iserdes_sync_en , output reg [4 : 0] pro_iserdes_tap_start , output reg [4 : 0] pro_iserdes_tap_stop , output reg [0 : 0] pro_in_delay_data_ce1 , output reg [0 : 0] pro_in_delay_data_ce3 , output reg [0 : 0] pro_in_delay_data_ce5 , output reg [0 : 0] pro_in_delay_data_ce7 , output reg [4 : 0] pro_cntvaluein1 , output reg [4 : 0] pro_cntvaluein3 , output reg [4 : 0] pro_cntvaluein5 , output reg [4 : 0] pro_cntvaluein7 , output reg [0 : 0] pro_data_rx_io_reset , output reg [0 : 0] pro_in_delay_reset , input wire [12 : 0] pro_fpga_temp , input wire [12 : 0] pro_fpga_vccaux , input wire [12 : 0] pro_fpga_vccbram , input wire [12 : 0] pro_fpga_vccint , output reg [0 : 0] pro_sysmon_rst , output reg [15 : 0] trig_module_trig_auto_en , output reg [7 : 0] trig_module_trig_cali_value, output reg [0 : 0] trig_module_cali_trig_delay_en, output reg [0 : 0] trig_module_tri_force , output reg [15 : 0] trig_module_tri_holdoff_time_h16, output reg [15 : 0] trig_module_tri_holdoff_time_l16, input wire [0 : 0] trig_module_triggertimeover, output reg [15 : 0] trig_module_trig_posdepth_set_h16, output reg [15 : 0] trig_module_trig_posdepth_set_l16, output reg [15 : 0] trig_module_trig_posdepth_set_m16, output reg [15 : 0] trig_module_trig_predepth_set_h16, output reg [15 : 0] trig_module_trig_predepth_set_l16, output reg [15 : 0] trig_module_trig_predepth_set_m16, output reg [0 : 0] trig_module_trig_reset_n , output reg [4 : 0] trig_1st_source_sel , input wire [2 : 0] trig_module_triggerstatus, output reg [15 : 0] trig_ext_setting , output reg [15 : 0] trig_1st_auto_fast_setting, output reg [0 : 0] reg_ch_offset_adjust_en , output reg [15 : 0] trig_module_trig_predepth_set1_h16, output reg [15 : 0] trig_module_trig_predepth_set1_l16, output reg [15 : 0] trig_module_trig_predepth_set1_m16, output reg [15 : 0] trig_module_trig_predepth_set2_h16, output reg [15 : 0] trig_module_trig_predepth_set2_l16, output reg [15 : 0] trig_module_trig_predepth_set2_m16, output reg [15 : 0] trig_module_trig_predepth_set3_h16, output reg [15 : 0] trig_module_trig_predepth_set3_l16, output reg [15 : 0] trig_module_trig_predepth_set3_m16, input wire [15 : 0] trig_period_read_h , input wire [15 : 0] trig_period_read_l , input wire [7 : 0] trig_1st_data_para_reg_acq1, input wire [7 : 0] trig_1st_data_para_reg_acq2, input wire [7 : 0] trig_1st_data_para_reg_acq3, input wire [7 : 0] trig_1st_data_para_reg_acq4, output reg [0 : 0] trig_2nd_auto_trig_en , output reg [11 : 0] trig_2nd_cmp1_level_l , output reg [11 : 0] trig_2nd_cmp1_level_h , output reg [11 : 0] trig_2nd_cmp2_level_l , output reg [11 : 0] trig_2nd_cmp2_level_h , output reg [15 : 0] trig_2nd_edge_trig_edge_sel, output reg [15 : 0] trig_2nd_pretrig_depth , input wire [6 : 0] trig_2nd_edge_trig_location, output reg [15 : 0] trig_2nd_auto_trig_num , output reg [3 : 0] trig_2nd_serial_trig_en , output reg [2 : 0] trig_2nd_trig_source_sel , output reg [15 : 0] trig_2nd_trig_type_sel , output reg [0 : 0] trig_2nd_search_en , input wire [15 : 0] trig_2nd_search_cnt , output reg [0 : 0] trig_2nd_ac_dc_setting , output reg [2 : 0] trig_com_trig_event_a_source_sel, output reg [2 : 0] trig_com_trig_event_b_source_sel, output reg [3 : 0] trig_com_trig_cascade_eventa_source, output reg [3 : 0] trig_com_trig_cascade_eventb_source, output reg [0 : 0] trig_com_trig_cascaded_en, output reg [3 : 0] trig_com_trig_cascade_eventa_type, output reg [3 : 0] trig_com_trig_cascade_eventb_type, output reg [15 : 0] trig_com_trig_cascade_delaya_set, output reg [15 : 0] trig_com_trig_cascade_delayb_set, output reg [2 : 0] trig_com_code_trig_ctrl_word0, output reg [15 : 0] trig_com_code_trig_ctrl_word1, output reg [3 : 0] trig_com_code_code_width_func, output reg [0 : 0] trig_2nd_trig_dropout_func, output reg [0 : 0] trig_2nd_trig_dropout_polarity_sel, output reg [0 : 0] trig_com_trig_ete_capture_polar, output reg [0 : 0] trig_com_trig_ete_event , output reg [0 : 0] trig_com_trig_ete_launch_polar, output reg [15 : 0] trig_2nd_serial_prog_full_thresh, output reg [0 : 0] trig_2nd_gli_func_sel , output reg [1 : 0] trig_2nd_trig_interval_func, output reg [0 : 0] trig_2nd_trig_interval_polarity_sel, output reg [15 : 0] trig_pro_loca_sync_set , output reg [15 : 0] trig_pro_loca_sync_set_ext, input wire [15 : 0] trig_pro_loca_sync_result, input wire [15 : 0] trig_pro_loca_sync_result_ext, output reg [0 : 0] trig_pro_local_sync_io_rst, output reg [15 : 0] trig_pro_local_sync_delay_inc, output reg [15 : 0] trig_pro_local_sync_delay_ce, output reg [15 : 0] trig_pro_local_sync_delay_vtc, output reg [15 : 0] dbi_pro_trig_discard , output reg [0 : 0] trig_1st_test_mode_pro_en, output reg [15 : 0] trig_1st_test_mode_acq_num, output reg [1 : 0] trig_2nd_trig_pw_func_sel, output reg [1 : 0] trig_2nd_trig_pw_polarity_sel, output reg [2 : 0] trig_2nd_runt_func_sel , output reg [1 : 0] trig_com_setup_hold_ctrl_word, output reg [2 : 0] trig_com_trig_slope_func_sel, output reg [14 : 0] trig_com_state_trig_ctrl_word, output reg [0 : 0] trig_2nd_trig_timeout_func, output reg [10 : 0] trig_com_trig_video_custom_horizontal, output reg [2 : 0] trig_com_trig_video_mode , output reg [10 : 0] trig_com_trig_video_sync_number, output reg [2 : 0] trig_video_tri_mode , output reg [0 : 0] trig_2nd_trig_ete_event , output reg [15 : 0] trig_2nd_configure_data2_set_2, output reg [15 : 0] trig_2nd_configure_data2_set_0, output reg [15 : 0] trig_2nd_configure_data2_set_1, output reg [15 : 0] trig_2nd_configure_data1_set_2, output reg [15 : 0] trig_2nd_configure_data1_set_0, output reg [15 : 0] trig_2nd_configure_data1_set_1, output reg [2 : 0] trig_2nd_trig_window_func_sel, output reg [15 : 0] window_width_l , output reg [15 : 0] window_width_h , output reg [0 : 0] trigger_sync_signal_switch_pro, output reg [0 : 0] trigger_sync_start_search_pro, input wire [7 : 0] trigger_sync_sync_flag_trig, input wire [9 : 0] dbi_frequency_index , output reg [15 : 0] dbi_pro_auto_trig_num , output reg [15 : 0] trig_2nd_pretrig_depth_interp, output reg [13 : 0] pro_fifo_depth_dbi_in , input wire [15 : 0] dbi_max_amplitude_l16 , input wire [7 : 0] dbi_max_amplitude_h8 , output reg [15 : 0] iir_badpoint_set , output reg [15 : 0] dbi_ch_offset_adjust_ch12, output reg [15 : 0] dbi_ch_offset_adjust_ch34, output reg [0 : 0] sel_trig_or_pro_prog_full, output reg [15 : 0] pro_debug_mode , input wire [15 : 0] status_of_clock , output reg [15 : 0] ext_10m_sel , output reg [15 : 0] sys_resetproacq , output reg [15 : 0] la_trig_2nd_pretrig_depth, output reg [15 : 0] pro_reverse_wr_reg_0 , output reg [15 : 0] pro_reverse_wr_reg_1 , input wire [15 : 0] pro_reverse_rd_reg_0 , input wire [15 : 0] pro_reverse_rd_reg_1 , output reg [0 : 0] trig_location_scan_rst , output reg [0 : 0] trig_location_scan_switch_pro, output reg [15 : 0] sync_trig_locat_acq1 , output reg [15 : 0] sync_trig_locat_tap_start_acq1, output reg [15 : 0] sync_trig_locat_tap_stop_acq1, input wire [1 : 0] sync_trig_locat_flag_acq1, output reg [15 : 0] sync_trig_locat_acq2 , output reg [15 : 0] sync_trig_locat_tap_start_acq2, output reg [15 : 0] sync_trig_locat_tap_stop_acq2, input wire [1 : 0] sync_trig_locat_flag_acq2, output reg [15 : 0] sync_trig_locat_acq3 , output reg [15 : 0] sync_trig_locat_tap_start_acq3, output reg [15 : 0] sync_trig_locat_tap_stop_acq3, input wire [1 : 0] sync_trig_locat_flag_acq3, output reg [15 : 0] sync_trig_locat_acq4 , output reg [15 : 0] sync_trig_locat_tap_start_acq4, output reg [15 : 0] sync_trig_locat_tap_stop_acq4, input wire [1 : 0] sync_trig_locat_flag_acq4, output reg [0 : 0] fifo_ctrl_scan_rst , output reg [0 : 0] fifo_ctrl_scan_switch_pro, input wire [15 : 0] sync_flash_scan_status_pro, output reg [15 : 0] sync_trig_acq1 , output reg [15 : 0] sync_trig_tap_start_acq1 , output reg [15 : 0] sync_trig_tap_stop_acq1 , input wire [1 : 0] sync_trig_flag_acq1 , output reg [15 : 0] sync_trig_acq2 , output reg [15 : 0] sync_trig_tap_start_acq2 , output reg [15 : 0] sync_trig_tap_stop_acq2 , input wire [1 : 0] sync_trig_flag_acq2 , output reg [15 : 0] sync_trig_acq3 , output reg [15 : 0] sync_trig_tap_start_acq3 , output reg [15 : 0] sync_trig_tap_stop_acq3 , input wire [1 : 0] sync_trig_flag_acq3 , output reg [15 : 0] sync_trig_acq4 , output reg [15 : 0] sync_trig_tap_start_acq4 , output reg [15 : 0] sync_trig_tap_stop_acq4 , input wire [1 : 0] sync_trig_flag_acq4 , input wire [15 : 0] sync_trig_tap_read_acq1 , input wire [15 : 0] sync_trig_tap_read_acq2 , input wire [15 : 0] sync_trig_tap_read_acq3 , input wire [15 : 0] sync_trig_tap_read_acq4 , input wire [15 : 0] sync_trig_locat_tap_read_acq1, input wire [15 : 0] sync_trig_locat_tap_read_acq2, input wire [15 : 0] sync_trig_locat_tap_read_acq3, input wire [15 : 0] sync_trig_locat_tap_read_acq4, output reg [15 : 0] sync_trig_tap_load_set_acq1, output reg [15 : 0] sync_trig_tap_load_set_acq2, output reg [15 : 0] sync_trig_tap_load_set_acq3, output reg [15 : 0] sync_trig_tap_load_set_acq4, output reg [15 : 0] sync_trig_locat_tap_load_set_acq1, output reg [15 : 0] sync_trig_locat_tap_load_set_acq2, output reg [15 : 0] sync_trig_locat_tap_load_set_acq3, output reg [15 : 0] sync_trig_locat_tap_load_set_acq4, input wire [15 : 0] sync_trig_tap_read_acq5 , input wire [15 : 0] sync_trig_tap_read_acq6 , input wire [15 : 0] sync_trig_tap_read_acq7 , input wire [15 : 0] sync_trig_tap_read_acq8 , input wire [15 : 0] sync_trig_locat_tap_read_acq5, input wire [15 : 0] sync_trig_locat_tap_read_acq6, input wire [15 : 0] sync_trig_locat_tap_read_acq7, input wire [15 : 0] sync_trig_locat_tap_read_acq8, output reg [15 : 0] sync_trig_tap_load_set_acq5, output reg [15 : 0] sync_trig_tap_load_set_acq6, output reg [15 : 0] sync_trig_tap_load_set_acq7, output reg [15 : 0] sync_trig_tap_load_set_acq8, output reg [15 : 0] sync_trig_locat_tap_load_set_acq5, output reg [15 : 0] sync_trig_locat_tap_load_set_acq6, output reg [15 : 0] sync_trig_locat_tap_load_set_acq7, output reg [15 : 0] sync_trig_locat_tap_load_set_acq8, output reg [15 : 0] sync_trig_locat_acq5 , output reg [15 : 0] sync_trig_locat_tap_start_acq5, output reg [15 : 0] sync_trig_locat_tap_stop_acq5, input wire [1 : 0] sync_trig_locat_flag_acq5, output reg [15 : 0] sync_trig_locat_acq6 , output reg [15 : 0] sync_trig_locat_tap_start_acq6, output reg [15 : 0] sync_trig_locat_tap_stop_acq6, input wire [1 : 0] sync_trig_locat_flag_acq6, output reg [15 : 0] sync_trig_locat_acq7 , output reg [15 : 0] sync_trig_locat_tap_start_acq7, output reg [15 : 0] sync_trig_locat_tap_stop_acq7, input wire [1 : 0] sync_trig_locat_flag_acq7, output reg [15 : 0] sync_trig_locat_acq8 , output reg [15 : 0] sync_trig_locat_tap_start_acq8, output reg [15 : 0] sync_trig_locat_tap_stop_acq8, input wire [1 : 0] sync_trig_locat_flag_acq8, output reg [15 : 0] dcm_rst_readback_tap , output reg [0 : 0] pc_search_pro_en , output reg [15 : 0] pc_search_data_numl16 , output reg [15 : 0] pc_search_data_numh16 , output reg [15 : 0] pc_search_point_num , output reg [0 : 0] pc_read_en , input wire [0 : 0] search_fifo_rd_finish , input wire [0 : 0] search_finish_flag , input wire [1 : 0] search_finish_state , input wire [14 : 0] search_stamp , input wire [11 : 0] stamp_num , output reg [10 : 0] pc_search_type , output reg [2 : 0] pc_search_source_sel , output reg [0 : 0] pc_search_edge_sel , output reg [3 : 0] pc_search_pw_set , output reg [2 : 0] pc_search_window_set , output reg [2 : 0] pc_search_runt_set , output reg [2 : 0] pc_search_slope_set , output reg [0 : 0] pc_search_timeout_set , output reg [0 : 0] pc_search_dropout_set , output reg [11 : 0] pc_seaech_cmp1_level_l , output reg [11 : 0] pc_seaech_cmp1_level_h , output reg [11 : 0] pc_seaech_cmp2_level_l , output reg [11 : 0] pc_seaech_cmp2_level_h , output reg [15 : 0] pc_search_configure_data1_setl, output reg [15 : 0] pc_search_configure_data1_setm, output reg [15 : 0] pc_search_configure_data1_seth, output reg [15 : 0] pc_search_configure_data2_setl, output reg [15 : 0] pc_search_configure_data2_setm, output reg [15 : 0] pc_search_configure_data2_seth, output reg [0 : 0] pro_ddr_rcd_rst_en , output reg [15 : 0] trig_1st_pro_exclude_width1_l, output reg [15 : 0] trig_1st_pro_exclude_width1_h, output reg [15 : 0] trig_1st_pro_exclude_width2_l, output reg [15 : 0] trig_1st_pro_exclude_width2_h, output reg [15 : 0] trig_2nd_pro_exclude_width1_l, output reg [15 : 0] trig_2nd_pro_exclude_width1_h, output reg [15 : 0] trig_2nd_pro_exclude_width2_l, output reg [15 : 0] trig_2nd_pro_exclude_width2_h, //------------------------------------------------------------------- //寄存器硬件接口 //------------------------------------------------------------------- input cmd_clk , input cmd_iowr_en , input cmd_iord_en , input [8:0] cmd_addr , input [15:0] cmd_iowr_d , output reg [15:0] cmd_iord_d ); //------------------------------------------------------------------- //寄存器定义 //------------------------------------------------------------------- //读回下发的写寄存器 reg [15:0] pro_read_wreg_data ; reg [15:0] pro_read_wreg_addr ; //上电回读寄存器 reg [15:0] pro_reg_read_back ; //------------------------------------------------------------------- //版本信息线网 //------------------------------------------------------------------- wire [15:0] pro_version_time_word0 ; wire [15:0] pro_version_time_word1 ; wire [15:0] pro_version_version_word0 ; wire [15:0] pro_version_version_word1 ; wire [15:0] pro_version_designer_word0 ; wire [15:0] pro_version_designer_word1 ; wire [15:0] pro_version_designer_word2 ; wire [15:0] pro_version_designer_word3 ; wire [15:0] pro_version_comment_word0 ; wire [15:0] pro_version_comment_word1 ; wire [15:0] pro_version_comment_word2 ; wire [15:0] pro_version_comment_word3 ; wire [15:0] pro_version_comment_word4 ; wire [15:0] pro_version_comment_word5 ; wire [15:0] pro_version_comment_word6 ; wire [15:0] pro_version_comment_word7 ; wire [15:0] pro_version_comment_word8 ; wire [15:0] pro_version_comment_word9 ; wire [15:0] pro_version_comment_word10 ; wire [15:0] pro_version_comment_word11 ; wire [15:0] pro_version_comment_word12 ; wire [15:0] pro_version_comment_word13 ; wire [15:0] pro_version_comment_word14 ; wire [15:0] pro_version_comment_word15 ; assign pro_version_time_word0 = (`COMPILE_TIME >> 0*16) & 16'hffff; assign pro_version_time_word1 = (`COMPILE_TIME >> 1*16) & 16'hffff; assign pro_version_version_word0 = (`VERSION_INFO >> 0*16) & 16'hffff; assign pro_version_version_word1 = (`VERSION_INFO >> 1*16) & 16'hffff; assign pro_version_designer_word0 = (`DESIGNER_INFO >> 0*16) & 16'hffff; assign pro_version_designer_word1 = (`DESIGNER_INFO >> 1*16) & 16'hffff; assign pro_version_designer_word2 = (`DESIGNER_INFO >> 2*16) & 16'hffff; assign pro_version_designer_word3 = (`DESIGNER_INFO >> 3*16) & 16'hffff; assign pro_version_comment_word0 = (`COMMENT_INFO >> 0*16) & 16'hffff; assign pro_version_comment_word1 = (`COMMENT_INFO >> 1*16) & 16'hffff; assign pro_version_comment_word2 = (`COMMENT_INFO >> 2*16) & 16'hffff; assign pro_version_comment_word3 = (`COMMENT_INFO >> 3*16) & 16'hffff; assign pro_version_comment_word4 = (`COMMENT_INFO >> 4*16) & 16'hffff; assign pro_version_comment_word5 = (`COMMENT_INFO >> 5*16) & 16'hffff; assign pro_version_comment_word6 = (`COMMENT_INFO >> 6*16) & 16'hffff; assign pro_version_comment_word7 = (`COMMENT_INFO >> 7*16) & 16'hffff; assign pro_version_comment_word8 = (`COMMENT_INFO >> 8*16) & 16'hffff; assign pro_version_comment_word9 = (`COMMENT_INFO >> 9*16) & 16'hffff; assign pro_version_comment_word10 = (`COMMENT_INFO >> 10*16) & 16'hffff; assign pro_version_comment_word11 = (`COMMENT_INFO >> 11*16) & 16'hffff; assign pro_version_comment_word12 = (`COMMENT_INFO >> 12*16) & 16'hffff; assign pro_version_comment_word13 = (`COMMENT_INFO >> 13*16) & 16'hffff; assign pro_version_comment_word14 = (`COMMENT_INFO >> 14*16) & 16'hffff; assign pro_version_comment_word15 = (`COMMENT_INFO >> 15*16) & 16'hffff; //------------------------------------------------------------------- //寄存器写使能打拍 //------------------------------------------------------------------- reg dsp_iowr_en_dly ; always @ (posedge cmd_clk) begin dsp_iowr_en_dly<= cmd_iowr_en; end //------------------------------------------------------------------- //寄存器写使能打拍 //------------------------------------------------------------------- reg dsp_iord_en_dly ; always @ (posedge cmd_clk) begin dsp_iord_en_dly <= cmd_iord_en; end //------------------------------------------------------------------- //用户寄存器分组定义 //------------------------------------------------------------------- //此处自动追加用户寄存器分组定义 // @INSERT_GROUP_FLAG //@apireg:group:begin //@apireg:group:title Average //@apireg:group:software:name Average //@apireg:group:end //@apireg:group:begin //@apireg:group:title Awg //@apireg:group:software:name Awg //@apireg:group:end //@apireg:group:begin //@apireg:group:title DBI //@apireg:group:software:name DBI //@apireg:group:end //@apireg:group:begin //@apireg:group:title DCM_CTRL //@apireg:group:software:name DCM_CTRL //@apireg:group:end //@apireg:group:begin //@apireg:group:title Data2Pcie //@apireg:group:software:name Data2Pcie //@apireg:group:end //@apireg:group:begin //@apireg:group:title DataPath //@apireg:group:software:name DataPath //@apireg:group:end //@apireg:group:begin //@apireg:group:title Decoder //@apireg:group:software:name Decoder //@apireg:group:end //@apireg:group:begin //@apireg:group:title Dpo //@apireg:group:software:name Dpo //@apireg:group:end //@apireg:group:begin //@apireg:group:title FPGAFlashUpdater //@apireg:group:software:name FPGAFlashUpdater //@apireg:group:end //@apireg:group:begin //@apireg:group:title FPGA_PLL_STATE //@apireg:group:software:name FPGA_PLL_STATE //@apireg:group:end //@apireg:group:begin //@apireg:group:title FREQ_DETECTION //@apireg:group:software:name FREQ_DETECTION //@apireg:group:end //@apireg:group:begin //@apireg:group:title FifoCtrl //@apireg:group:software:name FifoCtrl //@apireg:group:end //@apireg:group:begin //@apireg:group:title Inverter //@apireg:group:software:name Inverter //@apireg:group:end //@apireg:group:begin //@apireg:group:title IoCtrl //@apireg:group:software:name IoCtrl //@apireg:group:end //@apireg:group:begin //@apireg:group:title LA //@apireg:group:software:name LA //@apireg:group:end //@apireg:group:begin //@apireg:group:title LSCtrl //@apireg:group:software:name LSCtrl //@apireg:group:end //@apireg:group:begin //@apireg:group:title MDO //@apireg:group:software:name MDO //@apireg:group:end //@apireg:group:begin //@apireg:group:parent MDO //@apireg:group:title FIFO //@apireg:group:software:name FIFO //@apireg:group:end //@apireg:group:begin //@apireg:group:parent MDO //@apireg:group:title STFT //@apireg:group:software:name STFT //@apireg:group:end //@apireg:group:begin //@apireg:group:title PowerManager //@apireg:group:software:name PowerManager //@apireg:group:end //@apireg:group:begin //@apireg:group:title RegMonitor //@apireg:group:software:name RegMonitor //@apireg:group:end //@apireg:group:begin //@apireg:group:title Scan //@apireg:group:software:name Scan //@apireg:group:end //@apireg:group:begin //@apireg:group:title SerdesSync //@apireg:group:software:name SerdesSync //@apireg:group:end //@apireg:group:begin //@apireg:group:title SyncDataRxIDelay //@apireg:group:software:name SyncDataRxIDelay //@apireg:group:end //@apireg:group:begin //@apireg:group:title SysInfo //@apireg:group:software:name SysInfo //@apireg:group:end //@apireg:group:begin //@apireg:group:title SysMon //@apireg:group:software:name SysMon //@apireg:group:end //@apireg:group:begin //@apireg:group:title TrigCtrl //@apireg:group:software:name TrigCtrl //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title 1st //@apireg:group:software:name 1st //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title 2nd //@apireg:group:software:name 2nd //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title ASourceSel //@apireg:group:software:name ASourceSel //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title BSourceSel //@apireg:group:software:name BSourceSel //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Cascaded //@apireg:group:software:name Cascaded //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Code //@apireg:group:software:name Code //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Dropout //@apireg:group:software:name Dropout //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title EdgeThenEdge //@apireg:group:software:name EdgeThenEdge //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Fifo //@apireg:group:software:name Fifo //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Glitch //@apireg:group:software:name Glitch //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Interval //@apireg:group:software:name Interval //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Location //@apireg:group:software:name Location //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title PulseWidth //@apireg:group:software:name PulseWidth //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Runt //@apireg:group:software:name Runt //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Setuphold //@apireg:group:software:name Setuphold //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Slope //@apireg:group:software:name Slope //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title State //@apireg:group:software:name State //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Timeout //@apireg:group:software:name Timeout //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Video //@apireg:group:software:name Video //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title WidthSet //@apireg:group:software:name WidthSet //@apireg:group:end //@apireg:group:begin //@apireg:group:parent TrigCtrl //@apireg:group:title Window //@apireg:group:software:name Window //@apireg:group:end //@apireg:group:begin //@apireg:group:title TriggerSync //@apireg:group:software:name TriggerSync //@apireg:group:end //@apireg:group:begin //@apireg:group:title VersionInfo //@apireg:group:software:name VersionInfo //@apireg:group:end //@apireg:group:begin //@apireg:group:title dbi //@apireg:group:software:name dbi //@apireg:group:end //@apireg:group:begin //@apireg:group:title debug //@apireg:group:software:name debug //@apireg:group:end //@apireg:group:begin //@apireg:group:title ext_10m //@apireg:group:software:name ext_10m //@apireg:group:end //@apireg:group:begin //@apireg:group:title fifoCtrl //@apireg:group:software:name fifoCtrl //@apireg:group:end //@apireg:group:begin //@apireg:group:title la //@apireg:group:software:name la //@apireg:group:end //@apireg:group:begin //@apireg:group:title reverse //@apireg:group:software:name reverse //@apireg:group:end //@apireg:group:begin //@apireg:group:title scan_sync //@apireg:group:software:name scan_sync //@apireg:group:end //@apireg:group:begin //@apireg:group:title search //@apireg:group:software:name search //@apireg:group:end //@apireg:group:begin //@apireg:group:title seg //@apireg:group:software:name seg //@apireg:group:end //@apireg:group:begin //@apireg:group:title trig_exclude //@apireg:group:software:name trig_exclude //@apireg:group:end //@apireg:doc:file ./处理板原理图.png //////////////////////////////////////////////////////////////////////////////// //写寄存器 //////////////////////////////////////////////////////////////////////////////// always @ (posedge cmd_clk) begin //@apireg:write_read_attribute:attribute write if(dsp_iowr_en_dly == 1'b1 ) case(cmd_addr[8:0]) //------------------------------------------------------------------- //用户寄存器接口 //------------------------------------------------------------------- //此处自动追加用户寄存器定义 //@INSERT_WR_REG_FLAG //@apireg:group:title Average //@apireg:title AVERAGE_ENABLE //@apireg:software:name Enable //@apireg:value:appoint bit-width:1 ; 使能平均功能 //@apireg:desc abs-addr:0X8A88; none //@apireg:note reg_hw_name:average_enable //@apireg:0xaddr 0X8800 | (((0XA2&0XFF) << 2) | ((0XA2&0X100) << 6)) 9'H0A2 : average_enable <= cmd_iowr_d[0:0]; //@apireg:group:title Average //@apireg:title AVERAGE_RAM_RESET //@apireg:software:name RamReset //@apireg:value:appoint bit-width:1 ; 平均模块内部ram缓冲区清除，相当于重新开始平均 //@apireg:desc abs-addr:0X8A8C; none //@apireg:note reg_hw_name:average_ram_reset //@apireg:0xaddr 0X8800 | (((0XA3&0XFF) << 2) | ((0XA3&0X100) << 6)) 9'H0A3 : average_ram_reset <= cmd_iowr_d[0:0]; //@apireg:group:title Average //@apireg:title AVERAGE_NUMBER //@apireg:software:name Number //@apireg:value:appoint bit-width:8 ; 平均次数，多少帧波形数据进行平均 //@apireg:desc abs-addr:0X8A90; none //@apireg:note reg_hw_name:average_number //@apireg:0xaddr 0X8800 | (((0XA4&0XFF) << 2) | ((0XA4&0X100) << 6)) 9'H0A4 : average_number <= cmd_iowr_d[7:0]; //@apireg:group:title Average //@apireg:title AVERAGE_ADDR_INIT //@apireg:software:name AddrInit //@apireg:value:appoint bit-width:16 ; 平均模块内部ram缓冲区起始地址，默认设置为0 //@apireg:desc abs-addr:0X8A94; none //@apireg:note reg_hw_name:average_addr_init //@apireg:0xaddr 0X8800 | (((0XA5&0XFF) << 2) | ((0XA5&0X100) << 6)) 9'H0A5 : average_addr_init <= cmd_iowr_d[15:0]; //@apireg:group:title Average //@apireg:title AVERAGE_ADDR_REGION //@apireg:software:name AddrRegion //@apireg:value:appoint bit-width:16 ; 平均模块内部ram缓冲区最大地址，默认设置为平均的样点数 //@apireg:desc abs-addr:0X8A98; none //@apireg:note reg_hw_name:average_addr_region //@apireg:0xaddr 0X8800 | (((0XA6&0XFF) << 2) | ((0XA6&0X100) << 6)) 9'H0A6 : average_addr_region <= cmd_iowr_d[15:0]; //@apireg:group:title Average //@apireg:title AVERAGE_ADDR_OVER_DLY_NUM //@apireg:software:name average_addr_over_dly_num //@apireg:value:appoint bit-width:16 ; ？？平均次数？？ //@apireg:desc abs-addr:0X8B38; none //@apireg:note reg_hw_name:average_addr_over_dly_num //@apireg:0xaddr 0X8800 | (((0XCE&0XFF) << 2) | ((0XCE&0X100) << 6)) 9'H0CE : average_addr_over_dly_num <= cmd_iowr_d[15:0]; //@apireg:group:title Awg //@apireg:title AWG_ADDR_CTRL //@apireg:software:name awg_addr_ctrl //@apireg:value:appoint bit-width:10 ; 低8bit是地址； ; 第9bit是cs，控制写入：置1时写入，置0时不发送； ; 第10bit是data_en：0是写寄存器，1是写数据 //@apireg:desc abs-addr:0X8BB4; none //@apireg:note reg_hw_name:awg_addr_ctrl //@apireg:0xaddr 0X8800 | (((0XED&0XFF) << 2) | ((0XED&0X100) << 6)) 9'H0ED : awg_addr_ctrl <= cmd_iowr_d[9:0]; //@apireg:group:title Awg //@apireg:title AWG_DATA_IN //@apireg:software:name awg_data_in //@apireg:value:appoint bit-width:16 ; data_en为0时，只发送低8bit的数据 ; data_en为1时，16bit的数据全部发送 //@apireg:desc abs-addr:0X8BB8; 16bit的数据发送时，发送的是什么值？,,,, //@apireg:note reg_hw_name:awg_data_in //@apireg:0xaddr 0X8800 | (((0XEE&0XFF) << 2) | ((0XEE&0X100) << 6)) 9'H0EE : awg_data_in <= cmd_iowr_d[15:0]; //@apireg:group:title Awg //@apireg:title AWG_WR_CTRL //@apireg:software:name awg_wr_ctrl //@apireg:value:appoint bit-width:2 ; bit0是写使能：上升沿写入 ; bit1是读使能：上升沿读取 ; 两个bit不能同时有效 //@apireg:desc abs-addr:0X8BBC; none //@apireg:note reg_hw_name:awg_wr_ctrl //@apireg:0xaddr 0X8800 | (((0XEF&0XFF) << 2) | ((0XEF&0X100) << 6)) 9'H0EF : awg_wr_ctrl <= cmd_iowr_d[1:0]; //@apireg:group:title DBI //@apireg:title DBI_MODULE_EN //@apireg:software:name ProDbiModuleEn //@apireg:value:appoint bit-width:5 ; 处理板dbi模块开关使能3bit //@apireg:desc abs-addr:0X8818; bit2： 代表拼合模块有效 ; bit1：代表幅频补偿模块有效； ; bit0：代表相频补偿模块有效； ; [000]：代表处理板DBI各模块不工作,,,, //@apireg:note reg_hw_name:dbi_module_en //@apireg:0xaddr 0X8800 | (((0X06&0XFF) << 2) | ((0X06&0X100) << 6)) 9'H006 : dbi_module_en <= cmd_iowr_d[4:0]; //@apireg:group:title DBI //@apireg:title PRO_FACTOR_SEL //@apireg:software:name ProFactorSelect //@apireg:value:appoint bit-width:2 ; 处理板dbi模块系数的选择 //@apireg:desc abs-addr:0X881C; none //@apireg:note reg_hw_name:pro_factor_sel //@apireg:0xaddr 0X8800 | (((0X07&0XFF) << 2) | ((0X07&0X100) << 6)) 9'H007 : pro_factor_sel <= cmd_iowr_d[1:0]; //@apireg:group:title DBI //@apireg:title PRO_FACTOR_WA //@apireg:software:name ProFactorWa //@apireg:value:appoint bit-width:16 ; 处理板dbi模块系数的写地址 //@apireg:desc abs-addr:0X8820; none //@apireg:note reg_hw_name:pro_factor_wa //@apireg:0xaddr 0X8800 | (((0X08&0XFF) << 2) | ((0X08&0X100) << 6)) 9'H008 : pro_factor_wa <= cmd_iowr_d[15:0]; //@apireg:group:title DBI //@apireg:title PRO_FACTOR_WD_HIGH //@apireg:software:name ProFactorWdHigh //@apireg:value:appoint bit-width:2 ; 处理板dbi模块系数的写地址[17:0] //@apireg:desc abs-addr:0X8824; none //@apireg:note reg_hw_name:pro_factor_wd_high //@apireg:0xaddr 0X8800 | (((0X09&0XFF) << 2) | ((0X09&0X100) << 6)) 9'H009 : pro_factor_wd_high <= cmd_iowr_d[1:0]; //@apireg:group:title DBI //@apireg:title PRO_FACTOR_WD_LOW //@apireg:software:name ProFactorWdLow //@apireg:value:appoint bit-width:16 ; 处理板dbi模块系数的写数据[15:0] //@apireg:desc abs-addr:0X8828; none //@apireg:note reg_hw_name:pro_factor_wd_low //@apireg:0xaddr 0X8800 | (((0X0A&0XFF) << 2) | ((0X0A&0X100) << 6)) 9'H00A : pro_factor_wd_low <= cmd_iowr_d[15:0]; //@apireg:group:title DBI //@apireg:title PRO_FACTOR_WEN //@apireg:software:name ProFactorWen //@apireg:value:appoint bit-width:1 ; 处理板dbi模块系数的写使能 //@apireg:desc abs-addr:0X882C; none //@apireg:note reg_hw_name:pro_factor_wen //@apireg:0xaddr 0X8800 | (((0X0B&0XFF) << 2) | ((0X0B&0X100) << 6)) 9'H00B : pro_factor_wen <= cmd_iowr_d[0:0]; //@apireg:group:title DBI //@apireg:title DBI_MULT_FACTOR_WA //@apireg:software:name ProMultiFactorWa //@apireg:value:appoint bit-width:12 ; 10bits，num_of_data //@apireg:desc abs-addr:0X8830; 连续自然数,,,, //@apireg:note reg_hw_name:dbi_mult_factor_wa //@apireg:0xaddr 0X8800 | (((0X0C&0XFF) << 2) | ((0X0C&0X100) << 6)) 9'H00C : dbi_mult_factor_wa <= cmd_iowr_d[11:0]; //@apireg:group:title DBI //@apireg:title DBI_MULT_FACTOR_WD_HIGH //@apireg:software:name ProMultiFactorWdHigh //@apireg:value:appoint bit-width:1 ; msb_of_17bits //@apireg:desc abs-addr:0X8834; 插值滤波器系数，最高位,,,, //@apireg:note reg_hw_name:dbi_mult_factor_wd_high //@apireg:0xaddr 0X8800 | (((0X0D&0XFF) << 2) | ((0X0D&0X100) << 6)) 9'H00D : dbi_mult_factor_wd_high <= cmd_iowr_d[0:0]; //@apireg:group:title DBI //@apireg:title DBI_MULT_FACTOR_WD_LOW //@apireg:software:name ProMultiFactorWdLow //@apireg:value:appoint bit-width:16 ; low_16bits_of_17bits //@apireg:desc abs-addr:0X8838; 插值滤波器系数，低16位,,,, //@apireg:note reg_hw_name:dbi_mult_factor_wd_low //@apireg:0xaddr 0X8800 | (((0X0E&0XFF) << 2) | ((0X0E&0X100) << 6)) 9'H00E : dbi_mult_factor_wd_low <= cmd_iowr_d[15:0]; //@apireg:group:title DBI //@apireg:title DBI_MULT_FACTOR_WEN //@apireg:software:name ProMultiFactorWen //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X883C; 先发送数据，然后拉高使能完成一次系数发送，每次发系数前拉低，发完系数拉高,,,, //@apireg:note reg_hw_name:dbi_mult_factor_wen //@apireg:0xaddr 0X8800 | (((0X0F&0XFF) << 2) | ((0X0F&0X100) << 6)) 9'H00F : dbi_mult_factor_wen <= cmd_iowr_d[0:0]; //@apireg:group:title DBI //@apireg:title DBI_MULT_INTER_EN //@apireg:software:name ProMultiInterEn //@apireg:value:appoint bit-width:1 ; 1bit, active high //@apireg:desc abs-addr:0X8840; 等于1时打开插值，等于0时关闭插值,,,, //@apireg:note reg_hw_name:dbi_mult_inter_en //@apireg:0xaddr 0X8800 | (((0X10&0XFF) << 2) | ((0X10&0X100) << 6)) 9'H010 : dbi_mult_inter_en <= cmd_iowr_d[0:0]; //@apireg:group:title DBI //@apireg:title DBI_MULT_INTERP_MUL //@apireg:software:name ProMultiInterpRate //@apireg:value:appoint bit-width:16 ; 8bits, num of interpolation rate //@apireg:desc abs-addr:0X8844; 八位自然数，最大插值倍率为100，所以需要八位位宽 ; 20Gsps模式下的插值倍率：2/4/5/10/20/25/50/100,,,, //@apireg:note reg_hw_name:dbi_mult_interp_mul //@apireg:0xaddr 0X8800 | (((0X11&0XFF) << 2) | ((0X11&0X100) << 6)) 9'H011 : dbi_mult_interp_mul <= cmd_iowr_d[15:0]; //@apireg:group:title DBI //@apireg:title DBI_MULT_RESET_DSP //@apireg:software:name ProMultiResetDsp //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8848; 高有效：等于1时复位， ; 发送系数前复位1次,,,, //@apireg:note reg_hw_name:dbi_mult_reset_dsp //@apireg:0xaddr 0X8800 | (((0X12&0XFF) << 2) | ((0X12&0X100) << 6)) 9'H012 : dbi_mult_reset_dsp <= cmd_iowr_d[0:0]; //@apireg:group:title DBI //@apireg:title DEBUG_NUM //@apireg:software:name SubDataDebugNum //@apireg:value:appoint bit-width:6 ; 2bit；数据接收fifo满控制==dbi单双通道模式 //@apireg:desc abs-addr:0X884C; [00]：输入四路数据； ; [01]：仅输入第一子带数据； ; [10]：仅输入第一、二子带数据 ; [01]：仅输入第一、二、三子带数据,,,, //@apireg:note reg_hw_name:debug_num //@apireg:0xaddr 0X8800 | (((0X13&0XFF) << 2) | ((0X13&0X100) << 6)) 9'H013 : debug_num <= cmd_iowr_d[5:0]; //@apireg:group:title DBI //@apireg:title DBI_INTER_COMP_ZERO //@apireg:software:name dbi_inter_comp_zero //@apireg:value:appoint bit-width:16 ; dbi software 补0操作 [15]使能 [14:0]计数值 //@apireg:desc abs-addr:0X8AAC; none //@apireg:note reg_hw_name:dbi_inter_comp_zero //@apireg:0xaddr 0X8800 | (((0XAB&0XFF) << 2) | ((0XAB&0X100) << 6)) 9'H0AB : dbi_inter_comp_zero <= cmd_iowr_d[15:0]; //@apireg:group:title DBI //@apireg:title DBI_FACTOR_SELECT_PRO //@apireg:software:name DBI_FACTOR_SELSECT_PRO //@apireg:value:appoint bit-width:8 ; 处理板选择下发滤波器系数的种类 //@apireg:desc abs-addr:0X8B8C; 独热码形式，八种滤波器系数，可扩展,,,, //@apireg:note reg_hw_name:dbi_factor_select_pro //@apireg:0xaddr 0X8800 | (((0XE3&0XFF) << 2) | ((0XE3&0X100) << 6)) 9'H0E3 : dbi_factor_select_pro <= cmd_iowr_d[7:0]; //@apireg:group:title DBI //@apireg:title DMA_RST_PRO //@apireg:software:name DMA_RST_PRO //@apireg:value:appoint bit-width:1 ; 处理板dma下发复位信号，更换滤波器系数需要复位 //@apireg:desc abs-addr:0X8B90; 复位信号,,,, //@apireg:note reg_hw_name:dma_rst_pro //@apireg:0xaddr 0X8800 | (((0XE4&0XFF) << 2) | ((0XE4&0X100) << 6)) 9'H0E4 : dma_rst_pro <= cmd_iowr_d[0:0]; //@apireg:group:title DBI //@apireg:title CHANNEL_EN //@apireg:software:name channel_en //@apireg:value:appoint bit-width:1 ; 通道模式使能 //@apireg:desc abs-addr:0XC9A8; 通道模式使能,,,, //@apireg:note reg_hw_name:channel_en //@apireg:0xaddr 0X8800 | (((0X16A&0XFF) << 2) | ((0X16A&0X100) << 6)) 9'H16A : channel_en <= cmd_iowr_d[0:0]; //@apireg:group:title DCM_CTRL //@apireg:title RST_DCM_CONTROL //@apireg:software:name Reset //@apireg:value:appoint bit-width:8 ; 8bits，bit2：acq1_7044_sync，bit4：acq2_7044_sync，other bits：no use //@apireg:desc abs-addr:0X8850; 第3位，第5位用作采集板7044同步引脚，其余位未使用,,,, //@apireg:note reg_hw_name:rst_dcm_control //@apireg:0xaddr 0X8800 | (((0X14&0XFF) << 2) | ((0X14&0X100) << 6)) 9'H014 : rst_dcm_control <= cmd_iowr_d[7:0]; //@apireg:group:title Data2Pcie //@apireg:title DATA_TX_CLK_RESET //@apireg:software:name ResetTxClk //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8804; 传输模块ODDR的复位，为高电平时复位,,,, //@apireg:note reg_hw_name:data_tx_clk_reset //@apireg:0xaddr 0X8800 | (((0X01&0XFF) << 2) | ((0X01&0X100) << 6)) 9'H001 : data_tx_clk_reset <= cmd_iowr_d[0:0]; //@apireg:group:title Data2Pcie //@apireg:title DATA_TX_IO_RESET //@apireg:software:name ResetTxIO //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8808; 传输模块FDRE的复位，为高电平时复位， ; 初始化复位一次,,,, //@apireg:note reg_hw_name:data_tx_io_reset //@apireg:0xaddr 0X8800 | (((0X02&0XFF) << 2) | ((0X02&0X100) << 6)) 9'H002 : data_tx_io_reset <= cmd_iowr_d[0:0]; //@apireg:group:title DataPath //@apireg:title PRO_SELECT_ACQ_CHANNEL //@apireg:software:name pro_select_acq_channel //@apireg:value:appoint bit-width:16 ; 处理板数字信号处理选择数据来自哪个模拟通道，0表示模拟通道1，1表示模拟通道2，以此类推，如果一张采集卡接两个模拟通道，则0/1表示第一张采集卡的数据 //@apireg:desc abs-addr:0X880C; none //@apireg:note reg_hw_name:pro_select_acq_channel //@apireg:0xaddr 0X8800 | (((0X03&0XFF) << 2) | ((0X03&0X100) << 6)) 9'H003 : pro_select_acq_channel <= cmd_iowr_d[15:0]; //@apireg:group:title DataPath //@apireg:title PRO_LINKDEMUX_SELECT //@apireg:software:name pro_linkdemux_select //@apireg:value:appoint bit-width:3 ; 处理板接受数据后数据解析类型选择： ; 0：正常时域数据； ; 1：dpo映射时域数据； ; 2：协议解码数据； ; 3、频域数据； ; 4、快传数据； ; 5、la数据； ; 默认态：正常时域数据； //@apireg:desc abs-addr:0X8810; none //@apireg:note reg_hw_name:pro_linkdemux_select //@apireg:0xaddr 0X8800 | (((0X04&0XFF) << 2) | ((0X04&0X100) << 6)) 9'H004 : pro_linkdemux_select <= cmd_iowr_d[2:0]; //@apireg:group:title DataPath //@apireg:title PRO_LINKMUX_SELECT //@apireg:software:name pro_linkmux_select //@apireg:value:appoint bit-width:3 ; 处理板到pcie数据的数据解析类型选择： ; 0：正常时域数据； ; 1：dpo映射时域数据； ; 2：协议解码数据； ; 3、频域数据； ; 4、快传数据； ; 5、la数据； ; 默认态：正常时域数据； //@apireg:desc abs-addr:0X8814; none //@apireg:note reg_hw_name:pro_linkmux_select //@apireg:0xaddr 0X8800 | (((0X05&0XFF) << 2) | ((0X05&0X100) << 6)) 9'H005 : pro_linkmux_select <= cmd_iowr_d[2:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_FIFO_RAM_SEL //@apireg:software:name DataFromFifoOrRam //@apireg:value:appoint bit-width:1 ; 1bit 1：fifo 波形数据 0：ram 解码数据 //@apireg:desc abs-addr:0X8854; 选择传输波形数据或解码包,,,, //@apireg:note reg_hw_name:fifo_ram_sel //@apireg:0xaddr 0X8800 | (((0X15&0XFF) << 2) | ((0X15&0X100) << 6)) 9'H015 : fifo_ram_sel <= cmd_iowr_d[0:0]; //@apireg:group:title Decoder //@apireg:title USER_DATA_H //@apireg:software:name protocol_user_data_h //@apireg:value:appoint bit-width:16 ; 16bits：触发比较值h，现在无论要发多长的比较值，都只用一个16位接口分批次发送 //@apireg:desc abs-addr:0X8AB4; 如果要发一个48位的值，应该拆成3次发送。先发送低16位值和地址编码4'b0，然后再发送其有效使能user_data_valid_h；发送中16位时应该先拉低有效，再发送值和地址编码4‘b1，然后再拉高有效；然后再拉低有效，发送高16位值和地址编码4'b2，随后拉高有效.发送完毕后，要拉低有效使能。（两个16位值之间至少要间隔4个时钟，当然以软件下发参数的速度来看，肯定可以满足）,,,, //@apireg:note reg_hw_name:user_data_h //@apireg:0xaddr 0X8800 | (((0XAD&0XFF) << 2) | ((0XAD&0X100) << 6)) 9'H0AD : user_data_h <= cmd_iowr_d[15:0]; //@apireg:group:title Decoder //@apireg:title USER_DATA_L //@apireg:software:name protocol_user_data_l //@apireg:value:appoint bit-width:16 ; 16bits：触发比较值l，现在无论要发多长的比较值，都只用一个16位接口分批次发送 //@apireg:desc abs-addr:0X8AB8; 如果要发一个48位的值，应该拆成3次发送。先发送低16位值和地址编码4'b0，然后再发送其有效使能user_data_valid_h；发送中16位时应该先拉低有效，再发送值和地址编码4‘b1，然后再拉高有效；然后再拉低有效，发送高16位值和地址编码4'b2，随后拉高有效.发送完毕后，要拉低有效使能。,,,, //@apireg:note reg_hw_name:user_data_l //@apireg:0xaddr 0X8800 | (((0XAE&0XFF) << 2) | ((0XAE&0X100) << 6)) 9'H0AE : user_data_l <= cmd_iowr_d[15:0]; //@apireg:group:title Decoder //@apireg:title USER_DATA_VALID_H //@apireg:software:name protocol_user_data_valid_h //@apireg:value:appoint bit-width:1 ; 高有效，拉高时硬件会接收user_data_h //@apireg:desc abs-addr:0X8ABC; 每次发送user_data_h前拉低，发送后再拉高,,,, //@apireg:note reg_hw_name:user_data_valid_h //@apireg:0xaddr 0X8800 | (((0XAF&0XFF) << 2) | ((0XAF&0X100) << 6)) 9'H0AF : user_data_valid_h <= cmd_iowr_d[0:0]; //@apireg:group:title Decoder //@apireg:title USER_DATA_VALID_L //@apireg:software:name protocol_user_data_valid_l //@apireg:value:appoint bit-width:1 ; 高有效，拉高时硬件会接收user_data_l //@apireg:desc abs-addr:0X8AC0; 每次发送user_data_L前拉低，发送后再拉高,,,, //@apireg:note reg_hw_name:user_data_valid_l //@apireg:0xaddr 0X8800 | (((0XB0&0XFF) << 2) | ((0XB0&0X100) << 6)) 9'H0B0 : user_data_valid_l <= cmd_iowr_d[0:0]; //@apireg:group:title Decoder //@apireg:title USER_DATA_ADDR_H //@apireg:software:name protocol_user_data_addr_h //@apireg:value:appoint bit-width:4 ; user_data_h的地址编码，发送的第一个user_data_h地址编码为0，依次递增。 //@apireg:desc abs-addr:0X8AC4; user_data_h更新时同步刷新,,,, //@apireg:note reg_hw_name:user_data_addr_h //@apireg:0xaddr 0X8800 | (((0XB1&0XFF) << 2) | ((0XB1&0X100) << 6)) 9'H0B1 : user_data_addr_h <= cmd_iowr_d[3:0]; //@apireg:group:title Decoder //@apireg:title USER_DATA_ADDR_L //@apireg:software:name protocol_user_data_addr_l //@apireg:value:appoint bit-width:4 ; user_data_l的地址编码，发送的第一个user_data_l地址编码为0，依次递增。 //@apireg:desc abs-addr:0X8AC8; user_data_l更新时同步刷新,,,, //@apireg:note reg_hw_name:user_data_addr_l //@apireg:0xaddr 0X8800 | (((0XB2&0XFF) << 2) | ((0XB2&0X100) << 6)) 9'H0B2 : user_data_addr_l <= cmd_iowr_d[3:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B1_L //@apireg:software:name SignalSource_B1_L //@apireg:value:appoint bit-width:16 ; 16bits解码通道1信号源选择：协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8ACC; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b1_l //@apireg:0xaddr 0X8800 | (((0XB3&0XFF) << 2) | ((0XB3&0X100) << 6)) 9'H0B3 : protocol_source_ch_sel_b1_l <= cmd_iowr_d[15:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B1_M //@apireg:software:name SignalSource_B1_M //@apireg:value:appoint bit-width:16 ; 协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8AD0; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b1_m //@apireg:0xaddr 0X8800 | (((0XB4&0XFF) << 2) | ((0XB4&0X100) << 6)) 9'H0B4 : protocol_source_ch_sel_b1_m <= cmd_iowr_d[15:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B1_H //@apireg:software:name SignalSource_B1_H //@apireg:value:appoint bit-width:4 ; 协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8AD4; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b1_h //@apireg:0xaddr 0X8800 | (((0XB5&0XFF) << 2) | ((0XB5&0X100) << 6)) 9'H0B5 : protocol_source_ch_sel_b1_h <= cmd_iowr_d[3:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B2_L //@apireg:software:name SignalSource_B2_L //@apireg:value:appoint bit-width:16 ; 16bits解码通道2信号源选择：协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8AD8; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b2_l //@apireg:0xaddr 0X8800 | (((0XB6&0XFF) << 2) | ((0XB6&0X100) << 6)) 9'H0B6 : protocol_source_ch_sel_b2_l <= cmd_iowr_d[15:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B2_M //@apireg:software:name SignalSource_B2_M //@apireg:value:appoint bit-width:16 ; 协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8ADC; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b2_m //@apireg:0xaddr 0X8800 | (((0XB7&0XFF) << 2) | ((0XB7&0X100) << 6)) 9'H0B7 : protocol_source_ch_sel_b2_m <= cmd_iowr_d[15:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B2_H //@apireg:software:name SignalSource_B2_H //@apireg:value:appoint bit-width:4 ; 协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8AE0; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b2_h //@apireg:0xaddr 0X8800 | (((0XB8&0XFF) << 2) | ((0XB8&0X100) << 6)) 9'H0B8 : protocol_source_ch_sel_b2_h <= cmd_iowr_d[3:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_TYPE_B1 //@apireg:software:name TypeB1 //@apireg:value:appoint bit-width:5 ; 解码通道b1所选择的协议类型，最多支持32种协议，具体对应关系请看硬件部分（可以看mso2g） //@apireg:desc abs-addr:0X8AE4; 不同解码通道协议选择应该不同，不能同时分析同一种协议。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_type_b1 //@apireg:0xaddr 0X8800 | (((0XB9&0XFF) << 2) | ((0XB9&0X100) << 6)) 9'H0B9 : protocol_type_b1 <= cmd_iowr_d[4:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_TYPE_B2 //@apireg:software:name TypeB2 //@apireg:value:appoint bit-width:5 ; 解码通道b2所选择的协议类型，最多支持32种协议，具体对应关系请看硬件部分（可以看mso2g） //@apireg:desc abs-addr:0X8AE8; 不同解码通道协议选择应该不同，不能同时分析同一种协议。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_type_b2 //@apireg:0xaddr 0X8800 | (((0XBA&0XFF) << 2) | ((0XBA&0X100) << 6)) 9'H0BA : protocol_type_b2 <= cmd_iowr_d[4:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_RST //@apireg:software:name ResetAfterParamChanged //@apireg:value:appoint bit-width:1 ; 协议模块使能，高有效。 //@apireg:desc abs-addr:0X8AEC; 协议全局使能，要打开协议使能必须将其拉高。,,,, //@apireg:note reg_hw_name:protocol_rst //@apireg:0xaddr 0X8800 | (((0XBB&0XFF) << 2) | ((0XBB&0X100) << 6)) 9'H0BB : protocol_rst <= cmd_iowr_d[0:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_TYPE //@apireg:software:name ProtocolTypeForTrigger //@apireg:value:appoint bit-width:5 ; 触发通道协议选择 //@apireg:desc abs-addr:0X8AF0; 其值应该和protocol_type_B1或protocol_type_B2同步发送，而且发送值相同。其作用仅仅是为了分配set参数，由于不会同时分析相同协议，所以不需要区分B1和B2。（原来有protocol_type4trigger和protocol_type4decode之分，现在不需要了，所以连带decode_or_trigger这个控制字也不需要了）,,,, //@apireg:note reg_hw_name:protocol_type //@apireg:0xaddr 0X8800 | (((0XBC&0XFF) << 2) | ((0XBC&0X100) << 6)) 9'H0BC : protocol_type <= cmd_iowr_d[4:0]; //@apireg:group:title Decoder //@apireg:title TRIG_CTRL_WORD0 //@apireg:software:name TrigControlWordL //@apireg:value:appoint bit-width:16 ; 协议set控制参数低16位 //@apireg:desc abs-addr:0X8AF4; 协议使能打开后，从低位依次发送。,,,, //@apireg:note reg_hw_name:trig_ctrl_word0 //@apireg:0xaddr 0X8800 | (((0XBD&0XFF) << 2) | ((0XBD&0X100) << 6)) 9'H0BD : trig_ctrl_word0 <= cmd_iowr_d[15:0]; //@apireg:group:title Decoder //@apireg:title TRIG_CTRL_WORD1 //@apireg:software:name TrigControlWordM //@apireg:value:appoint bit-width:16 ; 协议set控制参数中16位 //@apireg:desc abs-addr:0X8AF8; none //@apireg:note reg_hw_name:trig_ctrl_word1 //@apireg:0xaddr 0X8800 | (((0XBE&0XFF) << 2) | ((0XBE&0X100) << 6)) 9'H0BE : trig_ctrl_word1 <= cmd_iowr_d[15:0]; //@apireg:group:title Decoder //@apireg:title TRIG_CTRL_WORD2 //@apireg:software:name TrigControlWordH //@apireg:value:appoint bit-width:16 ; 协议set控制参数高16位 //@apireg:desc abs-addr:0X8AFC; none //@apireg:note reg_hw_name:trig_ctrl_word2 //@apireg:0xaddr 0X8800 | (((0XBF&0XFF) << 2) | ((0XBF&0X100) << 6)) 9'H0BF : trig_ctrl_word2 <= cmd_iowr_d[15:0]; //@apireg:group:title Decoder //@apireg:title DECODE_RST //@apireg:software:name RamResetEnable //@apireg:value:appoint bit-width:1 ; 协议模块解码使能，高有效。 //@apireg:desc abs-addr:0X8B00; 要观察解码标签必须打开此使能,,,, //@apireg:note reg_hw_name:decode_rst //@apireg:0xaddr 0X8800 | (((0XC0&0XFF) << 2) | ((0XC0&0X100) << 6)) 9'H0C0 : decode_rst <= cmd_iowr_d[0:0]; //@apireg:group:title Decoder //@apireg:title DSP_SET_B1 //@apireg:software:name B1Enable //@apireg:value:appoint bit-width:1 ; 解码通道b1使能，高有效。 //@apireg:desc abs-addr:0X8B04; 示波器上打开对应解码通道，在选取协议类型后应该打开通道使能。,,,, //@apireg:note reg_hw_name:dsp_set_b1 //@apireg:0xaddr 0X8800 | (((0XC1&0XFF) << 2) | ((0XC1&0X100) << 6)) 9'H0C1 : dsp_set_b1 <= cmd_iowr_d[0:0]; //@apireg:group:title Decoder //@apireg:title DSP_SET_B2 //@apireg:software:name B2Enable //@apireg:value:appoint bit-width:1 ; 解码通道b2使能，高有效。 //@apireg:desc abs-addr:0X8B08; 同上,,,, //@apireg:note reg_hw_name:dsp_set_b2 //@apireg:0xaddr 0X8800 | (((0XC2&0XFF) << 2) | ((0XC2&0X100) << 6)) 9'H0C2 : dsp_set_b2 <= cmd_iowr_d[0:0]; //@apireg:group:title Decoder //@apireg:title DECODE_RAM_PREDEPTH //@apireg:software:name RamPreDepth //@apireg:value:appoint bit-width:12 ; 解码ram预触发深度 //@apireg:desc abs-addr:0X8B0C; 根据需求设置，打开解码使能后发送。,,,, //@apireg:note reg_hw_name:decode_ram_predepth //@apireg:0xaddr 0X8800 | (((0XC3&0XFF) << 2) | ((0XC3&0X100) << 6)) 9'H0C3 : decode_ram_predepth <= cmd_iowr_d[11:0]; //@apireg:group:title Decoder //@apireg:title DSP_WRRAM_EN //@apireg:software:name RamWriteEnable //@apireg:value:appoint bit-width:1 ; 解码ram写使能，高有效 //@apireg:desc abs-addr:0X8B10; 打开解码使能的时候就应该打开解码RAM写使能。,,,, //@apireg:note reg_hw_name:dsp_wrram_en //@apireg:0xaddr 0X8800 | (((0XC4&0XFF) << 2) | ((0XC4&0X100) << 6)) 9'H0C4 : dsp_wrram_en <= cmd_iowr_d[0:0]; //@apireg:group:title Decoder //@apireg:title DSP_RDRAM_EN //@apireg:software:name RamReadEnable //@apireg:value:appoint bit-width:1 ; 解码ram读使能，高有效 //@apireg:desc abs-addr:0X8B14; 打开解码使能后应该定期发送RAM读使能,,,, //@apireg:note reg_hw_name:dsp_rdram_en //@apireg:0xaddr 0X8800 | (((0XC5&0XFF) << 2) | ((0XC5&0X100) << 6)) 9'H0C5 : dsp_rdram_en <= cmd_iowr_d[0:0]; //@apireg:group:title Decoder //@apireg:title TRIG_TYPE_SEL //@apireg:software:name TrigTypeSelect //@apireg:value:appoint bit-width:5 ; 协议触发源选择 //@apireg:desc abs-addr:0X8B18; 打开协议使能后应该发送，其值应该和当前激活协议通道的控制字protocol_type相同。,,,, //@apireg:note reg_hw_name:trig_type_sel //@apireg:0xaddr 0X8800 | (((0XC6&0XFF) << 2) | ((0XC6&0X100) << 6)) 9'H0C6 : trig_type_sel <= cmd_iowr_d[4:0]; //@apireg:group:title Dpo //@apireg:title DPO_DIGITAL_TRIG_EN //@apireg:software:name DigitalTrigEnable //@apireg:value:appoint bit-width:1 ; 0：数字触发关闭； ; 1：数字触发使能 //@apireg:desc abs-addr:0X8858; 可以与其他部分的数字触发使能复用,,,, //@apireg:note reg_hw_name:dpo_digital_trig_en //@apireg:0xaddr 0X8800 | (((0X16&0XFF) << 2) | ((0X16&0X100) << 6)) 9'H016 : dpo_digital_trig_en <= cmd_iowr_d[0:0]; //@apireg:group:title Dpo //@apireg:title DPO_DIN_TEST_CONTROL //@apireg:software:name dpo_din_test_control //@apireg:value:appoint bit-width:1 ; dpo数据测试使能 //@apireg:desc abs-addr:0X885C; none //@apireg:note reg_hw_name:dpo_din_test_control //@apireg:0xaddr 0X8800 | (((0X17&0XFF) << 2) | ((0X17&0X100) << 6)) 9'H017 : dpo_din_test_control <= cmd_iowr_d[0:0]; //@apireg:group:title Dpo //@apireg:title DPO_EN //@apireg:software:name Enable //@apireg:value:appoint bit-width:2 ; bit0：三维映射使能，高有效； ; bit1：三维映射模式，1表示矢量映射，0表示映射 //@apireg:desc abs-addr:0X8860; none //@apireg:note reg_hw_name:dpo_en //@apireg:0xaddr 0X8800 | (((0X18&0XFF) << 2) | ((0X18&0X100) << 6)) 9'H018 : dpo_en <= cmd_iowr_d[1:0]; //@apireg:group:title Dpo //@apireg:title DPO_DECIMATION //@apireg:software:name ExtractNum //@apireg:value:appoint bit-width:4 ; 4bit后抽倍数 //@apireg:desc abs-addr:0X8864; none //@apireg:note reg_hw_name:dpo_decimation //@apireg:0xaddr 0X8800 | (((0X19&0XFF) << 2) | ((0X19&0X100) << 6)) 9'H019 : dpo_decimation <= cmd_iowr_d[3:0]; //@apireg:group:title Dpo //@apireg:title DPO_CHANNEL_MODE //@apireg:software:name MapChMode //@apireg:value:appoint bit-width:1 ; 三维映射采集数据8路/4路传输控制 //@apireg:desc abs-addr:0X8868; 三维映射采集数据8路/4路传输控制（采集板传到处理板），单通道8路传输，双通道4路传输,,,, //@apireg:note reg_hw_name:dpo_channel_mode //@apireg:0xaddr 0X8800 | (((0X1A&0XFF) << 2) | ((0X1A&0X100) << 6)) 9'H01A : dpo_channel_mode <= cmd_iowr_d[0:0]; //@apireg:group:title Dpo //@apireg:title DPO_MAP_FIFO_DEPTH //@apireg:software:name MapFifoDepth //@apireg:value:appoint bit-width:16 ; 并行映射fifo预满深度 //@apireg:desc abs-addr:0X886C; 并行映射fifo预满深度,,,, //@apireg:note reg_hw_name:dpo_map_fifo_depth //@apireg:0xaddr 0X8800 | (((0X1B&0XFF) << 2) | ((0X1B&0X100) << 6)) 9'H01B : dpo_map_fifo_depth <= cmd_iowr_d[15:0]; //@apireg:group:title Dpo //@apireg:title DPO_MEASURE_FIFO_DEPTH //@apireg:software:name MeasureFifoDepth //@apireg:value:appoint bit-width:16 ; 三维映射参数测量fifo预满深度 //@apireg:desc abs-addr:0X8870; 三维映射软件FIFO预满深度,,,, //@apireg:note reg_hw_name:dpo_measure_fifo_depth //@apireg:0xaddr 0X8800 | (((0X1C&0XFF) << 2) | ((0X1C&0X100) << 6)) 9'H01C : dpo_measure_fifo_depth <= cmd_iowr_d[15:0]; //@apireg:group:title Dpo //@apireg:title DPO_PRO_RESET //@apireg:software:name OutReset //@apireg:value:appoint bit-width:1 ; 0：不进行复位； ; 1：复位输出行列 //@apireg:desc abs-addr:0X8874; 不确定新的送显方式是否仍需要，保留,,,, //@apireg:note reg_hw_name:dpo_pro_reset //@apireg:0xaddr 0X8800 | (((0X1D&0XFF) << 2) | ((0X1D&0X100) << 6)) 9'H01D : dpo_pro_reset <= cmd_iowr_d[0:0]; //@apireg:group:title Dpo //@apireg:title DPO_PARALLEL_EN //@apireg:software:name ParallelDpx //@apireg:value:appoint bit-width:1 ; 三维映射乒乓使能 //@apireg:desc abs-addr:0X8878; none //@apireg:note reg_hw_name:dpo_parallel_en //@apireg:0xaddr 0X8800 | (((0X1E&0XFF) << 2) | ((0X1E&0X100) << 6)) 9'H01E : dpo_parallel_en <= cmd_iowr_d[0:0]; //@apireg:group:title Dpo //@apireg:title DPX_RAM_TEST_D_CTRL //@apireg:software:name RAMTestEn //@apireg:value:appoint bit-width:1 ; 送显映射数据测试使能（测试pcie传输） //@apireg:desc abs-addr:0X887C; 送显映射数据测试使能（测试PCIE传输）,,,, //@apireg:note reg_hw_name:dpx_ram_test_d_ctrl //@apireg:0xaddr 0X8800 | (((0X1F&0XFF) << 2) | ((0X1F&0X100) << 6)) 9'H01F : dpx_ram_test_d_ctrl <= cmd_iowr_d[0:0]; //@apireg:group:title Dpo //@apireg:title DPO_TIME_OVER //@apireg:software:name TimeOverCtrlWord //@apireg:value:appoint bit-width:1 ; 0：计时未到； ; 1：计时超时 //@apireg:desc abs-addr:0X8880; 发1表明pc需要读取数据，硬件停止当前的波形映射，进行送显,,,, //@apireg:note reg_hw_name:dpo_time_over //@apireg:0xaddr 0X8800 | (((0X20&0XFF) << 2) | ((0X20&0X100) << 6)) 9'H020 : dpo_time_over <= cmd_iowr_d[0:0]; //@apireg:group:title Dpo //@apireg:title DPO_CNT_SCREEN_MAX //@apireg:software:name cnt_screen_max //@apireg:value:appoint bit-width:16 ; ？？映射次数？？默认 0x1fff //@apireg:desc abs-addr:0X8B3C; 默认 0X1FFF,,,, //@apireg:note reg_hw_name:dpo_cnt_screen_max //@apireg:0xaddr 0X8800 | (((0XCF&0XFF) << 2) | ((0XCF&0X100) << 6)) 9'H0CF : dpo_cnt_screen_max <= cmd_iowr_d[15:0]; //@apireg:group:title Dpo //@apireg:title DPO_TEST_CTRL //@apireg:software:name dpo_test_ctrl //@apireg:value:appoint bit-width:16 ; 测试模式控制 //@apireg:desc abs-addr:0X8B40; none //@apireg:note reg_hw_name:dpo_test_ctrl //@apireg:0xaddr 0X8800 | (((0XD0&0XFF) << 2) | ((0XD0&0X100) << 6)) 9'H0D0 : dpo_test_ctrl <= cmd_iowr_d[15:0]; //@apireg:group:title Dpo //@apireg:title PRO_PINGPONG_CNT_THRESH //@apireg:software:name pro_pingpong_cnt_thresh //@apireg:value:appoint bit-width:16 ; 处理板乒乓传输计数器阈值 //@apireg:desc abs-addr:0X8B94; none //@apireg:note reg_hw_name:pro_pingpong_cnt_thresh //@apireg:0xaddr 0X8800 | (((0XE5&0XFF) << 2) | ((0XE5&0X100) << 6)) 9'H0E5 : pro_pingpong_cnt_thresh <= cmd_iowr_d[15:0]; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_READSTART //@apireg:software:name ReadStart //@apireg:value:appoint bit-width:1 ; 启动接收flash的数据，等待时间与spiclock有关。先启动，等待，读数，然后关闭 //@apireg:desc abs-addr:0X8890; 读回下发寄存器的值,,,, //@apireg:note reg_hw_name:pro_config_flash_readstart //@apireg:0xaddr 0X8800 | (((0X24&0XFF) << 2) | ((0X24&0X100) << 6)) 9'H024 : pro_config_flash_readstart <= cmd_iowr_d[0:0]; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_SPICLOCK_DIV //@apireg:software:name SpiClock //@apireg:value:appoint bit-width:8 ; 独热码，指定spi的时钟的分频比 //@apireg:desc abs-addr:0X8894; none //@apireg:note reg_hw_name:pro_config_flash_spiclock_div //@apireg:0xaddr 0X8800 | (((0X25&0XFF) << 2) | ((0X25&0X100) << 6)) 9'H025 : pro_config_flash_spiclock_div <= cmd_iowr_d[7:0]; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_SS //@apireg:software:name SS //@apireg:value:appoint bit-width:1 ; 通过spi总线往来传输数据时为1，关闭spi总线时为0，参照flash命令时序图 //@apireg:desc abs-addr:0X8898; none //@apireg:note reg_hw_name:pro_config_flash_ss //@apireg:0xaddr 0X8800 | (((0X26&0XFF) << 2) | ((0X26&0X100) << 6)) 9'H026 : pro_config_flash_ss <= cmd_iowr_d[0:0]; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_WRITEDATA //@apireg:software:name WriteData //@apireg:value:appoint bit-width:8 ; 传向flash的数据，每次8bit //@apireg:desc abs-addr:0X889C; none //@apireg:note reg_hw_name:pro_config_flash_writedata //@apireg:0xaddr 0X8800 | (((0X27&0XFF) << 2) | ((0X27&0X100) << 6)) 9'H027 : pro_config_flash_writedata <= cmd_iowr_d[7:0]; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_WRITESTART //@apireg:software:name WriteStart //@apireg:value:appoint bit-width:1 ; 启动先flash的数据传输，每次8bit，等待的时间与spiclock有关。先writedata，然后启动传输，之后关闭 //@apireg:desc abs-addr:0X88A0; none //@apireg:note reg_hw_name:pro_config_flash_writestart //@apireg:0xaddr 0X8800 | (((0X28&0XFF) << 2) | ((0X28&0X100) << 6)) 9'H028 : pro_config_flash_writestart <= cmd_iowr_d[0:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title AFC_FACTOR_CH_SEL //@apireg:software:name afc_factor_ch_sel //@apireg:value:appoint bit-width:2 ; 处理板四通道系数下发选择：（00选通第一通道道 01第二通道 10第三通道 11第四通道） //@apireg:desc abs-addr:0XC9B0; none //@apireg:note reg_hw_name:afc_factor_ch_sel //@apireg:0xaddr 0X8800 | (((0X16C&0XFF) << 2) | ((0X16C&0X100) << 6)) 9'H16C : afc_factor_ch_sel <= cmd_iowr_d[1:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title AFC_FACTOR_WA //@apireg:software:name afc_factor_wa //@apireg:value:appoint bit-width:16 ; 系数地址 //@apireg:desc abs-addr:0XC9B4; none //@apireg:note reg_hw_name:afc_factor_wa //@apireg:0xaddr 0X8800 | (((0X16D&0XFF) << 2) | ((0X16D&0X100) << 6)) 9'H16D : afc_factor_wa <= cmd_iowr_d[15:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title AFC_FACTOR_WD_L //@apireg:software:name afc_factor_wd_L //@apireg:value:appoint bit-width:16 ; 系数低16bit //@apireg:desc abs-addr:0XC9B8; none //@apireg:note reg_hw_name:afc_factor_wd_l //@apireg:0xaddr 0X8800 | (((0X16E&0XFF) << 2) | ((0X16E&0X100) << 6)) 9'H16E : afc_factor_wd_l <= cmd_iowr_d[15:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title AFC_FACTOR_WD_H //@apireg:software:name afc_factor_wd_H //@apireg:value:appoint bit-width:16 ; 系数高bit //@apireg:desc abs-addr:0XC9BC; none //@apireg:note reg_hw_name:afc_factor_wd_h //@apireg:0xaddr 0X8800 | (((0X16F&0XFF) << 2) | ((0X16F&0X100) << 6)) 9'H16F : afc_factor_wd_h <= cmd_iowr_d[15:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title AFC_FACTOR_WEN //@apireg:software:name afc_factor_wen //@apireg:value:appoint bit-width:1 ; 系数写使能 （硬件检测上升沿接收数据） //@apireg:desc abs-addr:0XC9C0; none //@apireg:note reg_hw_name:afc_factor_wen //@apireg:0xaddr 0X8800 | (((0X170&0XFF) << 2) | ((0X170&0X100) << 6)) 9'H170 : afc_factor_wen <= cmd_iowr_d[0:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title INTERP_FACTOR_WA //@apireg:software:name interp_factor_wa //@apireg:value:appoint bit-width:16 ; 系数地址 //@apireg:desc abs-addr:0XC9C4; none //@apireg:note reg_hw_name:interp_factor_wa //@apireg:0xaddr 0X8800 | (((0X171&0XFF) << 2) | ((0X171&0X100) << 6)) 9'H171 : interp_factor_wa <= cmd_iowr_d[15:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title INTERP_FACTOR_WD_L //@apireg:software:name interp_factor_wd_L //@apireg:value:appoint bit-width:16 ; 系数低16bit //@apireg:desc abs-addr:0XC9C8; none //@apireg:note reg_hw_name:interp_factor_wd_l //@apireg:0xaddr 0X8800 | (((0X172&0XFF) << 2) | ((0X172&0X100) << 6)) 9'H172 : interp_factor_wd_l <= cmd_iowr_d[15:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title INTERP_FACTOR_WD_H //@apireg:software:name interp_factor_wd_H //@apireg:value:appoint bit-width:16 ; 系数高bit //@apireg:desc abs-addr:0XC9CC; none //@apireg:note reg_hw_name:interp_factor_wd_h //@apireg:0xaddr 0X8800 | (((0X173&0XFF) << 2) | ((0X173&0X100) << 6)) 9'H173 : interp_factor_wd_h <= cmd_iowr_d[15:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title INTERP_FACTOR_WEN //@apireg:software:name interp_factor_wen //@apireg:value:appoint bit-width:1 ; 系数写使能（硬件检测上升沿接收数据） //@apireg:desc abs-addr:0XC9D0; none //@apireg:note reg_hw_name:interp_factor_wen //@apireg:0xaddr 0X8800 | (((0X174&0XFF) << 2) | ((0X174&0X100) << 6)) 9'H174 : interp_factor_wen <= cmd_iowr_d[0:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title PRO_AFC_EN //@apireg:software:name pro_afc_en //@apireg:value:appoint bit-width:1 ; 幅频校准使能 //@apireg:desc abs-addr:0XC9D4; none //@apireg:note reg_hw_name:pro_afc_en //@apireg:0xaddr 0X8800 | (((0X175&0XFF) << 2) | ((0X175&0X100) << 6)) 9'H175 : pro_afc_en <= cmd_iowr_d[0:0]; //@apireg:group:title FREQ_DETECTION //@apireg:title PRO_INTERP_EN //@apireg:software:name pro_interp_en //@apireg:value:appoint bit-width:1 ; 插值使能 //@apireg:desc abs-addr:0XC9D8; none //@apireg:note reg_hw_name:pro_interp_en //@apireg:0xaddr 0X8800 | (((0X176&0XFF) << 2) | ((0X176&0X100) << 6)) 9'H176 : pro_interp_en <= cmd_iowr_d[0:0]; //@apireg:group:title FifoCtrl //@apireg:title DSP_FIFO_START //@apireg:software:name AcqWriteEnable //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8884; 0->1 上升沿 复位，当该写使能有效并且采集板数据有效， ; 采集板FIFO未满时，采集板FIFO的写使能才有效， ; 每次采集时，先发一次0， ; 再发一次1表明本次采集开始写入FIFO,,,, //@apireg:note reg_hw_name:dsp_fifo_start //@apireg:0xaddr 0X8800 | (((0X21&0XFF) << 2) | ((0X21&0X100) << 6)) 9'H021 : dsp_fifo_start <= cmd_iowr_d[0:0]; //@apireg:group:title FifoCtrl //@apireg:title PRO_FIFO_DEPTH //@apireg:software:name FullProgDepth //@apireg:value:appoint bit-width:16 ; 16bits，num_of_pts //@apireg:desc abs-addr:0X8888; 处理板软件Fifo深度，最大16384， ; 初始化发送值为12288,,,, //@apireg:note reg_hw_name:pro_fifo_depth //@apireg:0xaddr 0X8800 | (((0X22&0XFF) << 2) | ((0X22&0X100) << 6)) 9'H022 : pro_fifo_depth <= cmd_iowr_d[15:0]; //@apireg:group:title FifoCtrl //@apireg:title PARALLEL_FIFO_THRESHOLD //@apireg:software:name ParallelFifoDepth //@apireg:value:appoint bit-width:16 ; 16bit 并行regular fifo可编程满深度 //@apireg:desc abs-addr:0X888C; 默认值为6144,,,, //@apireg:note reg_hw_name:parallel_fifo_threshold //@apireg:0xaddr 0X8800 | (((0X23&0XFF) << 2) | ((0X23&0X100) << 6)) 9'H023 : parallel_fifo_threshold <= cmd_iowr_d[15:0]; //@apireg:group:title Inverter //@apireg:title INVERTER_EN //@apireg:software:name Enable //@apireg:value:appoint bit-width:16 ; 通道反相运算使能，高有效，bit0对应模拟通道0，bit1对应模拟通道1，以此类推 //@apireg:desc abs-addr:0X88A4; none //@apireg:note reg_hw_name:inverter_en //@apireg:0xaddr 0X8800 | (((0X29&0XFF) << 2) | ((0X29&0X100) << 6)) 9'H029 : inverter_en <= cmd_iowr_d[15:0]; //@apireg:group:title IoCtrl //@apireg:title CLK_SOURCE_SELECT //@apireg:software:name clk_source_select //@apireg:value:appoint bit-width:16 ; 外部10m输入选择 //@apireg:desc abs-addr:0XC9E0; none //@apireg:note reg_hw_name:clk_source_select //@apireg:0xaddr 0X8800 | (((0X178&0XFF) << 2) | ((0X178&0X100) << 6)) 9'H178 : clk_source_select <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title V7_AD5668_CTRL_DATA_HIGH //@apireg:software:name AD5668CtrlDataH //@apireg:value:appoint bit-width:16 ; 深机箱用。16bit //@apireg:desc abs-addr:0X88A8; 使能后发送的32位数据的低16位,,,, //@apireg:note reg_hw_name:v7_ad5668_ctrl_data_high //@apireg:0xaddr 0X8800 | (((0X2A&0XFF) << 2) | ((0X2A&0X100) << 6)) 9'H02A : v7_ad5668_ctrl_data_high <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title V7_AD5668_CTRL_DATA_LOW //@apireg:software:name AD5668CtrlDataL //@apireg:value:appoint bit-width:16 ; 深机箱用。16bit，参照手册。包含比较电平的发送 //@apireg:desc abs-addr:0X88AC; 使能后发送的32位数据的高16位,,,, //@apireg:note reg_hw_name:v7_ad5668_ctrl_data_low //@apireg:0xaddr 0X8800 | (((0X2B&0XFF) << 2) | ((0X2B&0X100) << 6)) 9'H02B : v7_ad5668_ctrl_data_low <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title V7_AD5668START //@apireg:software:name AD5668TransStart //@apireg:value:appoint bit-width:16 ; 深机箱用。16bit，为上升沿有效，000：拉低停止传输，111：拉高开始传输 //@apireg:desc abs-addr:0X88B0; 使能后发送32位数据，延迟需要满足通过SPI将32位数据传输完毕，与传输该数据的SPI的Clock有关。先将数据发送给FPGA，然后拉高，延时足够的时间，然后拉低。,,,, //@apireg:note reg_hw_name:v7_ad5668start //@apireg:0xaddr 0X8800 | (((0X2C&0XFF) << 2) | ((0X2C&0X100) << 6)) 9'H02C : v7_ad5668start <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title LA_DECIMATION_H16 //@apireg:software:name DecimationH16 //@apireg:value:appoint bit-width:16 ; 16bit //@apireg:desc abs-addr:0X88B4; 抽取比的高16位，抽取比取值范围为1~10_000_000_000,,,, //@apireg:note reg_hw_name:la_decimation_h16 //@apireg:0xaddr 0X8800 | (((0X2D&0XFF) << 2) | ((0X2D&0X100) << 6)) 9'H02D : la_decimation_h16 <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title LA_DECIMATION_L16 //@apireg:software:name DecimationL16 //@apireg:value:appoint bit-width:16 ; 16bit //@apireg:desc abs-addr:0X88B8; 抽取比的低16位，抽取比取值范围为1~10_000_000_000,,,, //@apireg:note reg_hw_name:la_decimation_l16 //@apireg:0xaddr 0X8800 | (((0X2E&0XFF) << 2) | ((0X2E&0X100) << 6)) 9'H02E : la_decimation_l16 <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title LA_DECIMATION_M16 //@apireg:software:name DecimationM16 //@apireg:value:appoint bit-width:16 ; 16bit //@apireg:desc abs-addr:0X88BC; 抽取比的中16位，抽取比取值范围为1~10_000_000_000,,,, //@apireg:note reg_hw_name:la_decimation_m16 //@apireg:0xaddr 0X8800 | (((0X2F&0XFF) << 2) | ((0X2F&0X100) << 6)) 9'H02F : la_decimation_m16 <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title LA_PROG_FULL_THRESH_HIGH //@apireg:software:name FIFODepthH //@apireg:value:appoint bit-width:16 ; 5bit //@apireg:desc abs-addr:0X88C0; la模块FIFO可编程满深度的高5位，FIFO可编程满深度的最大为1024,,,, //@apireg:note reg_hw_name:la_prog_full_thresh_high //@apireg:0xaddr 0X8800 | (((0X30&0XFF) << 2) | ((0X30&0X100) << 6)) 9'H030 : la_prog_full_thresh_high <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title LA_PROG_FULL_THRESH_LOW //@apireg:software:name FIFODepthL //@apireg:value:appoint bit-width:16 ; 16bit //@apireg:desc abs-addr:0X88C4; la模块FIFO可编程满深度的低16位，FIFO可编程满深度的最大为1024,,,, //@apireg:note reg_hw_name:la_prog_full_thresh_low //@apireg:0xaddr 0X8800 | (((0X31&0XFF) << 2) | ((0X31&0X100) << 6)) 9'H031 : la_prog_full_thresh_low <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title LA_GTX_RDY //@apireg:software:name GtxReady //@apireg:value:appoint bit-width:1 ; 1bit，上升沿有效 //@apireg:desc abs-addr:0X88C8; 初始化时复位一次； 深机箱：控制Iserdese的 bitslip控制信号，高电平有效,,,, //@apireg:note reg_hw_name:la_gtx_rdy //@apireg:0xaddr 0X8800 | (((0X32&0XFF) << 2) | ((0X32&0X100) << 6)) 9'H032 : la_gtx_rdy <= cmd_iowr_d[0:0]; //@apireg:group:title LA //@apireg:title LA_GTX_RESET //@apireg:software:name GtxReset //@apireg:value:appoint bit-width:1 ; 1bit，下降沿有效 //@apireg:desc abs-addr:0X88CC; 初始化时复位一次,,,, //@apireg:note reg_hw_name:la_gtx_reset //@apireg:0xaddr 0X8800 | (((0X33&0XFF) << 2) | ((0X33&0X100) << 6)) 9'H033 : la_gtx_reset <= cmd_iowr_d[0:0]; //@apireg:group:title LA //@apireg:title LA_SAMPLE_MODE //@apireg:software:name InterpolationMode //@apireg:value:appoint bit-width:8 ; 4bit //@apireg:desc abs-addr:0X88D0; 插值模式，固定发送0b1000,,,, //@apireg:note reg_hw_name:la_sample_mode //@apireg:0xaddr 0X8800 | (((0X34&0XFF) << 2) | ((0X34&0X100) << 6)) 9'H034 : la_sample_mode <= cmd_iowr_d[7:0]; //@apireg:group:title LA //@apireg:title LA_DDR_EN //@apireg:software:name IsDDRMode //@apireg:value:appoint bit-width:1 ; 1bit,0为普通存储，1为ddr存储 //@apireg:desc abs-addr:0X88D4; 存储模式选择,,,, //@apireg:note reg_hw_name:la_ddr_en //@apireg:0xaddr 0X8800 | (((0X35&0XFF) << 2) | ((0X35&0X100) << 6)) 9'H035 : la_ddr_en <= cmd_iowr_d[0:0]; //@apireg:group:title LA //@apireg:title V7_LA_EN //@apireg:software:name PowerCtrl //@apireg:value:appoint bit-width:3 ; 深机箱用。3bit，000：断电，111：通电 //@apireg:desc abs-addr:0X88D8; 给LA板子供电，给3块LA板供电，需要同时控制,,,, //@apireg:note reg_hw_name:v7_la_en //@apireg:0xaddr 0X8800 | (((0X36&0XFF) << 2) | ((0X36&0X100) << 6)) 9'H036 : v7_la_en <= cmd_iowr_d[2:0]; //@apireg:group:title LA //@apireg:title LA_SOFT_RESET //@apireg:software:name SoftReset //@apireg:value:appoint bit-width:1 ; 1bit，下降沿有效 //@apireg:desc abs-addr:0X88DC; gt的时钟的复位信号。先复位SoftReset，再复位GtxReset，最后复位GtxReady。SoftReset和GtxReset之间没有延迟时间要求，但需要保证顺序正确，GtxReset和GtxReady之间手册中要求不低于500ns的延迟,,,, //@apireg:note reg_hw_name:la_soft_reset //@apireg:0xaddr 0X8800 | (((0X37&0XFF) << 2) | ((0X37&0X100) << 6)) 9'H037 : la_soft_reset <= cmd_iowr_d[0:0]; //@apireg:group:title LA //@apireg:title LA_TRIG_EDGE_SEL //@apireg:software:name TrigEdgeSel //@apireg:value:appoint bit-width:2 ; 2bit，低位：1：上升沿触发 0：下降沿触发； 高位：1：选择la触发信号，0：选择时域触发信号 //@apireg:desc abs-addr:0X88E0; 边沿触发选择。,,,, //@apireg:note reg_hw_name:la_trig_edge_sel //@apireg:0xaddr 0X8800 | (((0X38&0XFF) << 2) | ((0X38&0X100) << 6)) 9'H038 : la_trig_edge_sel <= cmd_iowr_d[1:0]; //@apireg:group:title LA //@apireg:title LA_TRIG_NUM //@apireg:software:name TrigSourceSel //@apireg:value:appoint bit-width:16 ; 16bit //@apireg:desc abs-addr:0X88E4; LA触发源数据选择，自然数序列，16通道时数据范围为1~16，48路时数据范围为1~48,,,, //@apireg:note reg_hw_name:la_trig_num //@apireg:0xaddr 0X8800 | (((0X39&0XFF) << 2) | ((0X39&0X100) << 6)) 9'H039 : la_trig_num <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_DDR3_UI_RST_N_LA //@apireg:software:name DdrUiReset //@apireg:value:appoint bit-width:1 ; ddr3 ui复位，低有效 //@apireg:desc abs-addr:0X8B48; none //@apireg:note reg_hw_name:pc_ddr3_ui_rst_n_la //@apireg:0xaddr 0X8800 | (((0XD2&0XFF) << 2) | ((0XD2&0X100) << 6)) 9'H0D2 : pc_ddr3_ui_rst_n_la <= cmd_iowr_d[0:0]; //@apireg:group:title LA //@apireg:title PC_DDR3_FIFO_WEN //@apireg:software:name DdrWriteEnable //@apireg:value:appoint bit-width:1 ; ddr3控制器的写使能，1为打开，0为关闭 //@apireg:desc abs-addr:0X8B4C; none //@apireg:note reg_hw_name:pc_ddr3_fifo_wen //@apireg:0xaddr 0X8800 | (((0XD3&0XFF) << 2) | ((0XD3&0X100) << 6)) 9'H0D3 : pc_ddr3_fifo_wen <= cmd_iowr_d[0:0]; //@apireg:group:title LA //@apireg:title PC_WR_ADDR_SEGMENT_H //@apireg:software:name DdrWriteStartAddrH //@apireg:value:appoint bit-width:16 ; 写初始地址高13位 //@apireg:desc abs-addr:0X8B50; none //@apireg:note reg_hw_name:pc_wr_addr_segment_h //@apireg:0xaddr 0X8800 | (((0XD4&0XFF) << 2) | ((0XD4&0X100) << 6)) 9'H0D4 : pc_wr_addr_segment_h <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_WR_ADDR_SEGMENT_L //@apireg:software:name DdrWriteStartAddrL //@apireg:value:appoint bit-width:16 ; 写初始地址低16位 //@apireg:desc abs-addr:0X8B54; none //@apireg:note reg_hw_name:pc_wr_addr_segment_l //@apireg:0xaddr 0X8800 | (((0XD5&0XFF) << 2) | ((0XD5&0X100) << 6)) 9'H0D5 : pc_wr_addr_segment_l <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_WR_CTRL_DEPTH_H //@apireg:software:name DdrWriteAddrLengthH //@apireg:value:appoint bit-width:16 ; 写数据的存储长度高12位 //@apireg:desc abs-addr:0X8B58; none //@apireg:note reg_hw_name:pc_wr_ctrl_depth_h //@apireg:0xaddr 0X8800 | (((0XD6&0XFF) << 2) | ((0XD6&0X100) << 6)) 9'H0D6 : pc_wr_ctrl_depth_h <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_WR_CTRL_DEPTH_L //@apireg:software:name DdrWriteAddrLengthL //@apireg:value:appoint bit-width:16 ; 写数据的存储长度低16位 //@apireg:desc abs-addr:0X8B5C; none //@apireg:note reg_hw_name:pc_wr_ctrl_depth_l //@apireg:0xaddr 0X8800 | (((0XD7&0XFF) << 2) | ((0XD7&0X100) << 6)) 9'H0D7 : pc_wr_ctrl_depth_l <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_WR_PRE_SEPTH_H //@apireg:software:name DdrWritePreDepthH //@apireg:value:appoint bit-width:16 ; 写数据的预触发深度高12位 //@apireg:desc abs-addr:0X8B60; none //@apireg:note reg_hw_name:pc_wr_pre_septh_h //@apireg:0xaddr 0X8800 | (((0XD8&0XFF) << 2) | ((0XD8&0X100) << 6)) 9'H0D8 : pc_wr_pre_septh_h <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_WR_PRE_SEPTH_L //@apireg:software:name DdrWritePreDepthL //@apireg:value:appoint bit-width:16 ; 写数据的预触发深度低16位 //@apireg:desc abs-addr:0X8B64; none //@apireg:note reg_hw_name:pc_wr_pre_septh_l //@apireg:0xaddr 0X8800 | (((0XD9&0XFF) << 2) | ((0XD9&0X100) << 6)) 9'H0D9 : pc_wr_pre_septh_l <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_DDR3_REN_LA //@apireg:software:name DdrReadEnable //@apireg:value:appoint bit-width:1 ; ddr3控制器的读使能，1为打开，0为关闭 //@apireg:desc abs-addr:0X8B68; none //@apireg:note reg_hw_name:pc_ddr3_ren_la //@apireg:0xaddr 0X8800 | (((0XDA&0XFF) << 2) | ((0XDA&0X100) << 6)) 9'H0DA : pc_ddr3_ren_la <= cmd_iowr_d[0:0]; //@apireg:group:title LA //@apireg:title PC_RD_LENGTH_H //@apireg:software:name DdrReadAddrLengthH //@apireg:value:appoint bit-width:16 ; 读数据地址个数高12位 //@apireg:desc abs-addr:0X8B6C; none //@apireg:note reg_hw_name:pc_rd_length_h //@apireg:0xaddr 0X8800 | (((0XDB&0XFF) << 2) | ((0XDB&0X100) << 6)) 9'H0DB : pc_rd_length_h <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_RD_LENGTH_L //@apireg:software:name DdrReadAddrLengthL //@apireg:value:appoint bit-width:16 ; 读数据地址个数低16位 //@apireg:desc abs-addr:0X8B70; none //@apireg:note reg_hw_name:pc_rd_length_l //@apireg:0xaddr 0X8800 | (((0XDC&0XFF) << 2) | ((0XDC&0X100) << 6)) 9'H0DC : pc_rd_length_l <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_RD_BEGIN_ADDR_H //@apireg:software:name DdrReadBeginAddrH //@apireg:value:appoint bit-width:16 ; 读数据地址中的第一个地址高13位（可能是从数据存储段的中间开始读） //@apireg:desc abs-addr:0X8B74; none //@apireg:note reg_hw_name:pc_rd_begin_addr_h //@apireg:0xaddr 0X8800 | (((0XDD&0XFF) << 2) | ((0XDD&0X100) << 6)) 9'H0DD : pc_rd_begin_addr_h <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_RD_BEGIN_ADDR_L //@apireg:software:name DdrReadBeginAddL //@apireg:value:appoint bit-width:16 ; 读数据地址中的第一个地址低16位（可能是从数据存储段的中间开始读） //@apireg:desc abs-addr:0X8B78; none //@apireg:note reg_hw_name:pc_rd_begin_addr_l //@apireg:0xaddr 0X8800 | (((0XDE&0XFF) << 2) | ((0XDE&0X100) << 6)) 9'H0DE : pc_rd_begin_addr_l <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_RD_SEGMENT_BEGIN_ADDR_H //@apireg:software:name DdrSegmentStartAddrH //@apireg:value:appoint bit-width:16 ; 读数据对应存储段的起始地址高13位 //@apireg:desc abs-addr:0X8B7C; none //@apireg:note reg_hw_name:pc_rd_segment_begin_addr_h //@apireg:0xaddr 0X8800 | (((0XDF&0XFF) << 2) | ((0XDF&0X100) << 6)) 9'H0DF : pc_rd_segment_begin_addr_h <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_RD_SEGMENT_BEGIN_ADDR_L //@apireg:software:name DdrSegmentStartAddrL //@apireg:value:appoint bit-width:16 ; 读数据对应存储段的起始地址低16位 //@apireg:desc abs-addr:0X8B80; none //@apireg:note reg_hw_name:pc_rd_segment_begin_addr_l //@apireg:0xaddr 0X8800 | (((0XE0&0XFF) << 2) | ((0XE0&0X100) << 6)) 9'H0E0 : pc_rd_segment_begin_addr_l <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_RD_CTRL_DEPTH_H //@apireg:software:name DdrSegmentAddrLengthH //@apireg:value:appoint bit-width:16 ; 读数据对应存储段的存储深度高12位 //@apireg:desc abs-addr:0X8B84; none //@apireg:note reg_hw_name:pc_rd_ctrl_depth_h //@apireg:0xaddr 0X8800 | (((0XE1&0XFF) << 2) | ((0XE1&0X100) << 6)) 9'H0E1 : pc_rd_ctrl_depth_h <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_RD_CTRL_DEPTH_L //@apireg:software:name DdrSegmentAddrLengthL //@apireg:value:appoint bit-width:16 ; 读数据对应存储段的存储深度低16位 //@apireg:desc abs-addr:0X8B88; none //@apireg:note reg_hw_name:pc_rd_ctrl_depth_l //@apireg:0xaddr 0X8800 | (((0XE2&0XFF) << 2) | ((0XE2&0X100) << 6)) 9'H0E2 : pc_rd_ctrl_depth_l <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_MIG_SYS_RST_N //@apireg:software:name DdrMigReset //@apireg:value:appoint bit-width:1 ; ddr3 mig复位，低有效 //@apireg:desc abs-addr:0X8B98; none //@apireg:note reg_hw_name:pc_mig_sys_rst_n //@apireg:0xaddr 0X8800 | (((0XE6&0XFF) << 2) | ((0XE6&0X100) << 6)) 9'H0E6 : pc_mig_sys_rst_n <= cmd_iowr_d[0:0]; //@apireg:group:title LA //@apireg:title LA_DDR3_PK_DECIMATION //@apireg:software:name DdrPkDecimationHd //@apireg:value:appoint bit-width:16 ; ddr3 后抽抽取比高16位 //@apireg:desc abs-addr:0X8B9C; none //@apireg:note reg_hw_name:la_ddr3_pk_decimation //@apireg:0xaddr 0X8800 | (((0XE7&0XFF) << 2) | ((0XE7&0X100) << 6)) 9'H0E7 : la_ddr3_pk_decimation <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title LA_DDR3_PK_MODE //@apireg:software:name DdrPkMode //@apireg:value:appoint bit-width:16 ; ddr3 后抽抽取比低16位 //@apireg:desc abs-addr:0X8BA0; none //@apireg:note reg_hw_name:la_ddr3_pk_mode //@apireg:0xaddr 0X8800 | (((0XE8&0XFF) << 2) | ((0XE8&0X100) << 6)) 9'H0E8 : la_ddr3_pk_mode <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title LA_GTRXCDRHOLD //@apireg:software:name GTRXCDRHOLD //@apireg:value:appoint bit-width:1 ; 1bit，界面可控，初始值0；la数据稳定后，可在界面上设置为1 //@apireg:desc abs-addr:0XC960; 初始化时复位一次,,,, //@apireg:note reg_hw_name:la_gtrxcdrhold //@apireg:0xaddr 0X8800 | (((0X158&0XFF) << 2) | ((0X158&0X100) << 6)) 9'H158 : la_gtrxcdrhold <= cmd_iowr_d[0:0]; //@apireg:group:title LA //@apireg:title SOFT_NORMAL_DISCARD_NUM //@apireg:software:name SoftNormalDiscardNum //@apireg:value:appoint bit-width:8 ; 时域一级触发软件丢点值 //@apireg:desc abs-addr:0XC97C; none //@apireg:note reg_hw_name:soft_normal_discard_num //@apireg:0xaddr 0X8800 | (((0X15F&0XFF) << 2) | ((0X15F&0X100) << 6)) 9'H15F : soft_normal_discard_num <= cmd_iowr_d[7:0]; //@apireg:group:title LA //@apireg:title INTER_MULTIPLE //@apireg:software:name InterMultiple //@apireg:value:appoint bit-width:9 ; 插值倍数 //@apireg:desc abs-addr:0XC980; none //@apireg:note reg_hw_name:inter_multiple //@apireg:0xaddr 0X8800 | (((0X160&0XFF) << 2) | ((0X160&0X100) << 6)) 9'H160 : inter_multiple <= cmd_iowr_d[8:0]; //@apireg:group:title LA //@apireg:title NORMAL_INTERPOLATION_SET //@apireg:software:name NormalInterpolationSet //@apireg:value:appoint bit-width:3 ; 是否为插值档 1：插值；0：非插值 //@apireg:desc abs-addr:0XC984; none //@apireg:note reg_hw_name:normal_interpolation_set //@apireg:0xaddr 0X8800 | (((0X161&0XFF) << 2) | ((0X161&0X100) << 6)) 9'H161 : normal_interpolation_set <= cmd_iowr_d[2:0]; //@apireg:group:title LA //@apireg:title TRIG_MODULE_LA_TRIG_PREDEPTH_SET_H16 //@apireg:software:name LaTrigPredepthSetH //@apireg:value:appoint bit-width:16 ; la一级预触发深度高16bit //@apireg:desc abs-addr:0XC988; none //@apireg:note reg_hw_name:trig_module_la_trig_predepth_set_h16 //@apireg:0xaddr 0X8800 | (((0X162&0XFF) << 2) | ((0X162&0X100) << 6)) 9'H162 : trig_module_la_trig_predepth_set_h16 <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title TRIG_MODULE_LA_TRIG_PREDEPTH_SET_L16 //@apireg:software:name LaTrigPredepthSetL //@apireg:value:appoint bit-width:16 ; la一级预触发深度低16bit //@apireg:desc abs-addr:0XC98C; none //@apireg:note reg_hw_name:trig_module_la_trig_predepth_set_l16 //@apireg:0xaddr 0X8800 | (((0X163&0XFF) << 2) | ((0X163&0X100) << 6)) 9'H163 : trig_module_la_trig_predepth_set_l16 <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title TRIG_MODULE_LA_TRIG_PREDEPTH_SET_M16 //@apireg:software:name LaTrigPredepthSetM //@apireg:value:appoint bit-width:16 ; la一级预触发深度中16bit //@apireg:desc abs-addr:0XC990; none //@apireg:note reg_hw_name:trig_module_la_trig_predepth_set_m16 //@apireg:0xaddr 0X8800 | (((0X164&0XFF) << 2) | ((0X164&0X100) << 6)) 9'H164 : trig_module_la_trig_predepth_set_m16 <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title LA_POST_INTER_EN //@apireg:software:name la_post_inter_en_dbi20g //@apireg:value:appoint bit-width:1 ; la插值使能 1：开 ;0：关 //@apireg:desc abs-addr:0XC994; none //@apireg:note reg_hw_name:la_post_inter_en //@apireg:0xaddr 0X8800 | (((0X165&0XFF) << 2) | ((0X165&0X100) << 6)) 9'H165 : la_post_inter_en <= cmd_iowr_d[0:0]; //@apireg:group:title LA //@apireg:title PC_WR_POS_DEPTH_H //@apireg:software:name DdrWritePosDepthH //@apireg:value:appoint bit-width:16 ; 写数据的后触发深度高16位 //@apireg:desc abs-addr:0XC998; none //@apireg:note reg_hw_name:pc_wr_pos_depth_h //@apireg:0xaddr 0X8800 | (((0X166&0XFF) << 2) | ((0X166&0X100) << 6)) 9'H166 : pc_wr_pos_depth_h <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_WR_POS_DEPTH_L //@apireg:software:name DdrWritePosDepthL //@apireg:value:appoint bit-width:16 ; 写数据的后触发深度低16位 //@apireg:desc abs-addr:0XC99C; none //@apireg:note reg_hw_name:pc_wr_pos_depth_l //@apireg:0xaddr 0X8800 | (((0X167&0XFF) << 2) | ((0X167&0X100) << 6)) 9'H167 : pc_wr_pos_depth_l <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_FINE_H16 //@apireg:software:name PcFineH //@apireg:value:appoint bit-width:16 ; ms2g：0.1浮点数下发高16位 //@apireg:desc abs-addr:0XC9A0; none //@apireg:note reg_hw_name:pc_fine_h16 //@apireg:0xaddr 0X8800 | (((0X168&0XFF) << 2) | ((0X168&0X100) << 6)) 9'H168 : pc_fine_h16 <= cmd_iowr_d[15:0]; //@apireg:group:title LA //@apireg:title PC_FINE_L16 //@apireg:software:name PcFineL //@apireg:value:appoint bit-width:16 ; ms2g：0.1浮点数下发低16位 //@apireg:desc abs-addr:0XC9A4; none //@apireg:note reg_hw_name:pc_fine_l16 //@apireg:0xaddr 0X8800 | (((0X169&0XFF) << 2) | ((0X169&0X100) << 6)) 9'H169 : pc_fine_l16 <= cmd_iowr_d[15:0]; //@apireg:group:title LSCtrl //@apireg:title DDR_FAST_TRANS_CH_SEL //@apireg:software:name FastChSelect //@apireg:value:appoint bit-width:8 ; 快传选择要传输的数据模拟通道，0对于ch1,1对于ch2，以此类推 //@apireg:desc abs-addr:0X88E8; none //@apireg:note reg_hw_name:ddr_fast_trans_ch_sel //@apireg:0xaddr 0X8800 | (((0X3A&0XFF) << 2) | ((0X3A&0X100) << 6)) 9'H03A : ddr_fast_trans_ch_sel <= cmd_iowr_d[7:0]; //@apireg:group:title LSCtrl //@apireg:title FAST_EN //@apireg:software:name Enable //@apireg:value:appoint bit-width:1 ; 1bit，0：normal，1：ddr //@apireg:desc abs-addr:0X88EC; ddr模式开关 ，0为普通模式，1为ddr模式,,,, //@apireg:note reg_hw_name:fast_en //@apireg:0xaddr 0X8800 | (((0X3B&0XFF) << 2) | ((0X3B&0X100) << 6)) 9'H03B : fast_en <= cmd_iowr_d[0:0]; //@apireg:group:title LSCtrl //@apireg:title PC_DDR_PRO_FAST_TRANS_EN //@apireg:software:name pc_ddr_pro_fast_trans_en //@apireg:value:appoint bit-width:1 ; 1bit,1:active //@apireg:desc abs-addr:0X88F0; 发1选择处理板快速传输链路，用于传原始采样点、波形搜索结果、触发地址,,,, //@apireg:note reg_hw_name:pc_ddr_pro_fast_trans_en //@apireg:0xaddr 0X8800 | (((0X3C&0XFF) << 2) | ((0X3C&0X100) << 6)) 9'H03C : pc_ddr_pro_fast_trans_en <= cmd_iowr_d[0:0]; //@apireg:group:title FIFO //@apireg:title PRO_DATA_FD_FIFO_EMPTY_THRESH //@apireg:software:name FIFOProgEmptyThresh //@apireg:value:appoint bit-width:14 ; 14bits,与stft步进有关 //@apireg:desc abs-addr:0X88F4; none //@apireg:note reg_hw_name:pro_data_fd_fifo_empty_thresh //@apireg:0xaddr 0X8800 | (((0X3D&0XFF) << 2) | ((0X3D&0X100) << 6)) 9'H03D : pro_data_fd_fifo_empty_thresh <= cmd_iowr_d[13:0]; //@apireg:group:title FIFO //@apireg:title PRO_DATA_FD_FIFO_FULL_THRESH //@apireg:software:name FIFOProgFullThresh //@apireg:value:appoint bit-width:14 ; 14bits,最大16384 //@apireg:desc abs-addr:0X88F8; none //@apireg:note reg_hw_name:pro_data_fd_fifo_full_thresh //@apireg:0xaddr 0X8800 | (((0X3E&0XFF) << 2) | ((0X3E&0X100) << 6)) 9'H03E : pro_data_fd_fifo_full_thresh <= cmd_iowr_d[13:0]; //@apireg:group:title STFT //@apireg:title MD8G_PRO_DATA_CHOOSE //@apireg:software:name DataChoose //@apireg:value:appoint bit-width:8 ; 4bit,bit3表示频域或时域数据选择，0表示时域，1表示频域；bit2-0表示选择模拟通道 //@apireg:desc abs-addr:0X88FC; none //@apireg:note reg_hw_name:md8g_pro_data_choose //@apireg:0xaddr 0X8800 | (((0X3F&0XFF) << 2) | ((0X3F&0X100) << 6)) 9'H03F : md8g_pro_data_choose <= cmd_iowr_d[7:0]; //@apireg:group:title STFT //@apireg:title COEFFICIENT_DATAIN_H16 //@apireg:software:name CoefficientDataInH16 //@apireg:value:appoint bit-width:16 ; 16bits,窗函数系数高16位 //@apireg:desc abs-addr:0X8900; none //@apireg:note reg_hw_name:coefficient_datain_h16 //@apireg:0xaddr 0X8800 | (((0X40&0XFF) << 2) | ((0X40&0X100) << 6)) 9'H040 : coefficient_datain_h16 <= cmd_iowr_d[15:0]; //@apireg:group:title STFT //@apireg:title COEFFICIENT_DATAIN_L16 //@apireg:software:name CoefficientDataInL16 //@apireg:value:appoint bit-width:16 ; 16bits,窗函数系数低16位 //@apireg:desc abs-addr:0X8904; none //@apireg:note reg_hw_name:coefficient_datain_l16 //@apireg:0xaddr 0X8800 | (((0X41&0XFF) << 2) | ((0X41&0X100) << 6)) 9'H041 : coefficient_datain_l16 <= cmd_iowr_d[15:0]; //@apireg:group:title STFT //@apireg:title COEFFICIENT_DATA_WREN //@apireg:software:name CoefficientDataWREN //@apireg:value:appoint bit-width:1 ; 1bit,窗函数写使能 //@apireg:desc abs-addr:0X8908; none //@apireg:note reg_hw_name:coefficient_data_wren //@apireg:0xaddr 0X8800 | (((0X42&0XFF) << 2) | ((0X42&0X100) << 6)) 9'H042 : coefficient_data_wren <= cmd_iowr_d[0:0]; //@apireg:group:title STFT //@apireg:title FFT_CONFIG_START //@apireg:software:name FFTConfigStart //@apireg:value:appoint bit-width:1 ; 1bit, fft核开始配置 //@apireg:desc abs-addr:0X890C; none //@apireg:note reg_hw_name:fft_config_start //@apireg:0xaddr 0X8800 | (((0X43&0XFF) << 2) | ((0X43&0X100) << 6)) 9'H043 : fft_config_start <= cmd_iowr_d[0:0]; //@apireg:group:title STFT //@apireg:title FFT_PARAM_DIR //@apireg:software:name FFTParamDir //@apireg:value:appoint bit-width:1 ; 1bit,为1时选择fft，为0时选择ifft //@apireg:desc abs-addr:0X8910; none //@apireg:note reg_hw_name:fft_param_dir //@apireg:0xaddr 0X8800 | (((0X44&0XFF) << 2) | ((0X44&0X100) << 6)) 9'H044 : fft_param_dir <= cmd_iowr_d[0:0]; //@apireg:group:title STFT //@apireg:title FFT_PARAM_NFFT //@apireg:software:name FFTParamNFFT //@apireg:value:appoint bit-width:5 ; 5bits,配置fft核的nfft，0~16；需和fft点数相对应 //@apireg:desc abs-addr:0X8914; none //@apireg:note reg_hw_name:fft_param_nfft //@apireg:0xaddr 0X8800 | (((0X45&0XFF) << 2) | ((0X45&0X100) << 6)) 9'H045 : fft_param_nfft <= cmd_iowr_d[4:0]; //@apireg:group:title STFT //@apireg:title FFT_PARAM_POINTNUM //@apireg:software:name FFTParamPointNum //@apireg:value:appoint bit-width:14 ; 11bits,fft单轮运算点数 //@apireg:desc abs-addr:0X8918; none //@apireg:note reg_hw_name:fft_param_pointnum //@apireg:0xaddr 0X8800 | (((0X46&0XFF) << 2) | ((0X46&0X100) << 6)) 9'H046 : fft_param_pointnum <= cmd_iowr_d[13:0]; //@apireg:group:title STFT //@apireg:title FFT_PARAM_SCALESCH //@apireg:software:name FFTParamScaleSCH //@apireg:value:appoint bit-width:16 ; 10bits,配置数据缩放比例;1024个点，radix-4，一共5级，每级2bit //@apireg:desc abs-addr:0X891C; none //@apireg:note reg_hw_name:fft_param_scalesch //@apireg:0xaddr 0X8800 | (((0X47&0XFF) << 2) | ((0X47&0X100) << 6)) 9'H047 : fft_param_scalesch <= cmd_iowr_d[15:0]; //@apireg:group:title STFT //@apireg:title FFT_TIMES //@apireg:software:name FFTTimes //@apireg:value:appoint bit-width:8 ; 8bits,设置fft运算次数，最大为256 //@apireg:desc abs-addr:0X8920; none //@apireg:note reg_hw_name:fft_times //@apireg:0xaddr 0X8800 | (((0X48&0XFF) << 2) | ((0X48&0X100) << 6)) 9'H048 : fft_times <= cmd_iowr_d[7:0]; //@apireg:group:title STFT //@apireg:title STFT_CALC_START //@apireg:software:name STFTCalcStart //@apireg:value:appoint bit-width:1 ; 1bit,fft开始运算 //@apireg:desc abs-addr:0X8924; none //@apireg:note reg_hw_name:stft_calc_start //@apireg:0xaddr 0X8800 | (((0X49&0XFF) << 2) | ((0X49&0X100) << 6)) 9'H049 : stft_calc_start <= cmd_iowr_d[0:0]; //@apireg:group:title STFT //@apireg:title STFT_DATA_SELECT //@apireg:software:name STFTDataSelect //@apireg:value:appoint bit-width:4 ; 4bits,4'b0001:输入数据直接输出；4'b0010:fft处理后的im&re；4'b0100:fft处理后的amp&pha；4'b1000:输入数据i/q的amp&pha //@apireg:desc abs-addr:0X8928; none //@apireg:note reg_hw_name:stft_data_select //@apireg:0xaddr 0X8800 | (((0X4A&0XFF) << 2) | ((0X4A&0X100) << 6)) 9'H04A : stft_data_select <= cmd_iowr_d[3:0]; //@apireg:group:title STFT //@apireg:title STFT_STEP //@apireg:software:name STFTStep //@apireg:value:appoint bit-width:14 ; 7bits,设置fft运算的步进 //@apireg:desc abs-addr:0X892C; none //@apireg:note reg_hw_name:stft_step //@apireg:0xaddr 0X8800 | (((0X4B&0XFF) << 2) | ((0X4B&0X100) << 6)) 9'H04B : stft_step <= cmd_iowr_d[13:0]; //@apireg:group:title PowerManager //@apireg:title ACQBOARDPOWERCTRL //@apireg:software:name AcqBoardPowerCtrl //@apireg:value:appoint bit-width:8 ; bit0：cpci1_power_load_en ; bit1：cpci1_fpga_load_en ; bit2：cpci2_power_load_en ; bit3：cpci2_fpga_load_en ; bit4：cpci3_power_load_en ; bit5：cpci3_fpga_load_en ; bit6：cpci4_power_load_en ; bit7：cpci4_fpga_load_en //@apireg:desc abs-addr:0X8930; 00 断电, FF上电,,,, //@apireg:note reg_hw_name:acqboardpowerctrl //@apireg:0xaddr 0X8800 | (((0X4C&0XFF) << 2) | ((0X4C&0X100) << 6)) 9'H04C : acqboardpowerctrl <= cmd_iowr_d[7:0]; //@apireg:group:title RegMonitor //@apireg:title PRO_READ_WREG_ADDR //@apireg:software:name RegAddress //@apireg:value:appoint bit-width:16 ; read back write-register //@apireg:desc abs-addr:0X8934; 读回下发寄存器的值,,,, //@apireg:note reg_hw_name:pro_read_wreg_addr //@apireg:0xaddr 0X8800 | (((0X4D&0XFF) << 2) | ((0X4D&0X100) << 6)) 9'H04D : pro_read_wreg_addr <= cmd_iowr_d[15:0]; //@apireg:group:title Scan //@apireg:title SCAN_DATACOUNT_LATCH //@apireg:software:name DatacountLatch //@apireg:value:appoint bit-width:1 ; 0：关闭锁存 ; 1: 开启锁存 //@apireg:desc abs-addr:0X8938; 在上升沿进行数据计数值锁存,,,, //@apireg:note reg_hw_name:scan_datacount_latch //@apireg:0xaddr 0X8800 | (((0X4E&0XFF) << 2) | ((0X4E&0X100) << 6)) 9'H04E : scan_datacount_latch <= cmd_iowr_d[0:0]; //@apireg:group:title Scan //@apireg:title SCAN_DATACOUNT_PASSBACK //@apireg:software:name DatacountPassback //@apireg:value:appoint bit-width:15 ; 15bit : 开启读使能标志 ; 低14bit：返回用于决定读取个数的当前datacount值 //@apireg:desc abs-addr:0X893C; 开启使能标志上升沿作为开启softfifo的ren标志,,,, //@apireg:note reg_hw_name:scan_datacount_passback //@apireg:0xaddr 0X8800 | (((0X4F&0XFF) << 2) | ((0X4F&0X100) << 6)) 9'H04F : scan_datacount_passback <= cmd_iowr_d[14:0]; //@apireg:group:title Scan //@apireg:title PRO_SCAN_ENABLE //@apireg:software:name ProScanEnable //@apireg:value:appoint bit-width:1 ; 0:正常采集板传输模式 ; 1：scan模式开启 //@apireg:desc abs-addr:0X8940; none //@apireg:note reg_hw_name:pro_scan_enable //@apireg:0xaddr 0X8800 | (((0X50&0XFF) << 2) | ((0X50&0X100) << 6)) 9'H050 : pro_scan_enable <= cmd_iowr_d[0:0]; //@apireg:group:title SerdesSync //@apireg:title PRO_ISERDES_SCAN_LENGTH //@apireg:software:name pro_iserdes_scan_length //@apireg:value:appoint bit-width:8 ; idelay的扫窗长度，扫窗确定合适延迟值后，需要达到扫窗长度的次数后才能确定改值有效，输出同步完成信号 //@apireg:desc abs-addr:0X8944; none //@apireg:note reg_hw_name:pro_iserdes_scan_length //@apireg:0xaddr 0X8800 | (((0X51&0XFF) << 2) | ((0X51&0X100) << 6)) 9'H051 : pro_iserdes_scan_length <= cmd_iowr_d[7:0]; //@apireg:group:title SerdesSync //@apireg:title PRO_ISERDES_SYNC_EN //@apireg:software:name pro_iserdes_sync_en //@apireg:value:appoint bit-width:1 ; 处理板iserdes开始同步使能，边沿有效，上升沿开始同步，下降沿结束同步 //@apireg:desc abs-addr:0X8948; 板间通信同步使能，边沿有效,,,, //@apireg:note reg_hw_name:pro_iserdes_sync_en //@apireg:0xaddr 0X8800 | (((0X52&0XFF) << 2) | ((0X52&0X100) << 6)) 9'H052 : pro_iserdes_sync_en <= cmd_iowr_d[0:0]; //@apireg:group:title SerdesSync //@apireg:title PRO_ISERDES_TAP_START //@apireg:software:name pro_iserdes_TAP_start //@apireg:value:appoint bit-width:5 ; idelay的扫窗延迟最小值 //@apireg:desc abs-addr:0X894C; none //@apireg:note reg_hw_name:pro_iserdes_tap_start //@apireg:0xaddr 0X8800 | (((0X53&0XFF) << 2) | ((0X53&0X100) << 6)) 9'H053 : pro_iserdes_tap_start <= cmd_iowr_d[4:0]; //@apireg:group:title SerdesSync //@apireg:title PRO_ISERDES_TAP_STOP //@apireg:software:name pro_iserdes_TAP_stop //@apireg:value:appoint bit-width:5 ; idelay的扫窗延迟最大值 //@apireg:desc abs-addr:0X8950; none //@apireg:note reg_hw_name:pro_iserdes_tap_stop //@apireg:0xaddr 0X8800 | (((0X54&0XFF) << 2) | ((0X54&0X100) << 6)) 9'H054 : pro_iserdes_tap_stop <= cmd_iowr_d[4:0]; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_IN_DELAY_DATA_CE1 //@apireg:software:name CE1 //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8954; 上升沿使能IDelay模块的increment/decrement输入， ; 当IN_DELAY_RESET有效时，该使能无效,,,, //@apireg:note reg_hw_name:pro_in_delay_data_ce1 //@apireg:0xaddr 0X8800 | (((0X55&0XFF) << 2) | ((0X55&0X100) << 6)) 9'H055 : pro_in_delay_data_ce1 <= cmd_iowr_d[0:0]; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_IN_DELAY_DATA_CE3 //@apireg:software:name CE3 //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8958; 上升沿使能IDelay模块的increment/decrement输入， ; 当IN_DELAY_RESET有效时，该使能无效,,,, //@apireg:note reg_hw_name:pro_in_delay_data_ce3 //@apireg:0xaddr 0X8800 | (((0X56&0XFF) << 2) | ((0X56&0X100) << 6)) 9'H056 : pro_in_delay_data_ce3 <= cmd_iowr_d[0:0]; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_IN_DELAY_DATA_CE5 //@apireg:software:name CE5 //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X895C; 上升沿使能IDelay模块的increment/decrement输入， ; 当IN_DELAY_RESET有效时，该使能无效,,,, //@apireg:note reg_hw_name:pro_in_delay_data_ce5 //@apireg:0xaddr 0X8800 | (((0X57&0XFF) << 2) | ((0X57&0X100) << 6)) 9'H057 : pro_in_delay_data_ce5 <= cmd_iowr_d[0:0]; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_IN_DELAY_DATA_CE7 //@apireg:software:name CE7 //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8960; 上升沿使能IDelay模块的increment/decrement输入， ; 当IN_DELAY_RESET有效时，该使能无效,,,, //@apireg:note reg_hw_name:pro_in_delay_data_ce7 //@apireg:0xaddr 0X8800 | (((0X58&0XFF) << 2) | ((0X58&0X100) << 6)) 9'H058 : pro_in_delay_data_ce7 <= cmd_iowr_d[0:0]; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_CNTVALUEIN1 //@apireg:software:name Count1 //@apireg:value:appoint bit-width:5 ; 5bits，value_of_delay //@apireg:desc abs-addr:0X8964; 延迟量设置，最大为31， ; 延迟量等于设置值×78ps,,,, //@apireg:note reg_hw_name:pro_cntvaluein1 //@apireg:0xaddr 0X8800 | (((0X59&0XFF) << 2) | ((0X59&0X100) << 6)) 9'H059 : pro_cntvaluein1 <= cmd_iowr_d[4:0]; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_CNTVALUEIN3 //@apireg:software:name Count3 //@apireg:value:appoint bit-width:5 ; 5bits，value_of_delay //@apireg:desc abs-addr:0X8968; 延迟量设置，最大为31， ; 延迟量等于设置值×78ps,,,, //@apireg:note reg_hw_name:pro_cntvaluein3 //@apireg:0xaddr 0X8800 | (((0X5A&0XFF) << 2) | ((0X5A&0X100) << 6)) 9'H05A : pro_cntvaluein3 <= cmd_iowr_d[4:0]; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_CNTVALUEIN5 //@apireg:software:name Count5 //@apireg:value:appoint bit-width:5 ; 5bits，value_of_delay //@apireg:desc abs-addr:0X896C; 延迟量设置，最大为31， ; 延迟量等于设置值×78ps,,,, //@apireg:note reg_hw_name:pro_cntvaluein5 //@apireg:0xaddr 0X8800 | (((0X5B&0XFF) << 2) | ((0X5B&0X100) << 6)) 9'H05B : pro_cntvaluein5 <= cmd_iowr_d[4:0]; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_CNTVALUEIN7 //@apireg:software:name Count7 //@apireg:value:appoint bit-width:5 ; 5bits，value_of_delay //@apireg:desc abs-addr:0X8970; 延迟量设置，最大为31， ; 延迟量等于设置值×78ps,,,, //@apireg:note reg_hw_name:pro_cntvaluein7 //@apireg:0xaddr 0X8800 | (((0X5C&0XFF) << 2) | ((0X5C&0X100) << 6)) 9'H05C : pro_cntvaluein7 <= cmd_iowr_d[4:0]; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_DATA_RX_IO_RESET //@apireg:software:name RxIOReset //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8974; IDelaycCrl模块复位，高电平复位， ; 初始化时复位一次,,,, //@apireg:note reg_hw_name:pro_data_rx_io_reset //@apireg:0xaddr 0X8800 | (((0X5D&0XFF) << 2) | ((0X5D&0X100) << 6)) 9'H05D : pro_data_rx_io_reset <= cmd_iowr_d[0:0]; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_IN_DELAY_RESET //@apireg:software:name SetEffect //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8978; 拉高生效.先设置数据，然后拉高生效。,,,, //@apireg:note reg_hw_name:pro_in_delay_reset //@apireg:0xaddr 0X8800 | (((0X5E&0XFF) << 2) | ((0X5E&0X100) << 6)) 9'H05E : pro_in_delay_reset <= cmd_iowr_d[0:0]; //@apireg:group:title SysInfo //@apireg:title PRO_REG_READ_BACK //@apireg:software:name WorkOKTest //@apireg:value:appoint bit-width:16 ; 16bits_data //@apireg:desc abs-addr:0XCBF8; SPI写数据（共24bit，分高低位） 低8位,,,, //@apireg:note reg_hw_name:pro_reg_read_back //@apireg:0xaddr 0X8800 | (((0X1FE&0XFF) << 2) | ((0X1FE&0X100) << 6)) 9'H1FE : pro_reg_read_back <= cmd_iowr_d[15:0]; //@apireg:group:title SysMon //@apireg:title PRO_SYSMON_RST //@apireg:software:name pro_sysmon_rst //@apireg:value:appoint bit-width:1 ; 系统检测模块复位，1bit，高有效 //@apireg:desc abs-addr:0X897C; none //@apireg:note reg_hw_name:pro_sysmon_rst //@apireg:0xaddr 0X8800 | (((0X5F&0XFF) << 2) | ((0X5F&0X100) << 6)) 9'H05F : pro_sysmon_rst <= cmd_iowr_d[0:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_AUTO_EN //@apireg:software:name AutoModeEnable //@apireg:value:appoint bit-width:16 ; 1bit 1：auto triger，0： single triger //@apireg:desc abs-addr:0X8980; 是否选择了自动触发模式， ; 当一定时间内没有产生触发时， ; 屏幕强制产生触发信号，刷新波形,,,, //@apireg:note reg_hw_name:trig_module_trig_auto_en //@apireg:0xaddr 0X8800 | (((0X60&0XFF) << 2) | ((0X60&0X100) << 6)) 9'H060 : trig_module_trig_auto_en <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_CALI_VALUE //@apireg:software:name CalibrationNum //@apireg:value:appoint bit-width:8 ; 8bits //@apireg:desc abs-addr:0X8984; 校正参数，设定的校正时间，触发信号到来之后继续 ; 读FIFO，用于修正实际触发点的固定偏移,,,, //@apireg:note reg_hw_name:trig_module_trig_cali_value //@apireg:0xaddr 0X8800 | (((0X61&0XFF) << 2) | ((0X61&0X100) << 6)) 9'H061 : trig_module_trig_cali_value <= cmd_iowr_d[7:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_CALI_TRIG_DELAY_EN //@apireg:software:name CaliTrigDelayEnable //@apireg:value:appoint bit-width:1 ; 1bit 1：calibrate 0：off //@apireg:desc abs-addr:0X8988; 校正参数使能，当使能有效时，修正数才起作用,,,, //@apireg:note reg_hw_name:trig_module_cali_trig_delay_en //@apireg:0xaddr 0X8800 | (((0X62&0XFF) << 2) | ((0X62&0X100) << 6)) 9'H062 : trig_module_cali_trig_delay_en <= cmd_iowr_d[0:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRI_FORCE //@apireg:software:name ForceTrigEnable //@apireg:value:appoint bit-width:1 ; 1bit 1：force triger 高有效 //@apireg:desc abs-addr:0X898C; 无论是否产生触发，都输出一个强制触发信号， ; 显示一帧波形,,,, //@apireg:note reg_hw_name:trig_module_tri_force //@apireg:0xaddr 0X8800 | (((0X63&0XFF) << 2) | ((0X63&0X100) << 6)) 9'H063 : trig_module_tri_force <= cmd_iowr_d[0:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRI_HOLDOFF_TIME_H16 //@apireg:software:name HoldOffTimeH //@apireg:value:appoint bit-width:16 ; 16bits 1：[31:16] //@apireg:desc abs-addr:0X8990; 触发释抑参数， 触发释抑这段时间内不响应触发， ; 释抑结束后马上响应下一个触发沿,,,, //@apireg:note reg_hw_name:trig_module_tri_holdoff_time_h16 //@apireg:0xaddr 0X8800 | (((0X64&0XFF) << 2) | ((0X64&0X100) << 6)) 9'H064 : trig_module_tri_holdoff_time_h16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRI_HOLDOFF_TIME_L16 //@apireg:software:name HoldOffTimeL //@apireg:value:appoint bit-width:16 ; 16bits 0：[15:0] //@apireg:desc abs-addr:0X8994; 触发释抑参数， 触发释抑这段时间内不响应触发， ; 释抑结束后马上响应下一个触发沿,,,, //@apireg:note reg_hw_name:trig_module_tri_holdoff_time_l16 //@apireg:0xaddr 0X8800 | (((0X65&0XFF) << 2) | ((0X65&0X100) << 6)) 9'H065 : trig_module_tri_holdoff_time_l16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_POSDEPTH_SET_H16 //@apireg:software:name PosDepthSetH //@apireg:value:appoint bit-width:16 ; 16bits 2：[47:32] //@apireg:desc abs-addr:0X8998; 后触发深度，以4ns为单位的个数,,,, //@apireg:note reg_hw_name:trig_module_trig_posdepth_set_h16 //@apireg:0xaddr 0X8800 | (((0X66&0XFF) << 2) | ((0X66&0X100) << 6)) 9'H066 : trig_module_trig_posdepth_set_h16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_POSDEPTH_SET_L16 //@apireg:software:name PosDepthSetL //@apireg:value:appoint bit-width:16 ; 16bits 0：[15:0] //@apireg:desc abs-addr:0X899C; 后触发深度，以4ns为单位的个数,,,, //@apireg:note reg_hw_name:trig_module_trig_posdepth_set_l16 //@apireg:0xaddr 0X8800 | (((0X67&0XFF) << 2) | ((0X67&0X100) << 6)) 9'H067 : trig_module_trig_posdepth_set_l16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_POSDEPTH_SET_M16 //@apireg:software:name PosDepthSetM //@apireg:value:appoint bit-width:16 ; 16bits 1：[31:16] //@apireg:desc abs-addr:0X89A0; 后触发深度，以4ns为单位的个数,,,, //@apireg:note reg_hw_name:trig_module_trig_posdepth_set_m16 //@apireg:0xaddr 0X8800 | (((0X68&0XFF) << 2) | ((0X68&0X100) << 6)) 9'H068 : trig_module_trig_posdepth_set_m16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET_H16 //@apireg:software:name PreDepthSetH //@apireg:value:appoint bit-width:16 ; 16bits 2：[47:32] //@apireg:desc abs-addr:0X89A4; 预触发深度，调节触发点在屏幕中的位置,,,, //@apireg:note reg_hw_name:trig_module_trig_predepth_set_h16 //@apireg:0xaddr 0X8800 | (((0X69&0XFF) << 2) | ((0X69&0X100) << 6)) 9'H069 : trig_module_trig_predepth_set_h16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET_L16 //@apireg:software:name PreDepthSetL //@apireg:value:appoint bit-width:16 ; 16bits 0：[15:0] //@apireg:desc abs-addr:0X89A8; 预触发深度，调节触发点在屏幕中的位置,,,, //@apireg:note reg_hw_name:trig_module_trig_predepth_set_l16 //@apireg:0xaddr 0X8800 | (((0X6A&0XFF) << 2) | ((0X6A&0X100) << 6)) 9'H06A : trig_module_trig_predepth_set_l16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET_M16 //@apireg:software:name PreDepthSetM //@apireg:value:appoint bit-width:16 ; 16bits 1：[31:16] //@apireg:desc abs-addr:0X89AC; 预触发深度，调节触发点在屏幕中的位置,,,, //@apireg:note reg_hw_name:trig_module_trig_predepth_set_m16 //@apireg:0xaddr 0X8800 | (((0X6B&0XFF) << 2) | ((0X6B&0X100) << 6)) 9'H06B : trig_module_trig_predepth_set_m16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_RESET_N //@apireg:software:name Reset //@apireg:value:appoint bit-width:1 ; 1bit 0：active 低有效 //@apireg:desc abs-addr:0X89B0; 软件触发复位,,,, //@apireg:note reg_hw_name:trig_module_trig_reset_n //@apireg:0xaddr 0X8800 | (((0X6C&0XFF) << 2) | ((0X6C&0X100) << 6)) 9'H06C : trig_module_trig_reset_n <= cmd_iowr_d[0:0]; //@apireg:group:title 1st //@apireg:title TRIG_1ST_ACQ_TRIG_OR_EXT_SEL //@apireg:software:name SourceControl //@apireg:value:appoint bit-width:5 ; 5bits：b[2：0]选择来自哪一块采集板：000，板一，001，板二，002，板三，003：板四，004：板五，006：板六 //@apireg:desc abs-addr:0X89B4; 1级触发采集路径选择，最高两位为00时选择触发来自采集板,,,, //@apireg:note reg_hw_name:trig_1st_source_sel //@apireg:0xaddr 0X8800 | (((0X6D&0XFF) << 2) | ((0X6D&0X100) << 6)) 9'H06D : trig_1st_source_sel <= cmd_iowr_d[4:0]; //@apireg:group:title 1st //@apireg:title TRIG_EXT_SETTING //@apireg:software:name trig_ext_setting //@apireg:value:appoint bit-width:16 ; [15:0]外触发设置 //@apireg:desc abs-addr:0X8AA8; none //@apireg:note reg_hw_name:trig_ext_setting //@apireg:0xaddr 0X8800 | (((0XAA&0XFF) << 2) | ((0XAA&0X100) << 6)) 9'H0AA : trig_ext_setting <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_1ST_AUTO_FAST_SETTING //@apireg:software:name auto_fast //@apireg:value:appoint bit-width:16 ; 16bits，[15] 1： 使能打开 0：使能关闭 ; [14:0] 计数个数 //@apireg:desc abs-addr:0X8AB0; 1级触发自动快速触发设置,,,, //@apireg:note reg_hw_name:trig_1st_auto_fast_setting //@apireg:0xaddr 0X8800 | (((0XAC&0XFF) << 2) | ((0XAC&0X100) << 6)) 9'H0AC : trig_1st_auto_fast_setting <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title REG_CH_OFFSET_ADJUST_EN //@apireg:software:name adjust_en //@apireg:value:appoint bit-width:1 ; 通道偏移功能使能 1:打开 0：关闭 //@apireg:desc abs-addr:0XC844; none //@apireg:note reg_hw_name:reg_ch_offset_adjust_en //@apireg:0xaddr 0X8800 | (((0X111&0XFF) << 2) | ((0X111&0X100) << 6)) 9'H111 : reg_ch_offset_adjust_en <= cmd_iowr_d[0:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET1_H16 //@apireg:software:name trig_predepth_set1_h16 //@apireg:value:appoint bit-width:16 ; 通道2偏移预触发设定 //@apireg:desc abs-addr:0XC848; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set1_h16 //@apireg:0xaddr 0X8800 | (((0X112&0XFF) << 2) | ((0X112&0X100) << 6)) 9'H112 : trig_module_trig_predepth_set1_h16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET1_L16 //@apireg:software:name trig_predepth_set1_l16 //@apireg:value:appoint bit-width:16 ; 通道2偏移预触发设定 //@apireg:desc abs-addr:0XC84C; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set1_l16 //@apireg:0xaddr 0X8800 | (((0X113&0XFF) << 2) | ((0X113&0X100) << 6)) 9'H113 : trig_module_trig_predepth_set1_l16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET1_M16 //@apireg:software:name trig_predepth_set1_m16 //@apireg:value:appoint bit-width:16 ; 通道2偏移预触发设定 //@apireg:desc abs-addr:0XC850; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set1_m16 //@apireg:0xaddr 0X8800 | (((0X114&0XFF) << 2) | ((0X114&0X100) << 6)) 9'H114 : trig_module_trig_predepth_set1_m16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET2_H16 //@apireg:software:name trig_predepth_set2_h16 //@apireg:value:appoint bit-width:16 ; 通道3偏移预触发设定 //@apireg:desc abs-addr:0XC854; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set2_h16 //@apireg:0xaddr 0X8800 | (((0X115&0XFF) << 2) | ((0X115&0X100) << 6)) 9'H115 : trig_module_trig_predepth_set2_h16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET2_L16 //@apireg:software:name trig_predepth_set2_l16 //@apireg:value:appoint bit-width:16 ; 通道3偏移预触发设定 //@apireg:desc abs-addr:0XC858; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set2_l16 //@apireg:0xaddr 0X8800 | (((0X116&0XFF) << 2) | ((0X116&0X100) << 6)) 9'H116 : trig_module_trig_predepth_set2_l16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET2_M16 //@apireg:software:name trig_predepth_set2_m16 //@apireg:value:appoint bit-width:16 ; 通道3偏移预触发设定 //@apireg:desc abs-addr:0XC85C; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set2_m16 //@apireg:0xaddr 0X8800 | (((0X117&0XFF) << 2) | ((0X117&0X100) << 6)) 9'H117 : trig_module_trig_predepth_set2_m16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET3_H16 //@apireg:software:name trig_predepth_set3_h16 //@apireg:value:appoint bit-width:16 ; 通道4偏移预触发设定 //@apireg:desc abs-addr:0XC860; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set3_h16 //@apireg:0xaddr 0X8800 | (((0X118&0XFF) << 2) | ((0X118&0X100) << 6)) 9'H118 : trig_module_trig_predepth_set3_h16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET3_L16 //@apireg:software:name trig_predepth_set3_l16 //@apireg:value:appoint bit-width:16 ; 通道4偏移预触发设定 //@apireg:desc abs-addr:0XC864; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set3_l16 //@apireg:0xaddr 0X8800 | (((0X119&0XFF) << 2) | ((0X119&0X100) << 6)) 9'H119 : trig_module_trig_predepth_set3_l16 <= cmd_iowr_d[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET3_M16 //@apireg:software:name trig_predepth_set3_m16 //@apireg:value:appoint bit-width:16 ; 通道4偏移预触发设定 //@apireg:desc abs-addr:0XC868; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set3_m16 //@apireg:0xaddr 0X8800 | (((0X11A&0XFF) << 2) | ((0X11A&0X100) << 6)) 9'H11A : trig_module_trig_predepth_set3_m16 <= cmd_iowr_d[15:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_AUTO_TRIG_EN //@apireg:software:name AutoModeEnable //@apireg:value:appoint bit-width:1 ; 1bit，1：auto_trig，0：normal_trig //@apireg:desc abs-addr:0X89B8; 2级触发模式1：自动触发； 0：正常触发,,,, //@apireg:note reg_hw_name:trig_2nd_auto_trig_en //@apireg:0xaddr 0X8800 | (((0X6E&0XFF) << 2) | ((0X6E&0X100) << 6)) 9'H06E : trig_2nd_auto_trig_en <= cmd_iowr_d[0:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_CMP1_LEVEL_L //@apireg:software:name CompareVoltage1Down //@apireg:value:appoint bit-width:12 ; 12bits，value_of_level //@apireg:desc abs-addr:0X89BC; 2级触发电平低电平组：12位下限的以12Bit之4096为基准， ; 2048表示0电平,,,, //@apireg:note reg_hw_name:trig_2nd_cmp1_level_l //@apireg:0xaddr 0X8800 | (((0X6F&0XFF) << 2) | ((0X6F&0X100) << 6)) 9'H06F : trig_2nd_cmp1_level_l <= cmd_iowr_d[11:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_CMP1_LEVEL_H //@apireg:software:name CompareVoltage1Up //@apireg:value:appoint bit-width:12 ; 12bits，value_of_level //@apireg:desc abs-addr:0X89C0; 2级触发电平低电平组：12位上限的以12Bit之4096为基准， ; 2048表示0电平,,,, //@apireg:note reg_hw_name:trig_2nd_cmp1_level_h //@apireg:0xaddr 0X8800 | (((0X70&0XFF) << 2) | ((0X70&0X100) << 6)) 9'H070 : trig_2nd_cmp1_level_h <= cmd_iowr_d[11:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_CMP2_LEVEL_L //@apireg:software:name CompareVoltage2Down //@apireg:value:appoint bit-width:12 ; 12bits value_of_level //@apireg:desc abs-addr:0X89C4; 2级触发电平高电平组：用于需要两组触发电平的触发模式，如斜率，欠幅触发等,,,, //@apireg:note reg_hw_name:trig_2nd_cmp2_level_l //@apireg:0xaddr 0X8800 | (((0X71&0XFF) << 2) | ((0X71&0X100) << 6)) 9'H071 : trig_2nd_cmp2_level_l <= cmd_iowr_d[11:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_CMP2_LEVEL_H //@apireg:software:name CompareVoltage2Up //@apireg:value:appoint bit-width:12 ; 12bits value_of_level //@apireg:desc abs-addr:0X89C8; 2级触发电平高电平组：用于需要两组触发电平的触发模式，如斜率，欠幅触发等,,,, //@apireg:note reg_hw_name:trig_2nd_cmp2_level_h //@apireg:0xaddr 0X8800 | (((0X72&0XFF) << 2) | ((0X72&0X100) << 6)) 9'H072 : trig_2nd_cmp2_level_h <= cmd_iowr_d[11:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_EDGE_TRIG_CHS //@apireg:software:name EdgeSelect //@apireg:value:appoint bit-width:16 ; 1bit，1：rising edge，0：falling edge 1x:any edge //@apireg:desc abs-addr:0X89CC; 2级边沿触发极性选择：1：上升沿触发；0：下降沿触发,,,, //@apireg:note reg_hw_name:trig_2nd_edge_trig_edge_sel //@apireg:0xaddr 0X8800 | (((0X73&0XFF) << 2) | ((0X73&0X100) << 6)) 9'H073 : trig_2nd_edge_trig_edge_sel <= cmd_iowr_d[15:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_PRETRIG_DEPTH //@apireg:software:name PreDepth //@apireg:value:appoint bit-width:16 ; 16bits，num_of_pts //@apireg:desc abs-addr:0X89D0; 2级触发预触发深度值,,,, //@apireg:note reg_hw_name:trig_2nd_pretrig_depth //@apireg:0xaddr 0X8800 | (((0X74&0XFF) << 2) | ((0X74&0X100) << 6)) 9'H074 : trig_2nd_pretrig_depth <= cmd_iowr_d[15:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_AUTO_TRIG_NUM //@apireg:software:name SearchRange //@apireg:value:appoint bit-width:16 ; 16bits，num_of_pts //@apireg:desc abs-addr:0X89D4; 2级自动触发找点数，2级触发未来时，计数到该设置值后自动进行触发,,,, //@apireg:note reg_hw_name:trig_2nd_auto_trig_num //@apireg:0xaddr 0X8800 | (((0X75&0XFF) << 2) | ((0X75&0X100) << 6)) 9'H075 : trig_2nd_auto_trig_num <= cmd_iowr_d[15:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_SERIAL_TRIG_EN //@apireg:software:name SerialTrigEnable //@apireg:value:appoint bit-width:4 ; 1bit，1：trig_en 0：trig_off //@apireg:desc abs-addr:0X89D8; 2级触发使能。1：触发使能 ；0：关闭,,,, //@apireg:note reg_hw_name:trig_2nd_serial_trig_en //@apireg:0xaddr 0X8800 | (((0X76&0XFF) << 2) | ((0X76&0X100) << 6)) 9'H076 : trig_2nd_serial_trig_en <= cmd_iowr_d[3:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_TRIG_SOURCE_SEL //@apireg:software:name SourceSelect //@apireg:value:appoint bit-width:3 ; 3bits 0：channel1，1：channel2 ; （后续可能有其他的通道加入） //@apireg:desc abs-addr:0X89DC; 2级数字触发源选择，信号是迟滞比较后产生的新的状态信号， ; 用于数字边沿触发,,,, //@apireg:note reg_hw_name:trig_2nd_trig_source_sel //@apireg:0xaddr 0X8800 | (((0X77&0XFF) << 2) | ((0X77&0X100) << 6)) 9'H077 : trig_2nd_trig_source_sel <= cmd_iowr_d[2:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_TRIG_TYPE_SEL //@apireg:software:name TrigTypeSelect //@apireg:value:appoint bit-width:16 ; 11bits，[2:0]代表触发分类，00单通道高级触发，01多通道高级触发，02la触发，03协议触发，04其他触发（视频触发等）。[6:3]表示单通道高级触发类型：00边沿，01脉宽，02斜率，03跌落，04欠幅，05超时，06窗口。[10:7]表示多通道高级触发，00码型，01状态，02建立保持，03级联，04间隔。 //@apireg:desc abs-addr:0X89E0; 2级触发触发类型选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_type_sel //@apireg:0xaddr 0X8800 | (((0X78&0XFF) << 2) | ((0X78&0X100) << 6)) 9'H078 : trig_2nd_trig_type_sel <= cmd_iowr_d[15:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_SEARCH_EN //@apireg:software:name search_en //@apireg:value:appoint bit-width:1 ; 1：是开启查找触发点计数功能，不丢点 ; 0：关闭查找触发点计数功能，正常二级触发丢点模式 //@apireg:desc abs-addr:0X8A9C; none //@apireg:note reg_hw_name:trig_2nd_search_en //@apireg:0xaddr 0X8800 | (((0XA7&0XFF) << 2) | ((0XA7&0X100) << 6)) 9'H0A7 : trig_2nd_search_en <= cmd_iowr_d[0:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_AC_DC_SETTING //@apireg:software:name ac_dc_setting //@apireg:value:appoint bit-width:1 ; bit[0]开启二级触发ac_dc 使能。为高：ac.为低dc //@apireg:desc abs-addr:0X8AA0; none //@apireg:note reg_hw_name:trig_2nd_ac_dc_setting //@apireg:0xaddr 0X8800 | (((0XA8&0XFF) << 2) | ((0XA8&0X100) << 6)) 9'H0A8 : trig_2nd_ac_dc_setting <= cmd_iowr_d[0:0]; //@apireg:group:title ASourceSel //@apireg:title TRIG_COM_TRIG_EVENT_A_SOURCE_SEL //@apireg:software:name EventASourceSelect //@apireg:value:appoint bit-width:3 ; 3bits 0：channel1；1：channel2 ; （后续可能有其他的通道加入） //@apireg:desc abs-addr:0XC800; 事件A通道选择,,,, //@apireg:note reg_hw_name:trig_com_trig_event_a_source_sel //@apireg:0xaddr 0X8800 | (((0X100&0XFF) << 2) | ((0X100&0X100) << 6)) 9'H100 : trig_com_trig_event_a_source_sel <= cmd_iowr_d[2:0]; //@apireg:group:title BSourceSel //@apireg:title TRIG_COM_TRIG_EVENT_B_SOURCE_SEL //@apireg:software:name EventBSourceSelect //@apireg:value:appoint bit-width:3 ; 3bits 0：channel1；1：channel2 ; （后续可能有其他的通道加入） //@apireg:desc abs-addr:0XC804; 事件B通道选择,,,, //@apireg:note reg_hw_name:trig_com_trig_event_b_source_sel //@apireg:0xaddr 0X8800 | (((0X101&0XFF) << 2) | ((0X101&0X100) << 6)) 9'H101 : trig_com_trig_event_b_source_sel <= cmd_iowr_d[2:0]; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_EVENTA_SOURCE //@apireg:software:name EventASourceSelect //@apireg:value:appoint bit-width:4 ; 3bits 0：channel1；1：channel2 2：channel 3 ... ; （后续可能有其他的通道加入） //@apireg:desc abs-addr:0X89E4; 事件A通道选择,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_eventa_source //@apireg:0xaddr 0X8800 | (((0X79&0XFF) << 2) | ((0X79&0X100) << 6)) 9'H079 : trig_com_trig_cascade_eventa_source <= cmd_iowr_d[3:0]; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_EVENTB_SOURCE //@apireg:software:name EventBSourceSelect //@apireg:value:appoint bit-width:4 ; 3bits 0：channel1；1：channel2 2：channel 3 ... ; （后续可能有其他的通道加入） //@apireg:desc abs-addr:0X89E8; 事件B通道选择,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_eventb_source //@apireg:0xaddr 0X8800 | (((0X7A&0XFF) << 2) | ((0X7A&0X100) << 6)) 9'H07A : trig_com_trig_cascade_eventb_source <= cmd_iowr_d[3:0]; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADED_EN //@apireg:software:name CascadedEnable //@apireg:value:appoint bit-width:1 ; 1bit 0：关闭；1：开启； //@apireg:desc abs-addr:0X89EC; 级联触发使能,,,, //@apireg:note reg_hw_name:trig_com_trig_cascaded_en //@apireg:0xaddr 0X8800 | (((0X7B&0XFF) << 2) | ((0X7B&0X100) << 6)) 9'H07B : trig_com_trig_cascaded_en <= cmd_iowr_d[0:0]; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_EVENTA_TYPE //@apireg:software:name EventATrigType //@apireg:value:appoint bit-width:4 ; 0:边沿 1-脉宽 2-斜率 3-欠幅 4-超时 //@apireg:desc abs-addr:0X8BA4; 事件A触发类型选择,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_eventa_type //@apireg:0xaddr 0X8800 | (((0XE9&0XFF) << 2) | ((0XE9&0X100) << 6)) 9'H0E9 : trig_com_trig_cascade_eventa_type <= cmd_iowr_d[3:0]; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_EVENTB_TYPE //@apireg:software:name EventBTrigType //@apireg:value:appoint bit-width:4 ; 0:边沿 1-脉宽 2-斜率 3-欠幅 4-超时 //@apireg:desc abs-addr:0X8BA8; 事件B触发类型选择,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_eventb_type //@apireg:0xaddr 0X8800 | (((0XEA&0XFF) << 2) | ((0XEA&0X100) << 6)) 9'H0EA : trig_com_trig_cascade_eventb_type <= cmd_iowr_d[3:0]; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_DELAYA_SET //@apireg:software:name EventADelaySet //@apireg:value:appoint bit-width:16 ; [15] 为1，表示时间时间 ，此时[14:0]表示delay时间，以4ns为单位 ; 为0 ，表示事件，此时[14:0]表示delay事件，为事件个数 //@apireg:desc abs-addr:0X8BAC; 事件A延迟设置,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_delaya_set //@apireg:0xaddr 0X8800 | (((0XEB&0XFF) << 2) | ((0XEB&0X100) << 6)) 9'H0EB : trig_com_trig_cascade_delaya_set <= cmd_iowr_d[15:0]; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_DELAYB_SET //@apireg:software:name EventBDelaySet //@apireg:value:appoint bit-width:16 ; [15] 为1，表示时间时间 ，此时[14:0]表示delay时间，以4ns为单位 ; 为0 ，表示事件，此时[14:0]表示delay事件，为事件个数 //@apireg:desc abs-addr:0X8BB0; 事件B延迟设置,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_delayb_set //@apireg:0xaddr 0X8800 | (((0XEC&0XFF) << 2) | ((0XEC&0X100) << 6)) 9'H0EC : trig_com_trig_cascade_delayb_set <= cmd_iowr_d[15:0]; //@apireg:group:title Code //@apireg:title TRIG_COM_CODE_TRIG_CTRL_WORD0 //@apireg:software:name Condition //@apireg:value:appoint bit-width:3 ; 3bits 000：与；001：或；010：与非；011：或非； //@apireg:desc abs-addr:0X89F0; 码型逻辑比较选择,,,, //@apireg:note reg_hw_name:trig_com_code_trig_ctrl_word0 //@apireg:0xaddr 0X8800 | (((0X7C&0XFF) << 2) | ((0X7C&0X100) << 6)) 9'H07C : trig_com_code_trig_ctrl_word0 <= cmd_iowr_d[2:0]; //@apireg:group:title Code //@apireg:title TRIG_COM_CODE_TRIG_CTRL_WORD1 //@apireg:software:name CtrlWord //@apireg:value:appoint bit-width:16 ; 16bits [15:8]：通道无关项选择 ; [7:0]：各通道码型设置值 //@apireg:desc abs-addr:0X89F4; 8通道码型设置,,,, //@apireg:note reg_hw_name:trig_com_code_trig_ctrl_word1 //@apireg:0xaddr 0X8800 | (((0X7D&0XFF) << 2) | ((0X7D&0X100) << 6)) 9'H07D : trig_com_code_trig_ctrl_word1 <= cmd_iowr_d[15:0]; //@apireg:group:title Code //@apireg:title TRIG_COM_CODE_CODE_WIDTH_FUNC //@apireg:software:name WidthAndPolarity //@apireg:value:appoint bit-width:4 ; 4bits [3:2]：00：正极性；01：负极性； ; [1:0]：00=大于；01=小于；10=等于；11=不等于； //@apireg:desc abs-addr:0X89F8; 码型脉宽比较符和极性选择,,,, //@apireg:note reg_hw_name:trig_com_code_code_width_func //@apireg:0xaddr 0X8800 | (((0X7E&0XFF) << 2) | ((0X7E&0X100) << 6)) 9'H07E : trig_com_code_code_width_func <= cmd_iowr_d[3:0]; //@apireg:group:title Dropout //@apireg:title TRIG_2ND_TRIG_DROPOUT_FUNC //@apireg:software:name IsDualEdgeRefresh //@apireg:value:appoint bit-width:1 ; 1bit 0：无双沿刷新；1：有双沿刷新 //@apireg:desc abs-addr:0X89FC; 2级跌落刷新极性选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_dropout_func //@apireg:0xaddr 0X8800 | (((0X7F&0XFF) << 2) | ((0X7F&0X100) << 6)) 9'H07F : trig_2nd_trig_dropout_func <= cmd_iowr_d[0:0]; //@apireg:group:title Dropout //@apireg:title TRIG_2ND_TRIG_DROPOUT_POLARITY_SEL //@apireg:software:name Polarity //@apireg:value:appoint bit-width:1 ; 1bit 0：上升沿；1：下降沿 //@apireg:desc abs-addr:0X8A00; 2级跌落极性选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_dropout_polarity_sel //@apireg:0xaddr 0X8800 | (((0X80&0XFF) << 2) | ((0X80&0X100) << 6)) 9'H080 : trig_2nd_trig_dropout_polarity_sel <= cmd_iowr_d[0:0]; //@apireg:group:title EdgeThenEdge //@apireg:title TRIG_COM_TRIG_ETE_CAPTURE_POLAR //@apireg:software:name CapturePolarity //@apireg:value:appoint bit-width:1 ; 1bit 0：上升沿；1：下降沿 //@apireg:desc abs-addr:0X8A04; 捕捉信号极性,,,, //@apireg:note reg_hw_name:trig_com_trig_ete_capture_polar //@apireg:0xaddr 0X8800 | (((0X81&0XFF) << 2) | ((0X81&0X100) << 6)) 9'H081 : trig_com_trig_ete_capture_polar <= cmd_iowr_d[0:0]; //@apireg:group:title EdgeThenEdge //@apireg:title TRIG_COM_TRIG_ETE_EVENT //@apireg:software:name EventType //@apireg:value:appoint bit-width:1 ; 1bit 0：时间计数；1：个数计数 //@apireg:desc abs-addr:0X8A08; 选择以时间进行计数或者以捕获沿个数进行计数,,,, //@apireg:note reg_hw_name:trig_com_trig_ete_event //@apireg:0xaddr 0X8800 | (((0X82&0XFF) << 2) | ((0X82&0X100) << 6)) 9'H082 : trig_com_trig_ete_event <= cmd_iowr_d[0:0]; //@apireg:group:title EdgeThenEdge //@apireg:title TRIG_COM_TRIG_ETE_LAUNCH_POLAR //@apireg:software:name LaunchPolarity //@apireg:value:appoint bit-width:1 ; 1bit 0：上升沿；1：下降沿 //@apireg:desc abs-addr:0X8A0C; 选通信号极性,,,, //@apireg:note reg_hw_name:trig_com_trig_ete_launch_polar //@apireg:0xaddr 0X8800 | (((0X83&0XFF) << 2) | ((0X83&0X100) << 6)) 9'H083 : trig_com_trig_ete_launch_polar <= cmd_iowr_d[0:0]; //@apireg:group:title Fifo //@apireg:title TRIG_2ND_SERIAL_PROG_FULL_THRESH //@apireg:software:name SerialFifoDepth //@apireg:value:appoint bit-width:16 ; 16bits，num_of_pts //@apireg:desc abs-addr:0X8A10; 2级采集板串行FIFO深度，最大16384，缓存波形数据并找点，不同时基档位数深度不同，目前初始化设为16000,,,, //@apireg:note reg_hw_name:trig_2nd_serial_prog_full_thresh //@apireg:0xaddr 0X8800 | (((0X84&0XFF) << 2) | ((0X84&0X100) << 6)) 9'H084 : trig_2nd_serial_prog_full_thresh <= cmd_iowr_d[15:0]; //@apireg:group:title Glitch //@apireg:title TRIG_2ND_GLI_FUNC_SEL //@apireg:software:name Condition //@apireg:value:appoint bit-width:1 ; 1bit 0：<；1：> //@apireg:desc abs-addr:0X8A14; 2级毛刺条件设置,,,, //@apireg:note reg_hw_name:trig_2nd_gli_func_sel //@apireg:0xaddr 0X8800 | (((0X85&0XFF) << 2) | ((0X85&0X100) << 6)) 9'H085 : trig_2nd_gli_func_sel <= cmd_iowr_d[0:0]; //@apireg:group:title Interval //@apireg:title TRIG_COM_TRIG_INTERVAL_FUNC //@apireg:software:name Condition //@apireg:value:appoint bit-width:2 ; 2bits 0：大于；1：小于；2：等于；3：不等于 //@apireg:desc abs-addr:0X8A18; 2级间隔条件选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_interval_func //@apireg:0xaddr 0X8800 | (((0X86&0XFF) << 2) | ((0X86&0X100) << 6)) 9'H086 : trig_2nd_trig_interval_func <= cmd_iowr_d[1:0]; //@apireg:group:title Interval //@apireg:title TRIG_COM_TRIG_INTERVAL_POLARITY_SEL //@apireg:software:name Polarity //@apireg:value:appoint bit-width:1 ; 1bit 0：上升沿；1：下降沿 //@apireg:desc abs-addr:0X8A1C; 2级间隔极性选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_interval_polarity_sel //@apireg:0xaddr 0X8800 | (((0X87&0XFF) << 2) | ((0X87&0X100) << 6)) 9'H087 : trig_2nd_trig_interval_polarity_sel <= cmd_iowr_d[0:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCA_SYNC_SET //@apireg:software:name LocationReserve1 //@apireg:value:appoint bit-width:16 ; 16bits:可扩展 //@apireg:desc abs-addr:0X8A20; 预留 2/19,,,, //@apireg:note reg_hw_name:trig_pro_loca_sync_set //@apireg:0xaddr 0X8800 | (((0X88&0XFF) << 2) | ((0X88&0X100) << 6)) 9'H088 : trig_pro_loca_sync_set <= cmd_iowr_d[15:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCA_SYNC_SET_EXT //@apireg:software:name LocationReserve2 //@apireg:value:appoint bit-width:16 ; 预留扩展 //@apireg:desc abs-addr:0X8A24; 预留,,,, //@apireg:note reg_hw_name:trig_pro_loca_sync_set_ext //@apireg:0xaddr 0X8800 | (((0X89&0XFF) << 2) | ((0X89&0X100) << 6)) 9'H089 : trig_pro_loca_sync_set_ext <= cmd_iowr_d[15:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCAL_SYNC_IO_RST //@apireg:software:name SyncReset //@apireg:value:appoint bit-width:1 ; delay复位，高有效， //@apireg:desc abs-addr:0X8A78; none //@apireg:note reg_hw_name:trig_pro_local_sync_io_rst //@apireg:0xaddr 0X8800 | (((0X9E&0XFF) << 2) | ((0X9E&0X100) << 6)) 9'H09E : trig_pro_local_sync_io_rst <= cmd_iowr_d[0:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCAL_SYNC_DELAY_INC //@apireg:software:name SyncINC //@apireg:value:appoint bit-width:16 ; 16bits: 采集板inc使能，1递增0，递减 //@apireg:desc abs-addr:0X8A7C; none //@apireg:note reg_hw_name:trig_pro_local_sync_delay_inc //@apireg:0xaddr 0X8800 | (((0X9F&0XFF) << 2) | ((0X9F&0X100) << 6)) 9'H09F : trig_pro_local_sync_delay_inc <= cmd_iowr_d[15:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCAL_SYNC_DELAY_CE //@apireg:software:name SyncCE //@apireg:value:appoint bit-width:16 ; 16bits：采集板ce使能，0时维持不变，1时在下一个时钟上升沿递增或递减 //@apireg:desc abs-addr:0X8A80; none //@apireg:note reg_hw_name:trig_pro_local_sync_delay_ce //@apireg:0xaddr 0X8800 | (((0XA0&0XFF) << 2) | ((0XA0&0X100) << 6)) 9'H0A0 : trig_pro_local_sync_delay_ce <= cmd_iowr_d[15:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCAL_SYNC_DELAY_VTC //@apireg:software:name SyncVTC //@apireg:value:appoint bit-width:16 ; 16bits: 采集板vtc使能高有效 //@apireg:desc abs-addr:0X8A84; none //@apireg:note reg_hw_name:trig_pro_local_sync_delay_vtc //@apireg:0xaddr 0X8800 | (((0XA1&0XFF) << 2) | ((0XA1&0X100) << 6)) 9'H0A1 : trig_pro_local_sync_delay_vtc <= cmd_iowr_d[15:0]; //@apireg:group:title Location //@apireg:title DBI_PRO_TRIG_DISCARD //@apireg:software:name dbi_pro_trig_discard //@apireg:value:appoint bit-width:16 ; [15] 开启dbi 丢点使能 1有效 [14:0] 丢点数设置 //@apireg:desc abs-addr:0X8AA4; none //@apireg:note reg_hw_name:dbi_pro_trig_discard //@apireg:0xaddr 0X8800 | (((0XA9&0XFF) << 2) | ((0XA9&0X100) << 6)) 9'H0A9 : dbi_pro_trig_discard <= cmd_iowr_d[15:0]; //@apireg:group:title Location //@apireg:title TRIG_1ST_TEST_MODE_PRO_EN //@apireg:software:name TestModeProEn //@apireg:value:appoint bit-width:1 ; 触发传输偏移量测试模式使能，1bit，测试模式设为1，正常采集模式设为0 //@apireg:desc abs-addr:0XC964; none //@apireg:note reg_hw_name:trig_1st_test_mode_pro_en //@apireg:0xaddr 0X8800 | (((0X159&0XFF) << 2) | ((0X159&0X100) << 6)) 9'H159 : trig_1st_test_mode_pro_en <= cmd_iowr_d[0:0]; //@apireg:group:title Location //@apireg:title TRIG_1ST_TEST_MODE_ACQ_NUM //@apireg:software:name TestAcqNum //@apireg:value:appoint bit-width:16 ; 触发传输偏移量测试采集板板卡号：0-采集板1 1-采集板2…… //@apireg:desc abs-addr:0XC968; none //@apireg:note reg_hw_name:trig_1st_test_mode_acq_num //@apireg:0xaddr 0X8800 | (((0X15A&0XFF) << 2) | ((0X15A&0X100) << 6)) 9'H15A : trig_1st_test_mode_acq_num <= cmd_iowr_d[15:0]; //@apireg:group:title PulseWidth //@apireg:title TRIG_2ND_TRIG_PW_FUNC_SEL //@apireg:software:name Condition //@apireg:value:appoint bit-width:2 ; 2bit 0 = (实际脉宽)大于(设置值)； ; 1 = 小于； ; 2 = 等于； ; 3 = 小于或大于； //@apireg:desc abs-addr:0X8A28; 脉宽比较限定符选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_pw_func_sel //@apireg:0xaddr 0X8800 | (((0X8A&0XFF) << 2) | ((0X8A&0X100) << 6)) 9'H08A : trig_2nd_trig_pw_func_sel <= cmd_iowr_d[1:0]; //@apireg:group:title PulseWidth //@apireg:title TRIG_2ND_TRIG_PW_POLARITY_SEL //@apireg:software:name Polarity //@apireg:value:appoint bit-width:2 ; 2bit 0 = 正脉冲； ; 1 = 负脉冲； //@apireg:desc abs-addr:0X8A2C; 2级脉冲极性选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_pw_polarity_sel //@apireg:0xaddr 0X8800 | (((0X8B&0XFF) << 2) | ((0X8B&0X100) << 6)) 9'H08B : trig_2nd_trig_pw_polarity_sel <= cmd_iowr_d[1:0]; //@apireg:group:title Runt //@apireg:title TRIG_2ND_RUNT_FUNC_SEL //@apireg:software:name Condition //@apireg:value:appoint bit-width:3 ; 3bit 00：无关；01：<；10：>；11：= //@apireg:desc abs-addr:0X8A30; 2级欠幅条件，低两位：欠幅宽度条件设置； ; 高位：欠幅极性设置0：负欠幅 1：正欠幅,,,, //@apireg:note reg_hw_name:trig_2nd_runt_func_sel //@apireg:0xaddr 0X8800 | (((0X8C&0XFF) << 2) | ((0X8C&0X100) << 6)) 9'H08C : trig_2nd_runt_func_sel <= cmd_iowr_d[2:0]; //@apireg:group:title Setuphold //@apireg:title TRIG_COM_SETUP_HOLD_CTRL_WORD //@apireg:software:name PolarityAndCondition //@apireg:value:appoint bit-width:2 ; 2bits 0：setup，1:hold //@apireg:desc abs-addr:0X8A34; 低位：建立/保持选择， ; 高位：时钟极性选择,,,, //@apireg:note reg_hw_name:trig_com_setup_hold_ctrl_word //@apireg:0xaddr 0X8800 | (((0X8D&0XFF) << 2) | ((0X8D&0X100) << 6)) 9'H08D : trig_com_setup_hold_ctrl_word <= cmd_iowr_d[1:0]; //@apireg:group:title Slope //@apireg:title TRIG_COM_TRIG_SLOPE_FUNC_SEL //@apireg:software:name PolarityAndCondition //@apireg:value:appoint bit-width:3 ; 3bits [2]：1 = 上升沿； ; 0 = 下降沿；[1：0]：00 = (实际时间宽度)大于(设置值)； ; 01 = 小于； ; 10 = 等于； ; 11 = 不等于； //@apireg:desc abs-addr:0X8A38; 选择有效沿极性和选择比较限定符,,,, //@apireg:note reg_hw_name:trig_com_trig_slope_func_sel //@apireg:0xaddr 0X8800 | (((0X8E&0XFF) << 2) | ((0X8E&0X100) << 6)) 9'H08E : trig_com_trig_slope_func_sel <= cmd_iowr_d[2:0]; //@apireg:group:title State //@apireg:title TRIG_COM_STATE_TRIG_CTRL_WORD //@apireg:software:name CtrlWord //@apireg:value:appoint bit-width:15 ; none //@apireg:desc abs-addr:0X8A3C; none //@apireg:note reg_hw_name:trig_com_state_trig_ctrl_word //@apireg:0xaddr 0X8800 | (((0X8F&0XFF) << 2) | ((0X8F&0X100) << 6)) 9'H08F : trig_com_state_trig_ctrl_word <= cmd_iowr_d[14:0]; //@apireg:group:title Timeout //@apireg:title TRIG_2ND_TRIG_TIMEOUT_FUNC //@apireg:software:name IsKeepHighLevel //@apireg:value:appoint bit-width:1 ; 1bit 0 = 保持低电平； ; 1 = 保持高电平； //@apireg:desc abs-addr:0X8A40; 超时电压选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_timeout_func //@apireg:0xaddr 0X8800 | (((0X90&0XFF) << 2) | ((0X90&0X100) << 6)) 9'H090 : trig_2nd_trig_timeout_func <= cmd_iowr_d[0:0]; //@apireg:group:title Video //@apireg:title TRIG_COM_TRIG_VIDEO_CUSTOM_HORIZONTAL //@apireg:software:name CustomHorizontalSet //@apireg:value:appoint bit-width:11 ; 11bits //@apireg:desc abs-addr:0X8A44; 视频触发行设置,,,, //@apireg:note reg_hw_name:trig_com_trig_video_custom_horizontal //@apireg:0xaddr 0X8800 | (((0X91&0XFF) << 2) | ((0X91&0X100) << 6)) 9'H091 : trig_com_trig_video_custom_horizontal <= cmd_iowr_d[10:0]; //@apireg:group:title Video //@apireg:title TRIG_COM_TRIG_VIDEO_MODE //@apireg:software:name Standard //@apireg:value:appoint bit-width:3 ; 3bits 0：ntsc制式，480i； ; 1: pal制式,secam制式,576i； ; 2: 480p制式；3: 576p制式； ; 4: 720p制式；5: 原来是875i制式， ; 这里不需要，改成custom； ; 6: 1080i制式；7: 1080p制式 //@apireg:desc abs-addr:0X8A48; 视频制式,,,, //@apireg:note reg_hw_name:trig_com_trig_video_mode //@apireg:0xaddr 0X8800 | (((0X92&0XFF) << 2) | ((0X92&0X100) << 6)) 9'H092 : trig_com_trig_video_mode <= cmd_iowr_d[2:0]; //@apireg:group:title Video //@apireg:title TRIG_COM_TRIG_VIDEO_SYNC_NUMBER //@apireg:software:name SyncNumber //@apireg:value:appoint bit-width:11 ; 11bits //@apireg:desc abs-addr:0X8A4C; 视频触发行数设置,,,, //@apireg:note reg_hw_name:trig_com_trig_video_sync_number //@apireg:0xaddr 0X8800 | (((0X93&0XFF) << 2) | ((0X93&0X100) << 6)) 9'H093 : trig_com_trig_video_sync_number <= cmd_iowr_d[10:0]; //@apireg:group:title Video //@apireg:title TRIG_VIDEO_TRI_MODE //@apireg:software:name TrigMode //@apireg:value:appoint bit-width:3 ; 3bits 000=所有行；001=指定行；010：偶数场；011：奇数场；100：所有场 //@apireg:desc abs-addr:0X8A50; 视频触发模式,,,, //@apireg:note reg_hw_name:trig_video_tri_mode //@apireg:0xaddr 0X8800 | (((0X94&0XFF) << 2) | ((0X94&0X100) << 6)) 9'H094 : trig_video_tri_mode <= cmd_iowr_d[2:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_TRIG_ETE_EVENT //@apireg:software:name EventType //@apireg:value:appoint bit-width:1 ; 1bit 0：时间计数；1：个数计数 //@apireg:desc abs-addr:0X8A54; 2级触发宽度计数选择，选择以时间还是事件计数,,,, //@apireg:note reg_hw_name:trig_2nd_trig_ete_event //@apireg:0xaddr 0X8800 | (((0X95&0XFF) << 2) | ((0X95&0X100) << 6)) 9'H095 : trig_2nd_trig_ete_event <= cmd_iowr_d[0:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA2_SET_2 //@apireg:software:name NumberH //@apireg:value:appoint bit-width:16 ; 16bit [47:32] //@apireg:desc abs-addr:0X8A58; 2级触发宽度配置，以事件计数所有触发的宽度设置共用一组寄存器，在软件配置。,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data2_set_2 //@apireg:0xaddr 0X8800 | (((0X96&0XFF) << 2) | ((0X96&0X100) << 6)) 9'H096 : trig_2nd_configure_data2_set_2 <= cmd_iowr_d[15:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA2_SET_0 //@apireg:software:name NumberL //@apireg:value:appoint bit-width:16 ; 16bit [15：0] //@apireg:desc abs-addr:0X8A5C; 2级触发宽度配置，以事件计数所有触发的宽度设置共用一组寄存器，在软件配置。,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data2_set_0 //@apireg:0xaddr 0X8800 | (((0X97&0XFF) << 2) | ((0X97&0X100) << 6)) 9'H097 : trig_2nd_configure_data2_set_0 <= cmd_iowr_d[15:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA2_SET_1 //@apireg:software:name NumberM //@apireg:value:appoint bit-width:16 ; 16bit [31：16] //@apireg:desc abs-addr:0X8A60; 2级触发宽度配置，以事件计数所有触发的宽度设置共用一组寄存器，在软件配置。,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data2_set_1 //@apireg:0xaddr 0X8800 | (((0X98&0XFF) << 2) | ((0X98&0X100) << 6)) 9'H098 : trig_2nd_configure_data2_set_1 <= cmd_iowr_d[15:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA1_SET_2 //@apireg:software:name WidthH //@apireg:value:appoint bit-width:16 ; 16bits 2:[15：0] //@apireg:desc abs-addr:0X8A64; 2级触发宽度配置，以时间计数，所有触发的宽度设置共用一组寄存器，在软件配置。持续时间根据插值抽取后的倍数决定,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data1_set_2 //@apireg:0xaddr 0X8800 | (((0X99&0XFF) << 2) | ((0X99&0X100) << 6)) 9'H099 : trig_2nd_configure_data1_set_2 <= cmd_iowr_d[15:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA1_SET_0 //@apireg:software:name WidthL //@apireg:value:appoint bit-width:16 ; 16bits 0：[15:0]， //@apireg:desc abs-addr:0X8A68; 2级触发宽度配置，所有触发的宽度设置共用一组寄存器，在软件配置。持续时间根据插值抽取后的倍数决定,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data1_set_0 //@apireg:0xaddr 0X8800 | (((0X9A&0XFF) << 2) | ((0X9A&0X100) << 6)) 9'H09A : trig_2nd_configure_data1_set_0 <= cmd_iowr_d[15:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA1_SET_1 //@apireg:software:name WidthM //@apireg:value:appoint bit-width:16 ; 16bits 1：[31:16] //@apireg:desc abs-addr:0X8A6C; 2级触发宽度配置，以时间计数。所有触发的宽度设置共用一组寄存器，在软件配置。持续时间根据插值抽取后的倍数决定,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data1_set_1 //@apireg:0xaddr 0X8800 | (((0X9B&0XFF) << 2) | ((0X9B&0X100) << 6)) 9'H09B : trig_2nd_configure_data1_set_1 <= cmd_iowr_d[15:0]; //@apireg:group:title Window //@apireg:title TRIG_2ND_TRIG_WINDOW_FUNC_SEL //@apireg:software:name setting_2nd //@apireg:value:appoint bit-width:3 ; trig_2nd_trig_window_func_sel[2]=0表示外部触发。 ; trig_2nd_trig_window_func_sel[2]=1表示内部触发。 ; trig_2nd_trig_window_func_sel[1:0]: ; 2’b00:大于； ; 2’b01:小于； ; 2’b10:等于； ; 2’b11:进入； //@apireg:desc abs-addr:0XC808; 二级窗口触发功能选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_window_func_sel //@apireg:0xaddr 0X8800 | (((0X102&0XFF) << 2) | ((0X102&0X100) << 6)) 9'H102 : trig_2nd_trig_window_func_sel <= cmd_iowr_d[2:0]; //@apireg:group:title Window //@apireg:title WINDOW_WIDTH_L //@apireg:software:name width_L_2nd //@apireg:value:appoint bit-width:16 ; 设置脉宽比较值低16位 //@apireg:desc abs-addr:0XC80C; none //@apireg:note reg_hw_name:window_width_l //@apireg:0xaddr 0X8800 | (((0X103&0XFF) << 2) | ((0X103&0X100) << 6)) 9'H103 : window_width_l <= cmd_iowr_d[15:0]; //@apireg:group:title Window //@apireg:title WINDOW_WIDTH_H //@apireg:software:name width_H_2nd //@apireg:value:appoint bit-width:16 ; 设置脉宽比较值高16位 //@apireg:desc abs-addr:0XC810; none //@apireg:note reg_hw_name:window_width_h //@apireg:0xaddr 0X8800 | (((0X104&0XFF) << 2) | ((0X104&0X100) << 6)) 9'H104 : window_width_h <= cmd_iowr_d[15:0]; //@apireg:group:title TriggerSync //@apireg:title TRIGGER_SYNC_SIGNAL_SWITCH_PRO //@apireg:software:name SignalSwitch //@apireg:value:appoint bit-width:1 ; 数据切换信号，0：扫窗测试信号，1：fifo读写使能信号 //@apireg:desc abs-addr:0X8A70; none //@apireg:note reg_hw_name:trigger_sync_signal_switch_pro //@apireg:0xaddr 0X8800 | (((0X9C&0XFF) << 2) | ((0X9C&0X100) << 6)) 9'H09C : trigger_sync_signal_switch_pro <= cmd_iowr_d[0:0]; //@apireg:group:title TriggerSync //@apireg:title TRIGGER_SYNC_START_SEARCH_PRO //@apireg:software:name StartSearch //@apireg:value:appoint bit-width:1 ; 扫窗开始信号，上升沿有效 //@apireg:desc abs-addr:0X8A74; none //@apireg:note reg_hw_name:trigger_sync_start_search_pro //@apireg:0xaddr 0X8800 | (((0X9D&0XFF) << 2) | ((0X9D&0X100) << 6)) 9'H09D : trigger_sync_start_search_pro <= cmd_iowr_d[0:0]; //@apireg:group:title dbi //@apireg:title DBI_PRO_AUTO_TRIG_NUM //@apireg:software:name DBI_DBIPROAUTOTRIGNUM //@apireg:value:appoint bit-width:16 ; dbi触发丢点数设置 //@apireg:desc abs-addr:0X8B2C; none //@apireg:note reg_hw_name:dbi_pro_auto_trig_num //@apireg:0xaddr 0X8800 | (((0XCB&0XFF) << 2) | ((0XCB&0X100) << 6)) 9'H0CB : dbi_pro_auto_trig_num <= cmd_iowr_d[15:0]; //@apireg:group:title dbi //@apireg:title TRIG_2ND_PRETRIG_DEPTH_INTERP //@apireg:software:name DBI_TRIG2NDPRETRIGDEPTHINTERP //@apireg:value:appoint bit-width:16 ; dbi二级触发深度设置 //@apireg:desc abs-addr:0X8B30; none //@apireg:note reg_hw_name:trig_2nd_pretrig_depth_interp //@apireg:0xaddr 0X8800 | (((0XCC&0XFF) << 2) | ((0XCC&0X100) << 6)) 9'H0CC : trig_2nd_pretrig_depth_interp <= cmd_iowr_d[15:0]; //@apireg:group:title dbi //@apireg:title PRO_FIFO_DEPTH_DBI_IN //@apireg:software:name DBI_pro_fifo_depth_in //@apireg:value:appoint bit-width:14 ; dbi前级fifo深度设置 //@apireg:desc abs-addr:0X8B34; none //@apireg:note reg_hw_name:pro_fifo_depth_dbi_in //@apireg:0xaddr 0X8800 | (((0XCD&0XFF) << 2) | ((0XCD&0X100) << 6)) 9'H0CD : pro_fifo_depth_dbi_in <= cmd_iowr_d[13:0]; //@apireg:group:title dbi //@apireg:title IIR_BADPOINT_SET //@apireg:software:name iir_badpoint_set //@apireg:value:appoint bit-width:16 ; iir坏点设置 //@apireg:desc abs-addr:0X8B44; none //@apireg:note reg_hw_name:iir_badpoint_set //@apireg:0xaddr 0X8800 | (((0XD1&0XFF) << 2) | ((0XD1&0X100) << 6)) 9'H0D1 : iir_badpoint_set <= cmd_iowr_d[15:0]; //@apireg:group:title dbi //@apireg:title DBI_CH_OFFSET_ADJUST_CH12 //@apireg:software:name dbi_ch_offset_adjust_ch12 //@apireg:value:appoint bit-width:16 ; 16g+5g模式两个通道间偏移调整 //@apireg:desc abs-addr:0XC96C; none //@apireg:note reg_hw_name:dbi_ch_offset_adjust_ch12 //@apireg:0xaddr 0X8800 | (((0X15B&0XFF) << 2) | ((0X15B&0X100) << 6)) 9'H15B : dbi_ch_offset_adjust_ch12 <= cmd_iowr_d[15:0]; //@apireg:group:title dbi //@apireg:title DBI_CH_OFFSET_ADJUST_CH34 //@apireg:software:name dbi_ch_offset_adjust_ch34 //@apireg:value:appoint bit-width:16 ; 16g+5g模式两个通道间偏移调整 //@apireg:desc abs-addr:0XC970; none //@apireg:note reg_hw_name:dbi_ch_offset_adjust_ch34 //@apireg:0xaddr 0X8800 | (((0X15C&0XFF) << 2) | ((0X15C&0X100) << 6)) 9'H15C : dbi_ch_offset_adjust_ch34 <= cmd_iowr_d[15:0]; //@apireg:group:title dbi //@apireg:title SEL_TRIG_OR_PRO_PROG_FULL //@apireg:software:name sel_trig_or_pro_prog_full //@apireg:value:appoint bit-width:1 ; 选择传递触发信号还是编程满信号 //@apireg:desc abs-addr:0XC978; none //@apireg:note reg_hw_name:sel_trig_or_pro_prog_full //@apireg:0xaddr 0X8800 | (((0X15E&0XFF) << 2) | ((0X15E&0X100) << 6)) 9'H15E : sel_trig_or_pro_prog_full <= cmd_iowr_d[0:0]; //@apireg:group:title debug //@apireg:title PRO_DEBUG_MODE //@apireg:software:name pro_debug_mode //@apireg:value:appoint bit-width:16 ; [0]：1 单采集板调试模式 0：正常模式 //@apireg:desc abs-addr:0X8B24; none //@apireg:note reg_hw_name:pro_debug_mode //@apireg:0xaddr 0X8800 | (((0XC9&0XFF) << 2) | ((0XC9&0X100) << 6)) 9'H0C9 : pro_debug_mode <= cmd_iowr_d[15:0]; //@apireg:group:title ext_10m //@apireg:title EXT_10M_SEL //@apireg:software:name ext_10m_sel //@apireg:value:appoint bit-width:16 ; [0]:为1表示选择外部10m //@apireg:desc abs-addr:0XC8AC; none //@apireg:note reg_hw_name:ext_10m_sel //@apireg:0xaddr 0X8800 | (((0X12B&0XFF) << 2) | ((0X12B&0X100) << 6)) 9'H12B : ext_10m_sel <= cmd_iowr_d[15:0]; //@apireg:group:title fifoCtrl //@apireg:title SYS_RESETPROACQ //@apireg:software:name FIFO_RST //@apireg:value:appoint bit-width:16 ; 采集板和处理板采集复位 //@apireg:desc abs-addr:0XC9DC; none //@apireg:note reg_hw_name:sys_resetproacq //@apireg:0xaddr 0X8800 | (((0X177&0XFF) << 2) | ((0X177&0X100) << 6)) 9'H177 : sys_resetproacq <= cmd_iowr_d[15:0]; //@apireg:group:title la //@apireg:title LA_TRIG_2ND_PRETRIG_DEPTH //@apireg:software:name la_trig_2nd_pretrig_depth //@apireg:value:appoint bit-width:16 ; la 二级触发预触发深度 //@apireg:desc abs-addr:0X8B28; none //@apireg:note reg_hw_name:la_trig_2nd_pretrig_depth //@apireg:0xaddr 0X8800 | (((0XCA&0XFF) << 2) | ((0XCA&0X100) << 6)) 9'H0CA : la_trig_2nd_pretrig_depth <= cmd_iowr_d[15:0]; //@apireg:group:title reverse //@apireg:title PRO_REVERSE_WR_REG_0 //@apireg:software:name pro_reverse_wr_reg_0 //@apireg:value:appoint bit-width:16 ; 处理板备用写寄存器 //@apireg:desc abs-addr:0X8B1C; none //@apireg:note reg_hw_name:pro_reverse_wr_reg_0 //@apireg:0xaddr 0X8800 | (((0XC7&0XFF) << 2) | ((0XC7&0X100) << 6)) 9'H0C7 : pro_reverse_wr_reg_0 <= cmd_iowr_d[15:0]; //@apireg:group:title reverse //@apireg:title PRO_REVERSE_WR_REG_1 //@apireg:software:name pro_reverse_wr_reg_1 //@apireg:value:appoint bit-width:16 ; 处理板备用写寄存器 //@apireg:desc abs-addr:0X8B20; none //@apireg:note reg_hw_name:pro_reverse_wr_reg_1 //@apireg:0xaddr 0X8800 | (((0XC8&0XFF) << 2) | ((0XC8&0X100) << 6)) 9'H0C8 : pro_reverse_wr_reg_1 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title TRIG_LOCATION_SCAN_RST //@apireg:software:name trig_location_scan_rst //@apireg:value:appoint bit-width:1 ; 1复位，0释放 处理板往采集板发送触发位置tx端复位 //@apireg:desc abs-addr:0X8BC0; none //@apireg:note reg_hw_name:trig_location_scan_rst //@apireg:0xaddr 0X8800 | (((0XF0&0XFF) << 2) | ((0XF0&0X100) << 6)) 9'H0F0 : trig_location_scan_rst <= cmd_iowr_d[0:0]; //@apireg:group:title scan_sync //@apireg:title TRIG_LOCATION_SCAN_SWITCH_PRO //@apireg:software:name trig_location_scan_switch_pro //@apireg:value:appoint bit-width:1 ; 0：test mode 1-正常数据模式 处理板往采集板发送触发位置tx端模式 //@apireg:desc abs-addr:0X8BC4; none //@apireg:note reg_hw_name:trig_location_scan_switch_pro //@apireg:0xaddr 0X8800 | (((0XF1&0XFF) << 2) | ((0XF1&0X100) << 6)) 9'H0F1 : trig_location_scan_switch_pro <= cmd_iowr_d[0:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ1 //@apireg:software:name setting_trig_locat_acq1 //@apireg:value:appoint bit-width:16 ; 处理板对采集板1发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0X8BC8; none //@apireg:note reg_hw_name:sync_trig_locat_acq1 //@apireg:0xaddr 0X8800 | (((0XF2&0XFF) << 2) | ((0XF2&0X100) << 6)) 9'H0F2 : sync_trig_locat_acq1 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ1 //@apireg:software:name sync_trig_locat_TAP_start_acq1 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0X8BCC; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq1 //@apireg:0xaddr 0X8800 | (((0XF3&0XFF) << 2) | ((0XF3&0X100) << 6)) 9'H0F3 : sync_trig_locat_tap_start_acq1 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ1 //@apireg:software:name sync_trig_locat_TAP_stop_acq1 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0X8BD0; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq1 //@apireg:0xaddr 0X8800 | (((0XF4&0XFF) << 2) | ((0XF4&0X100) << 6)) 9'H0F4 : sync_trig_locat_tap_stop_acq1 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ2 //@apireg:software:name setting_trig_locat_acq2 //@apireg:value:appoint bit-width:16 ; 处理板对采集板2发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0X8BD4; none //@apireg:note reg_hw_name:sync_trig_locat_acq2 //@apireg:0xaddr 0X8800 | (((0XF5&0XFF) << 2) | ((0XF5&0X100) << 6)) 9'H0F5 : sync_trig_locat_acq2 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ2 //@apireg:software:name sync_trig_locat_TAP_start_acq2 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0X8BD8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq2 //@apireg:0xaddr 0X8800 | (((0XF6&0XFF) << 2) | ((0XF6&0X100) << 6)) 9'H0F6 : sync_trig_locat_tap_start_acq2 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ2 //@apireg:software:name sync_trig_locat_TAP_stop_acq2 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0X8BDC; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq2 //@apireg:0xaddr 0X8800 | (((0XF7&0XFF) << 2) | ((0XF7&0X100) << 6)) 9'H0F7 : sync_trig_locat_tap_stop_acq2 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ3 //@apireg:software:name setting_trig_locat_acq3 //@apireg:value:appoint bit-width:16 ; 处理板对采集板3发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0X8BE0; none //@apireg:note reg_hw_name:sync_trig_locat_acq3 //@apireg:0xaddr 0X8800 | (((0XF8&0XFF) << 2) | ((0XF8&0X100) << 6)) 9'H0F8 : sync_trig_locat_acq3 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ3 //@apireg:software:name sync_trig_locat_TAP_start_acq3 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0X8BE4; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq3 //@apireg:0xaddr 0X8800 | (((0XF9&0XFF) << 2) | ((0XF9&0X100) << 6)) 9'H0F9 : sync_trig_locat_tap_start_acq3 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ3 //@apireg:software:name sync_trig_locat_TAP_stop_acq3 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0X8BE8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq3 //@apireg:0xaddr 0X8800 | (((0XFA&0XFF) << 2) | ((0XFA&0X100) << 6)) 9'H0FA : sync_trig_locat_tap_stop_acq3 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ4 //@apireg:software:name setting_trig_locat_acq4 //@apireg:value:appoint bit-width:16 ; 处理板对采集板4发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0X8BEC; none //@apireg:note reg_hw_name:sync_trig_locat_acq4 //@apireg:0xaddr 0X8800 | (((0XFB&0XFF) << 2) | ((0XFB&0X100) << 6)) 9'H0FB : sync_trig_locat_acq4 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ4 //@apireg:software:name sync_trig_locat_TAP_start_acq4 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0X8BF0; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq4 //@apireg:0xaddr 0X8800 | (((0XFC&0XFF) << 2) | ((0XFC&0X100) << 6)) 9'H0FC : sync_trig_locat_tap_start_acq4 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ4 //@apireg:software:name sync_trig_locat_TAP_stop_acq4 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0X8BF4; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq4 //@apireg:0xaddr 0X8800 | (((0XFD&0XFF) << 2) | ((0XFD&0X100) << 6)) 9'H0FD : sync_trig_locat_tap_stop_acq4 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title FIFO_CTRL_SCAN_RST //@apireg:software:name fifo_ctrl_scan_rst //@apireg:value:appoint bit-width:1 ; 1复位，0释放 处理板往采集板发送fifo_ctrl 信号 tx端复位 //@apireg:desc abs-addr:0X8BF8; none //@apireg:note reg_hw_name:fifo_ctrl_scan_rst //@apireg:0xaddr 0X8800 | (((0XFE&0XFF) << 2) | ((0XFE&0X100) << 6)) 9'H0FE : fifo_ctrl_scan_rst <= cmd_iowr_d[0:0]; //@apireg:group:title scan_sync //@apireg:title FIFO_CTRL_SCAN_SWITCH_PRO //@apireg:software:name fifo_ctrl_scan_switch_pro //@apireg:value:appoint bit-width:1 ; 0：test mode 1-正常数据模式 处理板往采集板发送fifo_ctrl信号 tx端切换 //@apireg:desc abs-addr:0X8BFC; none //@apireg:note reg_hw_name:fifo_ctrl_scan_switch_pro //@apireg:0xaddr 0X8800 | (((0XFF&0XFF) << 2) | ((0XFF&0X100) << 6)) 9'H0FF : fifo_ctrl_scan_switch_pro <= cmd_iowr_d[0:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_ACQ1 //@apireg:software:name setting_trig_acq1 //@apireg:value:appoint bit-width:16 ; 处理板对采集板1发出的触发信号做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC814; none //@apireg:note reg_hw_name:sync_trig_acq1 //@apireg:0xaddr 0X8800 | (((0X105&0XFF) << 2) | ((0X105&0X100) << 6)) 9'H105 : sync_trig_acq1 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_START_ACQ1 //@apireg:software:name sync_trig_TAP_start_acq1 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC818; none //@apireg:note reg_hw_name:sync_trig_tap_start_acq1 //@apireg:0xaddr 0X8800 | (((0X106&0XFF) << 2) | ((0X106&0X100) << 6)) 9'H106 : sync_trig_tap_start_acq1 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_STOP_ACQ1 //@apireg:software:name sync_trig_TAP_stop_acq1 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC81C; none //@apireg:note reg_hw_name:sync_trig_tap_stop_acq1 //@apireg:0xaddr 0X8800 | (((0X107&0XFF) << 2) | ((0X107&0X100) << 6)) 9'H107 : sync_trig_tap_stop_acq1 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_ACQ2 //@apireg:software:name setting_trig_acq2 //@apireg:value:appoint bit-width:16 ; 处理板对采集板2发出的触发信号做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC820; none //@apireg:note reg_hw_name:sync_trig_acq2 //@apireg:0xaddr 0X8800 | (((0X108&0XFF) << 2) | ((0X108&0X100) << 6)) 9'H108 : sync_trig_acq2 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_START_ACQ2 //@apireg:software:name sync_trig_TAP_start_acq2 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC824; none //@apireg:note reg_hw_name:sync_trig_tap_start_acq2 //@apireg:0xaddr 0X8800 | (((0X109&0XFF) << 2) | ((0X109&0X100) << 6)) 9'H109 : sync_trig_tap_start_acq2 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_STOP_ACQ2 //@apireg:software:name sync_trig_TAP_stop_acq2 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC828; none //@apireg:note reg_hw_name:sync_trig_tap_stop_acq2 //@apireg:0xaddr 0X8800 | (((0X10A&0XFF) << 2) | ((0X10A&0X100) << 6)) 9'H10A : sync_trig_tap_stop_acq2 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_ACQ3 //@apireg:software:name setting_trig_acq3 //@apireg:value:appoint bit-width:16 ; 处理板对采集板3发出的触发信号做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC82C; none //@apireg:note reg_hw_name:sync_trig_acq3 //@apireg:0xaddr 0X8800 | (((0X10B&0XFF) << 2) | ((0X10B&0X100) << 6)) 9'H10B : sync_trig_acq3 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_START_ACQ3 //@apireg:software:name sync_trig_TAP_start_acq3 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC830; none //@apireg:note reg_hw_name:sync_trig_tap_start_acq3 //@apireg:0xaddr 0X8800 | (((0X10C&0XFF) << 2) | ((0X10C&0X100) << 6)) 9'H10C : sync_trig_tap_start_acq3 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_STOP_ACQ3 //@apireg:software:name sync_trig_TAP_stop_acq3 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC834; none //@apireg:note reg_hw_name:sync_trig_tap_stop_acq3 //@apireg:0xaddr 0X8800 | (((0X10D&0XFF) << 2) | ((0X10D&0X100) << 6)) 9'H10D : sync_trig_tap_stop_acq3 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_ACQ4 //@apireg:software:name setting_trig_acq4 //@apireg:value:appoint bit-width:16 ; 处理板对采集板4发出的触发信号做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC838; none //@apireg:note reg_hw_name:sync_trig_acq4 //@apireg:0xaddr 0X8800 | (((0X10E&0XFF) << 2) | ((0X10E&0X100) << 6)) 9'H10E : sync_trig_acq4 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_START_ACQ4 //@apireg:software:name sync_trig_TAP_start_acq4 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC83C; none //@apireg:note reg_hw_name:sync_trig_tap_start_acq4 //@apireg:0xaddr 0X8800 | (((0X10F&0XFF) << 2) | ((0X10F&0X100) << 6)) 9'H10F : sync_trig_tap_start_acq4 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_STOP_ACQ4 //@apireg:software:name sync_trig_TAP_stop_acq4 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC840; none //@apireg:note reg_hw_name:sync_trig_tap_stop_acq4 //@apireg:0xaddr 0X8800 | (((0X110&0XFF) << 2) | ((0X110&0X100) << 6)) 9'H110 : sync_trig_tap_stop_acq4 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ1 //@apireg:software:name tap_load_set_trig_acq1 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC88C; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq1 //@apireg:0xaddr 0X8800 | (((0X123&0XFF) << 2) | ((0X123&0X100) << 6)) 9'H123 : sync_trig_tap_load_set_acq1 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ2 //@apireg:software:name tap_load_set_trig_acq2 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC890; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq2 //@apireg:0xaddr 0X8800 | (((0X124&0XFF) << 2) | ((0X124&0X100) << 6)) 9'H124 : sync_trig_tap_load_set_acq2 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ3 //@apireg:software:name tap_load_set_trig_acq3 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC894; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq3 //@apireg:0xaddr 0X8800 | (((0X125&0XFF) << 2) | ((0X125&0X100) << 6)) 9'H125 : sync_trig_tap_load_set_acq3 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ4 //@apireg:software:name tap_load_set_trig_acq4 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC898; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq4 //@apireg:0xaddr 0X8800 | (((0X126&0XFF) << 2) | ((0X126&0X100) << 6)) 9'H126 : sync_trig_tap_load_set_acq4 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ1 //@apireg:software:name tap_load_set_trig_locat_acq1 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC89C; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq1 //@apireg:0xaddr 0X8800 | (((0X127&0XFF) << 2) | ((0X127&0X100) << 6)) 9'H127 : sync_trig_locat_tap_load_set_acq1 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ2 //@apireg:software:name tap_load_set_trig_locat_acq2 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8A0; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq2 //@apireg:0xaddr 0X8800 | (((0X128&0XFF) << 2) | ((0X128&0X100) << 6)) 9'H128 : sync_trig_locat_tap_load_set_acq2 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ3 //@apireg:software:name tap_load_set_trig_locat_acq3 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8A4; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq3 //@apireg:0xaddr 0X8800 | (((0X129&0XFF) << 2) | ((0X129&0X100) << 6)) 9'H129 : sync_trig_locat_tap_load_set_acq3 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ4 //@apireg:software:name tap_load_set_trig_locat_acq4 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8A8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq4 //@apireg:0xaddr 0X8800 | (((0X12A&0XFF) << 2) | ((0X12A&0X100) << 6)) 9'H12A : sync_trig_locat_tap_load_set_acq4 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ5 //@apireg:software:name tap_load_set_trig_acq5 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8C4; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq5 //@apireg:0xaddr 0X8800 | (((0X131&0XFF) << 2) | ((0X131&0X100) << 6)) 9'H131 : sync_trig_tap_load_set_acq5 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ6 //@apireg:software:name tap_load_set_trig_acq6 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8C8; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq6 //@apireg:0xaddr 0X8800 | (((0X132&0XFF) << 2) | ((0X132&0X100) << 6)) 9'H132 : sync_trig_tap_load_set_acq6 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ7 //@apireg:software:name tap_load_set_trig_acq7 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8CC; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq7 //@apireg:0xaddr 0X8800 | (((0X133&0XFF) << 2) | ((0X133&0X100) << 6)) 9'H133 : sync_trig_tap_load_set_acq7 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ8 //@apireg:software:name tap_load_set_trig_acq8 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8D0; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq8 //@apireg:0xaddr 0X8800 | (((0X134&0XFF) << 2) | ((0X134&0X100) << 6)) 9'H134 : sync_trig_tap_load_set_acq8 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ5 //@apireg:software:name tap_load_set_trig_locat_acq5 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8D4; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq5 //@apireg:0xaddr 0X8800 | (((0X135&0XFF) << 2) | ((0X135&0X100) << 6)) 9'H135 : sync_trig_locat_tap_load_set_acq5 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ6 //@apireg:software:name tap_load_set_trig_locat_acq6 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8D8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq6 //@apireg:0xaddr 0X8800 | (((0X136&0XFF) << 2) | ((0X136&0X100) << 6)) 9'H136 : sync_trig_locat_tap_load_set_acq6 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ7 //@apireg:software:name tap_load_set_trig_locat_acq7 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8DC; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq7 //@apireg:0xaddr 0X8800 | (((0X137&0XFF) << 2) | ((0X137&0X100) << 6)) 9'H137 : sync_trig_locat_tap_load_set_acq7 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ8 //@apireg:software:name tap_load_set_trig_locat_acq8 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8E0; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq8 //@apireg:0xaddr 0X8800 | (((0X138&0XFF) << 2) | ((0X138&0X100) << 6)) 9'H138 : sync_trig_locat_tap_load_set_acq8 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ5 //@apireg:software:name setting_trig_locat_acq5 //@apireg:value:appoint bit-width:16 ; 处理板对采集板5发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC8E4; none //@apireg:note reg_hw_name:sync_trig_locat_acq5 //@apireg:0xaddr 0X8800 | (((0X139&0XFF) << 2) | ((0X139&0X100) << 6)) 9'H139 : sync_trig_locat_acq5 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ5 //@apireg:software:name sync_trig_locat_TAP_start_acq5 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC8E8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq5 //@apireg:0xaddr 0X8800 | (((0X13A&0XFF) << 2) | ((0X13A&0X100) << 6)) 9'H13A : sync_trig_locat_tap_start_acq5 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ5 //@apireg:software:name sync_trig_locat_TAP_stop_acq5 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC8EC; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq5 //@apireg:0xaddr 0X8800 | (((0X13B&0XFF) << 2) | ((0X13B&0X100) << 6)) 9'H13B : sync_trig_locat_tap_stop_acq5 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ6 //@apireg:software:name setting_trig_locat_acq6 //@apireg:value:appoint bit-width:16 ; 处理板对采集板6发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC8F0; none //@apireg:note reg_hw_name:sync_trig_locat_acq6 //@apireg:0xaddr 0X8800 | (((0X13C&0XFF) << 2) | ((0X13C&0X100) << 6)) 9'H13C : sync_trig_locat_acq6 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ6 //@apireg:software:name sync_trig_locat_TAP_start_acq6 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC8F4; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq6 //@apireg:0xaddr 0X8800 | (((0X13D&0XFF) << 2) | ((0X13D&0X100) << 6)) 9'H13D : sync_trig_locat_tap_start_acq6 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ6 //@apireg:software:name sync_trig_locat_TAP_stop_acq6 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC8F8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq6 //@apireg:0xaddr 0X8800 | (((0X13E&0XFF) << 2) | ((0X13E&0X100) << 6)) 9'H13E : sync_trig_locat_tap_stop_acq6 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ7 //@apireg:software:name setting_trig_locat_acq7 //@apireg:value:appoint bit-width:16 ; 处理板对采集板7发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC8FC; none //@apireg:note reg_hw_name:sync_trig_locat_acq7 //@apireg:0xaddr 0X8800 | (((0X13F&0XFF) << 2) | ((0X13F&0X100) << 6)) 9'H13F : sync_trig_locat_acq7 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ7 //@apireg:software:name sync_trig_locat_TAP_start_acq7 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC900; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq7 //@apireg:0xaddr 0X8800 | (((0X140&0XFF) << 2) | ((0X140&0X100) << 6)) 9'H140 : sync_trig_locat_tap_start_acq7 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ7 //@apireg:software:name sync_trig_locat_TAP_stop_acq7 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC904; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq7 //@apireg:0xaddr 0X8800 | (((0X141&0XFF) << 2) | ((0X141&0X100) << 6)) 9'H141 : sync_trig_locat_tap_stop_acq7 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ8 //@apireg:software:name setting_trig_locat_acq8 //@apireg:value:appoint bit-width:16 ; 处理板对采集板8发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC908; none //@apireg:note reg_hw_name:sync_trig_locat_acq8 //@apireg:0xaddr 0X8800 | (((0X142&0XFF) << 2) | ((0X142&0X100) << 6)) 9'H142 : sync_trig_locat_acq8 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ8 //@apireg:software:name sync_trig_locat_TAP_start_acq8 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC90C; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq8 //@apireg:0xaddr 0X8800 | (((0X143&0XFF) << 2) | ((0X143&0X100) << 6)) 9'H143 : sync_trig_locat_tap_start_acq8 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ8 //@apireg:software:name sync_trig_locat_TAP_stop_acq8 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC910; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq8 //@apireg:0xaddr 0X8800 | (((0X144&0XFF) << 2) | ((0X144&0X100) << 6)) 9'H144 : sync_trig_locat_tap_stop_acq8 <= cmd_iowr_d[15:0]; //@apireg:group:title scan_sync //@apireg:title DCM_RST_READBACK_TAP //@apireg:software:name DCM_RST_BACK //@apireg:value:appoint bit-width:16 ; 8bit回读比较序列，dcm_rst扫窗 //@apireg:desc abs-addr:0XC9AC; none //@apireg:note reg_hw_name:dcm_rst_readback_tap //@apireg:0xaddr 0X8800 | (((0X16B&0XFF) << 2) | ((0X16B&0X100) << 6)) 9'H16B : dcm_rst_readback_tap <= cmd_iowr_d[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_PRO_EN //@apireg:software:name pc_search_pro_en //@apireg:value:appoint bit-width:1 ; 波形搜索使能 //@apireg:desc abs-addr:0XC8B0; none //@apireg:note reg_hw_name:pc_search_pro_en //@apireg:0xaddr 0X8800 | (((0X12C&0XFF) << 2) | ((0X12C&0X100) << 6)) 9'H12C : pc_search_pro_en <= cmd_iowr_d[0:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_DATA_NUML16 //@apireg:software:name PC_search_data_numl16 //@apireg:value:appoint bit-width:16 ; 波形搜索单次最大搜索数据量低16位 //@apireg:desc abs-addr:0XC8B4; none //@apireg:note reg_hw_name:pc_search_data_numl16 //@apireg:0xaddr 0X8800 | (((0X12D&0XFF) << 2) | ((0X12D&0X100) << 6)) 9'H12D : pc_search_data_numl16 <= cmd_iowr_d[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_DATA_NUMH16 //@apireg:software:name PC_search_data_numh16 //@apireg:value:appoint bit-width:16 ; 波形搜索单次最大搜索数据量高16位 //@apireg:desc abs-addr:0XC8B8; none //@apireg:note reg_hw_name:pc_search_data_numh16 //@apireg:0xaddr 0X8800 | (((0X12E&0XFF) << 2) | ((0X12E&0X100) << 6)) 9'H12E : pc_search_data_numh16 <= cmd_iowr_d[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_POINT_NUM //@apireg:software:name PC_search_point_num //@apireg:value:appoint bit-width:16 ; 波形搜索单次最大搜索特征点数量 //@apireg:desc abs-addr:0XC8BC; none //@apireg:note reg_hw_name:pc_search_point_num //@apireg:0xaddr 0X8800 | (((0X12F&0XFF) << 2) | ((0X12F&0X100) << 6)) 9'H12F : pc_search_point_num <= cmd_iowr_d[15:0]; //@apireg:group:title search //@apireg:title PC_READ_EN //@apireg:software:name PC_read_en //@apireg:value:appoint bit-width:1 ; 波形搜索存储fifo单次读使能 //@apireg:desc abs-addr:0XC8C0; none //@apireg:note reg_hw_name:pc_read_en //@apireg:0xaddr 0X8800 | (((0X130&0XFF) << 2) | ((0X130&0X100) << 6)) 9'H130 : pc_read_en <= cmd_iowr_d[0:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_TYPE //@apireg:software:name pc_search_type //@apireg:value:appoint bit-width:11 ; 搜索类型选择[2:0]表示单双或la触发选择（0代表单通道二级触发） [6:3]代表单通道触发类型选择 [10:7]代表多通道触发类型选择 //@apireg:desc abs-addr:0XC914; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_type //@apireg:0xaddr 0X8800 | (((0X145&0XFF) << 2) | ((0X145&0X100) << 6)) 9'H145 : pc_search_type <= cmd_iowr_d[10:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_SOURCE_SEL //@apireg:software:name pc_search_source_sel //@apireg:value:appoint bit-width:3 ; 搜索数据源选择 //@apireg:desc abs-addr:0XC918; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_source_sel //@apireg:0xaddr 0X8800 | (((0X146&0XFF) << 2) | ((0X146&0X100) << 6)) 9'H146 : pc_search_source_sel <= cmd_iowr_d[2:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_EDGE_SEL //@apireg:software:name pc_search_edge_sel //@apireg:value:appoint bit-width:1 ; 边沿选择 1：上升沿 0：下降沿 //@apireg:desc abs-addr:0XC91C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_edge_sel //@apireg:0xaddr 0X8800 | (((0X147&0XFF) << 2) | ((0X147&0X100) << 6)) 9'H147 : pc_search_edge_sel <= cmd_iowr_d[0:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_PW_SET //@apireg:software:name pc_search_pw_set //@apireg:value:appoint bit-width:4 ; 脉宽设置(高2位代表极性，低两位判定条件) //@apireg:desc abs-addr:0XC920; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_pw_set //@apireg:0xaddr 0X8800 | (((0X148&0XFF) << 2) | ((0X148&0X100) << 6)) 9'H148 : pc_search_pw_set <= cmd_iowr_d[3:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_WINDOW_SET //@apireg:software:name pc_search_window_set //@apireg:value:appoint bit-width:3 ; 最高位判断极性，低两位判断搜索条件 //@apireg:desc abs-addr:0XC924; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_window_set //@apireg:0xaddr 0X8800 | (((0X149&0XFF) << 2) | ((0X149&0X100) << 6)) 9'H149 : pc_search_window_set <= cmd_iowr_d[2:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_RUNT_SET //@apireg:software:name pc_search_runt_set //@apireg:value:appoint bit-width:3 ; 最高位判断极性，低两位判断搜索条件 //@apireg:desc abs-addr:0XC928; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_runt_set //@apireg:0xaddr 0X8800 | (((0X14A&0XFF) << 2) | ((0X14A&0X100) << 6)) 9'H14A : pc_search_runt_set <= cmd_iowr_d[2:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_SLOPE_SET //@apireg:software:name pc_search_slope_set //@apireg:value:appoint bit-width:3 ; 最高位判断极性，低两位判断搜索条件 //@apireg:desc abs-addr:0XC92C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_slope_set //@apireg:0xaddr 0X8800 | (((0X14B&0XFF) << 2) | ((0X14B&0X100) << 6)) 9'H14B : pc_search_slope_set <= cmd_iowr_d[2:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_TIMEOUT_SET //@apireg:software:name pc_search_timeout_set //@apireg:value:appoint bit-width:1 ; 超时极性判断 //@apireg:desc abs-addr:0XC930; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_timeout_set //@apireg:0xaddr 0X8800 | (((0X14C&0XFF) << 2) | ((0X14C&0X100) << 6)) 9'H14C : pc_search_timeout_set <= cmd_iowr_d[0:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_DROPOUT_SET //@apireg:software:name pc_search_dropout_set //@apireg:value:appoint bit-width:1 ; 跌落极性判断 //@apireg:desc abs-addr:0XC934; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_dropout_set //@apireg:0xaddr 0X8800 | (((0X14D&0XFF) << 2) | ((0X14D&0X100) << 6)) 9'H14D : pc_search_dropout_set <= cmd_iowr_d[0:0]; //@apireg:group:title search //@apireg:title PC_SEAECH_CMP1_LEVEL_L //@apireg:software:name pc_seaech_cmp1_level_l //@apireg:value:appoint bit-width:12 ; 低电平组低电平 //@apireg:desc abs-addr:0XC938; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_seaech_cmp1_level_l //@apireg:0xaddr 0X8800 | (((0X14E&0XFF) << 2) | ((0X14E&0X100) << 6)) 9'H14E : pc_seaech_cmp1_level_l <= cmd_iowr_d[11:0]; //@apireg:group:title search //@apireg:title PC_SEAECH_CMP1_LEVEL_H //@apireg:software:name pc_seaech_cmp1_level_h //@apireg:value:appoint bit-width:12 ; 低电平组高电平 //@apireg:desc abs-addr:0XC93C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_seaech_cmp1_level_h //@apireg:0xaddr 0X8800 | (((0X14F&0XFF) << 2) | ((0X14F&0X100) << 6)) 9'H14F : pc_seaech_cmp1_level_h <= cmd_iowr_d[11:0]; //@apireg:group:title search //@apireg:title PC_SEAECH_CMP2_LEVEL_L //@apireg:software:name pc_seaech_cmp2_level_l //@apireg:value:appoint bit-width:12 ; 高电平组低电平 //@apireg:desc abs-addr:0XC940; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_seaech_cmp2_level_l //@apireg:0xaddr 0X8800 | (((0X150&0XFF) << 2) | ((0X150&0X100) << 6)) 9'H150 : pc_seaech_cmp2_level_l <= cmd_iowr_d[11:0]; //@apireg:group:title search //@apireg:title PC_SEAECH_CMP2_LEVEL_H //@apireg:software:name pc_seaech_cmp2_level_h //@apireg:value:appoint bit-width:12 ; 高电平组高电平 //@apireg:desc abs-addr:0XC944; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_seaech_cmp2_level_h //@apireg:0xaddr 0X8800 | (((0X151&0XFF) << 2) | ((0X151&0X100) << 6)) 9'H151 : pc_seaech_cmp2_level_h <= cmd_iowr_d[11:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA1_SETL //@apireg:software:name pc_search_configure_data1_setL //@apireg:value:appoint bit-width:16 ; 低电平组对应脉冲宽度设置低16位 //@apireg:desc abs-addr:0XC948; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data1_setl //@apireg:0xaddr 0X8800 | (((0X152&0XFF) << 2) | ((0X152&0X100) << 6)) 9'H152 : pc_search_configure_data1_setl <= cmd_iowr_d[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA1_SETM //@apireg:software:name pc_search_configure_data1_setM //@apireg:value:appoint bit-width:16 ; 低电平组对应脉冲宽度设置中16位 //@apireg:desc abs-addr:0XC94C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data1_setm //@apireg:0xaddr 0X8800 | (((0X153&0XFF) << 2) | ((0X153&0X100) << 6)) 9'H153 : pc_search_configure_data1_setm <= cmd_iowr_d[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA1_SETH //@apireg:software:name pc_search_configure_data1_setH //@apireg:value:appoint bit-width:16 ; 低电平组对应脉冲宽度设置高16位 //@apireg:desc abs-addr:0XC950; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data1_seth //@apireg:0xaddr 0X8800 | (((0X154&0XFF) << 2) | ((0X154&0X100) << 6)) 9'H154 : pc_search_configure_data1_seth <= cmd_iowr_d[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA2_SETL //@apireg:software:name pc_search_configure_data2_setL //@apireg:value:appoint bit-width:16 ; 高电平组对应脉冲宽度设置低16位 //@apireg:desc abs-addr:0XC954; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data2_setl //@apireg:0xaddr 0X8800 | (((0X155&0XFF) << 2) | ((0X155&0X100) << 6)) 9'H155 : pc_search_configure_data2_setl <= cmd_iowr_d[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA2_SETM //@apireg:software:name pc_search_configure_data2_setM //@apireg:value:appoint bit-width:16 ; 高电平组对应脉冲宽度设置中16位 //@apireg:desc abs-addr:0XC958; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data2_setm //@apireg:0xaddr 0X8800 | (((0X156&0XFF) << 2) | ((0X156&0X100) << 6)) 9'H156 : pc_search_configure_data2_setm <= cmd_iowr_d[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA2_SETH //@apireg:software:name pc_search_configure_data2_setH //@apireg:value:appoint bit-width:16 ; 高电平组对应脉冲宽度设置高16位 //@apireg:desc abs-addr:0XC95C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data2_seth //@apireg:0xaddr 0X8800 | (((0X157&0XFF) << 2) | ((0X157&0X100) << 6)) 9'H157 : pc_search_configure_data2_seth <= cmd_iowr_d[15:0]; //@apireg:group:title seg //@apireg:title PRO_DDR_RCD_RST_EN //@apireg:software:name pro_ddr_rcd_rst_en //@apireg:value:appoint bit-width:1 ; 处理板接收分段存储复位选择 //@apireg:desc abs-addr:0XC974; none //@apireg:note reg_hw_name:pro_ddr_rcd_rst_en //@apireg:0xaddr 0X8800 | (((0X15D&0XFF) << 2) | ((0X15D&0X100) << 6)) 9'H15D : pro_ddr_rcd_rst_en <= cmd_iowr_d[0:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_1ST_PRO_EXCLUDE_WIDTH1_L //@apireg:software:name pro_1st_exclude_width1_l //@apireg:value:appoint bit-width:16 ; 处理板一级排除触发下限 //@apireg:desc abs-addr:0XC86C; none //@apireg:note reg_hw_name:trig_1st_pro_exclude_width1_l //@apireg:0xaddr 0X8800 | (((0X11B&0XFF) << 2) | ((0X11B&0X100) << 6)) 9'H11B : trig_1st_pro_exclude_width1_l <= cmd_iowr_d[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_1ST_PRO_EXCLUDE_WIDTH1_H //@apireg:software:name pro_1st_exclude_width1_h //@apireg:value:appoint bit-width:16 ; 处理板一级排除触发下限 //@apireg:desc abs-addr:0XC870; none //@apireg:note reg_hw_name:trig_1st_pro_exclude_width1_h //@apireg:0xaddr 0X8800 | (((0X11C&0XFF) << 2) | ((0X11C&0X100) << 6)) 9'H11C : trig_1st_pro_exclude_width1_h <= cmd_iowr_d[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_1ST_PRO_EXCLUDE_WIDTH2_L //@apireg:software:name pro_1st_exclude_width2_l //@apireg:value:appoint bit-width:16 ; 处理板一级排除触发上限 //@apireg:desc abs-addr:0XC874; none //@apireg:note reg_hw_name:trig_1st_pro_exclude_width2_l //@apireg:0xaddr 0X8800 | (((0X11D&0XFF) << 2) | ((0X11D&0X100) << 6)) 9'H11D : trig_1st_pro_exclude_width2_l <= cmd_iowr_d[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_1ST_PRO_EXCLUDE_WIDTH2_H //@apireg:software:name pro_1st_exclude_width2_h //@apireg:value:appoint bit-width:16 ; 处理板一级排除触发上限 //@apireg:desc abs-addr:0XC878; none //@apireg:note reg_hw_name:trig_1st_pro_exclude_width2_h //@apireg:0xaddr 0X8800 | (((0X11E&0XFF) << 2) | ((0X11E&0X100) << 6)) 9'H11E : trig_1st_pro_exclude_width2_h <= cmd_iowr_d[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_2ND_PRO_EXCLUDE_WIDTH1_L //@apireg:software:name pro_2nd_exclude_width1_l //@apireg:value:appoint bit-width:16 ; 处理二级排除触发下限 //@apireg:desc abs-addr:0XC87C; none //@apireg:note reg_hw_name:trig_2nd_pro_exclude_width1_l //@apireg:0xaddr 0X8800 | (((0X11F&0XFF) << 2) | ((0X11F&0X100) << 6)) 9'H11F : trig_2nd_pro_exclude_width1_l <= cmd_iowr_d[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_2ND_PRO_EXCLUDE_WIDTH1_H //@apireg:software:name pro_2nd__exclude_width1_h //@apireg:value:appoint bit-width:16 ; 处理二级排除触发下限 //@apireg:desc abs-addr:0XC880; none //@apireg:note reg_hw_name:trig_2nd_pro_exclude_width1_h //@apireg:0xaddr 0X8800 | (((0X120&0XFF) << 2) | ((0X120&0X100) << 6)) 9'H120 : trig_2nd_pro_exclude_width1_h <= cmd_iowr_d[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_2ND_PRO_EXCLUDE_WIDTH2_L //@apireg:software:name pro_2nd__exclude_width2_l //@apireg:value:appoint bit-width:16 ; 处理二级排除触发上限 //@apireg:desc abs-addr:0XC884; none //@apireg:note reg_hw_name:trig_2nd_pro_exclude_width2_l //@apireg:0xaddr 0X8800 | (((0X121&0XFF) << 2) | ((0X121&0X100) << 6)) 9'H121 : trig_2nd_pro_exclude_width2_l <= cmd_iowr_d[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_2ND_PRO_EXCLUDE_WIDTH2_H //@apireg:software:name pro_2nd__exclude_width2_h //@apireg:value:appoint bit-width:16 ; 处理二级排除触发上限 //@apireg:desc abs-addr:0XC888; none //@apireg:note reg_hw_name:trig_2nd_pro_exclude_width2_h //@apireg:0xaddr 0X8800 | (((0X122&0XFF) << 2) | ((0X122&0X100) << 6)) 9'H122 : trig_2nd_pro_exclude_width2_h <= cmd_iowr_d[15:0]; default: begin end endcase end //////////////////////////////////////////////////////////////////////////////// //读寄存器 //////////////////////////////////////////////////////////////////////////////// always @ (posedge cmd_clk) begin if( dsp_iord_en_dly == 1'b1 ) begin //@apireg:write_read_attribute:attribute read case (cmd_addr[8:0]) //---------------------------------------------------------- //用户寄存器接口 //---------------------------------------------------------- //此处自动追加用户寄存器定义 //@INSERT_RD_REG_FLAG //@apireg:group:title Awg //@apireg:title DATA_AWG_RD //@apireg:software:name data_awg_rd //@apireg:value:appoint bit-width:16 ; 低八位是回读数据 //@apireg:desc abs-addr:0X890C; none //@apireg:note reg_hw_name:data_awg_rd //@apireg:0xaddr 0X8800 | (((0X43&0XFF) << 2) | ((0X43&0X100) << 6)) 9'H043 : cmd_iord_d <= data_awg_rd[15:0] ; //@apireg:group:title Decoder //@apireg:title RAM1_DATA_FLAG //@apireg:software:name RAM1DataFlag //@apireg:value:appoint bit-width:1 ; ram1中有新数据写入时拉高，否则拉低 //@apireg:desc abs-addr:0X88F8; RAM1中有新数据写入时拉高，否则拉低,,,, //@apireg:note reg_hw_name:ram1_data_flag //@apireg:0xaddr 0X8800 | (((0X3E&0XFF) << 2) | ((0X3E&0X100) << 6)) 9'H03E : cmd_iord_d <= {{15{1'B0}},ram1_data_flag[0:0]}; //@apireg:group:title Decoder //@apireg:title RAM2_DATA_FLAG //@apireg:software:name RAM2DataFlag //@apireg:value:appoint bit-width:1 ; ram2中有新数据写入时拉高，否则拉低 //@apireg:desc abs-addr:0X88FC; RAM2中有新数据写入时拉高，否则拉低,,,, //@apireg:note reg_hw_name:ram2_data_flag //@apireg:0xaddr 0X8800 | (((0X3F&0XFF) << 2) | ((0X3F&0X100) << 6)) 9'H03F : cmd_iord_d <= {{15{1'B0}},ram2_data_flag[0:0]}; //@apireg:group:title Dpo //@apireg:title DPO_CNT_SCREEN //@apireg:software:name FrameCount //@apireg:value:appoint bit-width:8 ; 8bit dpx映射幅数 //@apireg:desc abs-addr:0X8804; none //@apireg:note reg_hw_name:dpo_cnt_screen //@apireg:0xaddr 0X8800 | (((0X01&0XFF) << 2) | ((0X01&0X100) << 6)) 9'H001 : cmd_iord_d <= {{8{1'B0}},dpo_cnt_screen[7:0]}; //@apireg:group:title Dpo //@apireg:title DPO_MAP_DMAX //@apireg:software:name Map_dmax //@apireg:value:appoint bit-width:8 ; 8bit dpx内最大灰度值 //@apireg:desc abs-addr:0X8808; none //@apireg:note reg_hw_name:dpo_map_dmax //@apireg:0xaddr 0X8800 | (((0X02&0XFF) << 2) | ((0X02&0X100) << 6)) 9'H002 : cmd_iord_d <= {{8{1'B0}},dpo_map_dmax[7:0]}; //@apireg:group:title Dpo //@apireg:title DPO_STATE //@apireg:software:name Status //@apireg:value:appoint bit-width:7 ; 7bit dpx状态机状态 //@apireg:desc abs-addr:0X880C; 暂时无用,,,, //@apireg:note reg_hw_name:dpo_state //@apireg:0xaddr 0X8800 | (((0X03&0XFF) << 2) | ((0X03&0X100) << 6)) 9'H003 : cmd_iord_d <= {{9{1'B0}},dpo_state[6:0]}; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_READDATA //@apireg:software:name ReadData //@apireg:value:appoint bit-width:8 ; flash返回的数据，每次8bit //@apireg:desc abs-addr:0X8824; none //@apireg:note reg_hw_name:pro_config_flash_readdata //@apireg:0xaddr 0X8800 | (((0X09&0XFF) << 2) | ((0X09&0X100) << 6)) 9'H009 : cmd_iord_d <= {{8{1'B0}},pro_config_flash_readdata[7:0]}; //@apireg:group:title FPGA_PLL_STATE //@apireg:title PRO_DCLK_LOCKED //@apireg:software:name AllAcqDclkLocked //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X881C; 读取FPGA内部pll（主时钟）锁定， ; 1表示已锁定,,,, //@apireg:note reg_hw_name:pro_dclk_locked //@apireg:0xaddr 0X8800 | (((0X07&0XFF) << 2) | ((0X07&0X100) << 6)) 9'H007 : cmd_iord_d <= {{15{1'B0}},pro_dclk_locked[0:0]}; //@apireg:group:title FPGA_PLL_STATE //@apireg:title CRYSTAL_CLK_LOCKED //@apireg:software:name CrystalClkCocked //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8820; 读取FPGA内部pll（CRYSTAL_CLK） ; 锁定，1表示已锁定,,,, //@apireg:note reg_hw_name:crystal_clk_locked //@apireg:0xaddr 0X8800 | (((0X08&0XFF) << 2) | ((0X08&0X100) << 6)) 9'H008 : cmd_iord_d <= {{15{1'B0}},crystal_clk_locked[0:0]}; //@apireg:group:title FifoCtrl //@apireg:title PROG_FIFO_FULL_ALL //@apireg:software:name FullFlag //@apireg:value:appoint bit-width:16 ; software fifo 满标志[0]表示全部满，[x:1]表示各个通道 //@apireg:desc abs-addr:0X8810; 处理板软件FIFO变成满标志,复位拉低,,,, //@apireg:note reg_hw_name:prog_fifo_full_all //@apireg:0xaddr 0X8800 | (((0X04&0XFF) << 2) | ((0X04&0X100) << 6)) 9'H004 : cmd_iord_d <= prog_fifo_full_all[15:0] ; //@apireg:group:title FifoCtrl //@apireg:title SOFT_FIFO_DATA_COUNT_HIGH //@apireg:software:name ReadDataCount_H //@apireg:value:appoint bit-width:16 ; 28bits，num_of_pts //@apireg:desc abs-addr:0X8814; 回读软件FIFO中存入的数据量,,,, //@apireg:note reg_hw_name:soft_fifo_data_count_h12 //@apireg:0xaddr 0X8800 | (((0X05&0XFF) << 2) | ((0X05&0X100) << 6)) 9'H005 : cmd_iord_d <= soft_fifo_data_count_h12[15:0]; //@apireg:group:title FifoCtrl //@apireg:title SOFT_FIFO_DATA_COUNT_LOW //@apireg:software:name ReadDataCount_L //@apireg:value:appoint bit-width:16 ; 28bits，num_of_pts //@apireg:desc abs-addr:0X8818; 回读软件FIFO中存入的数据量,,,, //@apireg:note reg_hw_name:soft_fifo_data_count_l16 //@apireg:0xaddr 0X8800 | (((0X06&0XFF) << 2) | ((0X06&0X100) << 6)) 9'H006 : cmd_iord_d <= soft_fifo_data_count_l16[15:0]; //@apireg:group:title FifoCtrl //@apireg:title PRO_ASYNC_FIFO_FULL_FLAG //@apireg:software:name async_fifo_FullFlag //@apireg:value:appoint bit-width:16 ; 每一个采集卡接受的async fifofull，为1表示出现过满 //@apireg:desc abs-addr:0X8904; 处理板软件FIFO满标志,只要出现过满，就拉高，为高则表明异常,,,, //@apireg:note reg_hw_name:pro_async_fifo_full_flag //@apireg:0xaddr 0X8800 | (((0X41&0XFF) << 2) | ((0X41&0X100) << 6)) 9'H041 : cmd_iord_d <= pro_async_fifo_full_flag[15:0]; //@apireg:group:title FifoCtrl //@apireg:title PRO_REGUL_FIFO_FULL_FLAG //@apireg:software:name regul_fifo_FullFlag //@apireg:value:appoint bit-width:16 ; 1表示regular_fifo满，[0]表示全部满，[x:1]-各个通道 //@apireg:desc abs-addr:0X8908; 处理板并行regular FIFO满标志,,,,, //@apireg:note reg_hw_name:pro_regul_fifo_full_flag //@apireg:0xaddr 0X8800 | (((0X42&0XFF) << 2) | ((0X42&0X100) << 6)) 9'H042 : cmd_iord_d <= pro_regul_fifo_full_flag[15:0]; //@apireg:group:title LA //@apireg:title LA_TRIGLOCAL_LOCK //@apireg:software:name TrigLocalLock //@apireg:value:appoint bit-width:16 ; 6bit //@apireg:desc abs-addr:0X8828; 触发丢点数,,,, //@apireg:note reg_hw_name:la_triglocal_lock //@apireg:0xaddr 0X8800 | (((0X0A&0XFF) << 2) | ((0X0A&0X100) << 6)) 9'H00A : cmd_iord_d <= la_triglocal_lock[15:0] ; //@apireg:group:title LA //@apireg:title INIT_CALIB_COMPLETE_LA //@apireg:software:name InitCalibCpmplete //@apireg:value:appoint bit-width:1 ; ddr3硬件初始化完成标志，高有效 //@apireg:desc abs-addr:0X88DC; none //@apireg:note reg_hw_name:init_calib_complete_la //@apireg:0xaddr 0X8800 | (((0X37&0XFF) << 2) | ((0X37&0X100) << 6)) 9'H037 : cmd_iord_d <= {{15{1'B0}},init_calib_complete_la[0:0]}; //@apireg:group:title LA //@apireg:title DDR3_STATE_2PC_LA //@apireg:software:name DdrState //@apireg:value:appoint bit-width:1 ; 读写控制状态机的状态 //@apireg:desc abs-addr:0X88E0; none //@apireg:note reg_hw_name:ddr3_state_2pc_la //@apireg:0xaddr 0X8800 | (((0X38&0XFF) << 2) | ((0X38&0X100) << 6)) 9'H038 : cmd_iord_d <= {{15{1'B0}},ddr3_state_2pc_la[0:0]}; //@apireg:group:title LA //@apireg:title WR_STOP_FLAG_2PC_LA //@apireg:software:name DdrWriteFinished //@apireg:value:appoint bit-width:1 ; 写过程停止标志 //@apireg:desc abs-addr:0X88E4; none //@apireg:note reg_hw_name:wr_stop_flag_2pc_la //@apireg:0xaddr 0X8800 | (((0X39&0XFF) << 2) | ((0X39&0X100) << 6)) 9'H039 : cmd_iord_d <= {{15{1'B0}},wr_stop_flag_2pc_la[0:0]}; //@apireg:group:title LA //@apireg:title RD_STOP_FLAG_2PC_LA //@apireg:software:name DdrReadFinished //@apireg:value:appoint bit-width:1 ; 读过程停止标志 //@apireg:desc abs-addr:0X88E8; none //@apireg:note reg_hw_name:rd_stop_flag_2pc_la //@apireg:0xaddr 0X8800 | (((0X3A&0XFF) << 2) | ((0X3A&0X100) << 6)) 9'H03A : cmd_iord_d <= {{15{1'B0}},rd_stop_flag_2pc_la[0:0]}; //@apireg:group:title LA //@apireg:title DDR3_TRIG_ADDR_H_2PC_LA //@apireg:software:name DdrTrigAddrH //@apireg:value:appoint bit-width:16 ; 触发信号所在触发地址高13位 //@apireg:desc abs-addr:0X88EC; none //@apireg:note reg_hw_name:ddr3_trig_addr_h_2pc_la //@apireg:0xaddr 0X8800 | (((0X3B&0XFF) << 2) | ((0X3B&0X100) << 6)) 9'H03B : cmd_iord_d <= ddr3_trig_addr_h_2pc_la[15:0]; //@apireg:group:title LA //@apireg:title DDR3_TRIG_ADDR_L_2PC_LA //@apireg:software:name DdrTrigAddrL //@apireg:value:appoint bit-width:16 ; 触发信号所在触发地址低16位 //@apireg:desc abs-addr:0X88F0; none //@apireg:note reg_hw_name:ddr3_trig_addr_l_2pc_la //@apireg:0xaddr 0X8800 | (((0X3C&0XFF) << 2) | ((0X3C&0X100) << 6)) 9'H03C : cmd_iord_d <= ddr3_trig_addr_l_2pc_la[15:0]; //@apireg:group:title LA //@apireg:title DDR3_POS_TRIG_FLAG_2PC_LA //@apireg:software:name DdrTrigFlag //@apireg:value:appoint bit-width:1 ; 写地址模块产生触发地址时的标志 //@apireg:desc abs-addr:0X88F4; none //@apireg:note reg_hw_name:ddr3_pos_trig_flag_2pc_la //@apireg:0xaddr 0X8800 | (((0X3D&0XFF) << 2) | ((0X3D&0X100) << 6)) 9'H03D : cmd_iord_d <= {{15{1'B0}},ddr3_pos_trig_flag_2pc_la[0:0]}; //@apireg:group:title RegMonitor //@apireg:title PRO_READ_WREG_DATA //@apireg:software:name ReadbackValue //@apireg:value:appoint bit-width:16 ; read back write-register //@apireg:desc abs-addr:0X882C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_read_wreg_data //@apireg:0xaddr 0X8800 | (((0X0B&0XFF) << 2) | ((0X0B&0X100) << 6)) 9'H00B : cmd_iord_d <= pro_read_wreg_data[15:0] ; //@apireg:group:title Scan //@apireg:title SCAN_DATACOUNT_UPLOADING //@apireg:software:name DatacountUploading //@apireg:value:appoint bit-width:14 ; 14bit:soft_fifo的计数值 //@apireg:desc abs-addr:0X8830; none //@apireg:note reg_hw_name:scan_datacount_uploading //@apireg:0xaddr 0X8800 | (((0X0C&0XFF) << 2) | ((0X0C&0X100) << 6)) 9'H00C : cmd_iord_d <= {{2{1'B0}},scan_datacount_uploading[13:0]}; //@apireg:group:title SerdesSync //@apireg:title PRO_ISERDES_PLL_LOCKED //@apireg:software:name pro_iserdes_pll_locked //@apireg:value:appoint bit-width:4 ; 板间通信随路时钟至接收端pll锁定信号 //@apireg:desc abs-addr:0X8834; none //@apireg:note reg_hw_name:pro_iserdes_pll_locked //@apireg:0xaddr 0X8800 | (((0X0D&0XFF) << 2) | ((0X0D&0X100) << 6)) 9'H00D : cmd_iord_d <= {{12{1'B0}},pro_iserdes_pll_locked[3:0]}; //@apireg:group:title SerdesSync //@apireg:title PRO_ISERDES_SYNC_DONE //@apireg:software:name pro_iserdes_sync_done //@apireg:value:appoint bit-width:15 ; 板间通信扫窗完成标志信号 //@apireg:desc abs-addr:0X8838; none //@apireg:note reg_hw_name:pro_iserdes_sync_done //@apireg:0xaddr 0X8800 | (((0X0E&0XFF) << 2) | ((0X0E&0X100) << 6)) 9'H00E : cmd_iord_d <= {{1{1'B0}},pro_iserdes_sync_done[14:0]}; //@apireg:group:title SysInfo //@apireg:title PRO_REG_READ_BACK //@apireg:software:name WorkOKTest //@apireg:value:appoint bit-width:16 ; 16bits_data //@apireg:desc abs-addr:0XCBF8; SPI写数据（共24bit，分高低位） 低8位,,,, //@apireg:note reg_hw_name:pro_reg_read_back //@apireg:0xaddr 0X8800 | (((0X1FE&0XFF) << 2) | ((0X1FE&0X100) << 6)) 9'H1FE : cmd_iord_d <= pro_reg_read_back[15:0] ; //@apireg:group:title SysMon //@apireg:title PRO_FPGA_TEMP //@apireg:software:name pro_fpga_temp //@apireg:value:appoint bit-width:13 ; 处理板fpga的温度，共13bit,其中bit12为数据有效标志,1有效；bit[11:0]为温度值，无符号数,公式 temprature(℃) = (adc_code * 503.975) / 4096 -273.15 其中，adc_code对应temprature寄存器中的值 //@apireg:desc abs-addr:0X883C; none //@apireg:note reg_hw_name:pro_fpga_temp //@apireg:0xaddr 0X8800 | (((0X0F&0XFF) << 2) | ((0X0F&0X100) << 6)) 9'H00F : cmd_iord_d <= {{3{1'B0}},pro_fpga_temp[12:0]}; //@apireg:group:title SysMon //@apireg:title PRO_FPGA_VCCAUX //@apireg:software:name pro_fpga_vccaux //@apireg:value:appoint bit-width:13 ; 处理板fpga的辅助电压，共13bit,其中bit12为数据有效标志,1有效；bit[11:0]为电压值，无符号数,公式 vccaux(v) = adc_code / 4096 * 3 其中，adc_code对应vccaux寄存器中的值 //@apireg:desc abs-addr:0X8840; none //@apireg:note reg_hw_name:pro_fpga_vccaux //@apireg:0xaddr 0X8800 | (((0X10&0XFF) << 2) | ((0X10&0X100) << 6)) 9'H010 : cmd_iord_d <= {{3{1'B0}},pro_fpga_vccaux[12:0]}; //@apireg:group:title SysMon //@apireg:title PRO_FPGA_VCCBRAM //@apireg:software:name pro_fpga_vccbram //@apireg:value:appoint bit-width:13 ; 处理板fpga的bram电压，共13bit,其中bit12为数据有效标志,1有效；bit[11:0]为电压值，无符号数,公式 vccbram(v) = adc_code / 4096 * 3 其中，adc_code对应vccbram寄存器中的值 //@apireg:desc abs-addr:0X8844; 处理板系统检测模块复位,,,, //@apireg:note reg_hw_name:pro_fpga_vccbram //@apireg:0xaddr 0X8800 | (((0X11&0XFF) << 2) | ((0X11&0X100) << 6)) 9'H011 : cmd_iord_d <= {{3{1'B0}},pro_fpga_vccbram[12:0]}; //@apireg:group:title SysMon //@apireg:title PRO_FPGA_VCCINT //@apireg:software:name pro_fpga_vccint //@apireg:value:appoint bit-width:13 ; 处理板fpga的内核电压，共13bit,其中bit12为数据有效标志,1有效；bit[11:0]为电压值，无符号数,公式 vccint(v) = adc_code / 4096 * 3 其中，adc_code对应vccint寄存器中的值 //@apireg:desc abs-addr:0X8848; none //@apireg:note reg_hw_name:pro_fpga_vccint //@apireg:0xaddr 0X8800 | (((0X12&0XFF) << 2) | ((0X12&0X100) << 6)) 9'H012 : cmd_iord_d <= {{3{1'B0}},pro_fpga_vccint[12:0]}; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIGGERTIMEOVER //@apireg:software:name IsTimeOver //@apireg:value:appoint bit-width:1 ; 1bit, 1：触发超时 //@apireg:desc abs-addr:0X884C; 触发超时,,,, //@apireg:note reg_hw_name:trig_module_triggertimeover //@apireg:0xaddr 0X8800 | (((0X13&0XFF) << 2) | ((0X13&0X100) << 6)) 9'H013 : cmd_iord_d <= {{15{1'B0}},trig_module_triggertimeover[0:0]}; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIGGERSTATUS //@apireg:software:name Status //@apireg:value:appoint bit-width:3 ; 3bits，bit0：ready_status，bit1：auto_status，bit2：trigged_status //@apireg:desc abs-addr:0X8850; 发往软件用于显示触发状态,,,, //@apireg:note reg_hw_name:trig_module_triggerstatus //@apireg:0xaddr 0X8800 | (((0X14&0XFF) << 2) | ((0X14&0X100) << 6)) 9'H014 : cmd_iord_d <= {{13{1'B0}},trig_module_triggerstatus[2:0]}; //@apireg:group:title 1st //@apireg:title TRIG_PERIOD_READ_H //@apireg:software:name trig_period_readH //@apireg:value:appoint bit-width:16 ; 触发信号周期回读 //@apireg:desc abs-addr:0X8998; none //@apireg:note reg_hw_name:trig_period_read_h //@apireg:0xaddr 0X8800 | (((0X66&0XFF) << 2) | ((0X66&0X100) << 6)) 9'H066 : cmd_iord_d <= trig_period_read_h[15:0] ; //@apireg:group:title 1st //@apireg:title TRIG_PERIOD_READ_L //@apireg:software:name trig_period_readL //@apireg:value:appoint bit-width:16 ; 触发信号周期回读 //@apireg:desc abs-addr:0X899C; none //@apireg:note reg_hw_name:trig_period_read_l //@apireg:0xaddr 0X8800 | (((0X67&0XFF) << 2) | ((0X67&0X100) << 6)) 9'H067 : cmd_iord_d <= trig_period_read_l[15:0] ; //@apireg:group:title 1st //@apireg:title TRIG_1ST_DATA_PARA_REG_ACQ1 //@apireg:software:name trig_1st_data_para_reg_acq1 //@apireg:value:appoint bit-width:8 ; 回读触发值，8位 //@apireg:desc abs-addr:0X89A0; none //@apireg:note reg_hw_name:trig_1st_data_para_reg_acq1 //@apireg:0xaddr 0X8800 | (((0X68&0XFF) << 2) | ((0X68&0X100) << 6)) 9'H068 : cmd_iord_d <= {{8{1'B0}},trig_1st_data_para_reg_acq1[7:0]}; //@apireg:group:title 1st //@apireg:title TRIG_1ST_DATA_PARA_REG_ACQ2 //@apireg:software:name trig_1st_data_para_reg_acq2 //@apireg:value:appoint bit-width:8 ; 回读触发值，8位 //@apireg:desc abs-addr:0X89A4; none //@apireg:note reg_hw_name:trig_1st_data_para_reg_acq2 //@apireg:0xaddr 0X8800 | (((0X69&0XFF) << 2) | ((0X69&0X100) << 6)) 9'H069 : cmd_iord_d <= {{8{1'B0}},trig_1st_data_para_reg_acq2[7:0]}; //@apireg:group:title 1st //@apireg:title TRIG_1ST_DATA_PARA_REG_ACQ3 //@apireg:software:name trig_1st_data_para_reg_acq3 //@apireg:value:appoint bit-width:8 ; 回读触发值，8位 //@apireg:desc abs-addr:0X89A8; none //@apireg:note reg_hw_name:trig_1st_data_para_reg_acq3 //@apireg:0xaddr 0X8800 | (((0X6A&0XFF) << 2) | ((0X6A&0X100) << 6)) 9'H06A : cmd_iord_d <= {{8{1'B0}},trig_1st_data_para_reg_acq3[7:0]}; //@apireg:group:title 1st //@apireg:title TRIG_1ST_DATA_PARA_REG_ACQ4 //@apireg:software:name trig_1st_data_para_reg_acq4 //@apireg:value:appoint bit-width:8 ; 回读触发值，8位 //@apireg:desc abs-addr:0X89AC; none //@apireg:note reg_hw_name:trig_1st_data_para_reg_acq4 //@apireg:0xaddr 0X8800 | (((0X6B&0XFF) << 2) | ((0X6B&0X100) << 6)) 9'H06B : cmd_iord_d <= {{8{1'B0}},trig_1st_data_para_reg_acq4[7:0]}; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_EDGE_TRIG_NUM //@apireg:software:name ReadTrigPosition //@apireg:value:appoint bit-width:7 ; 7bits，position_of_trig //@apireg:desc abs-addr:0X8854; 2极触发触发位置回读,,,, //@apireg:note reg_hw_name:trig_2nd_edge_trig_location //@apireg:0xaddr 0X8800 | (((0X15&0XFF) << 2) | ((0X15&0X100) << 6)) 9'H015 : cmd_iord_d <= {{9{1'B0}},trig_2nd_edge_trig_location[6:0]}; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_SEARCH_CNT //@apireg:software:name search_cnt //@apireg:value:appoint bit-width:16 ; [15] 返回查找触发计数有效标志 ; [14:0] 返回查找触发计数有效值 //@apireg:desc abs-addr:0X88C4; none //@apireg:note reg_hw_name:trig_2nd_search_cnt //@apireg:0xaddr 0X8800 | (((0X31&0XFF) << 2) | ((0X31&0X100) << 6)) 9'H031 : cmd_iord_d <= trig_2nd_search_cnt[15:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCA_SYNC_RESULT //@apireg:software:name LocationSyncResult //@apireg:value:appoint bit-width:16 ; 16bits idelay模块使能结果 //@apireg:desc abs-addr:0X8858; 预留,,,, //@apireg:note reg_hw_name:trig_pro_loca_sync_result //@apireg:0xaddr 0X8800 | (((0X16&0XFF) << 2) | ((0X16&0X100) << 6)) 9'H016 : cmd_iord_d <= trig_pro_loca_sync_result[15:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCA_SYNC_RESULT_EXT //@apireg:software:name LocationSyncResultExt //@apireg:value:appoint bit-width:16 ; 16bits idelay模块使能结果 预留扩展位 //@apireg:desc abs-addr:0X885C; 回读Idelay模块设置值扩展,,,, //@apireg:note reg_hw_name:trig_pro_loca_sync_result_ext //@apireg:0xaddr 0X8800 | (((0X17&0XFF) << 2) | ((0X17&0X100) << 6)) 9'H017 : cmd_iord_d <= trig_pro_loca_sync_result_ext[15:0]; //@apireg:group:title TriggerSync //@apireg:title TRIGGER_SYNC_SYNC_FLAG_TRIG //@apireg:software:name SyncFlagTrig //@apireg:value:appoint bit-width:8 ; 触发信号扫窗成功标志，bit0：acq1触发信号，bit1：acq2触发信号，bit2：acq3触发信号，bit3：acq4触发信号。 //@apireg:desc abs-addr:0X88C0; none //@apireg:note reg_hw_name:trigger_sync_sync_flag_trig //@apireg:0xaddr 0X8800 | (((0X30&0XFF) << 2) | ((0X30&0X100) << 6)) 9'H030 : cmd_iord_d <= {{8{1'B0}},trigger_sync_sync_flag_trig[7:0]}; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD0 //@apireg:software:name CommentWord0 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8860; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word0 //@apireg:0xaddr 0X8800 | (((0X18&0XFF) << 2) | ((0X18&0X100) << 6)) 9'H018 : cmd_iord_d <= pro_version_comment_word0[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD1 //@apireg:software:name CommentWord1 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8864; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word1 //@apireg:0xaddr 0X8800 | (((0X19&0XFF) << 2) | ((0X19&0X100) << 6)) 9'H019 : cmd_iord_d <= pro_version_comment_word1[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD10 //@apireg:software:name CommentWord10 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8868; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word10 //@apireg:0xaddr 0X8800 | (((0X1A&0XFF) << 2) | ((0X1A&0X100) << 6)) 9'H01A : cmd_iord_d <= pro_version_comment_word10[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD11 //@apireg:software:name CommentWord11 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X886C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word11 //@apireg:0xaddr 0X8800 | (((0X1B&0XFF) << 2) | ((0X1B&0X100) << 6)) 9'H01B : cmd_iord_d <= pro_version_comment_word11[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD12 //@apireg:software:name CommentWord12 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8870; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word12 //@apireg:0xaddr 0X8800 | (((0X1C&0XFF) << 2) | ((0X1C&0X100) << 6)) 9'H01C : cmd_iord_d <= pro_version_comment_word12[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD13 //@apireg:software:name CommentWord13 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8874; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word13 //@apireg:0xaddr 0X8800 | (((0X1D&0XFF) << 2) | ((0X1D&0X100) << 6)) 9'H01D : cmd_iord_d <= pro_version_comment_word13[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD14 //@apireg:software:name CommentWord14 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8878; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word14 //@apireg:0xaddr 0X8800 | (((0X1E&0XFF) << 2) | ((0X1E&0X100) << 6)) 9'H01E : cmd_iord_d <= pro_version_comment_word14[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD15 //@apireg:software:name CommentWord15 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X887C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word15 //@apireg:0xaddr 0X8800 | (((0X1F&0XFF) << 2) | ((0X1F&0X100) << 6)) 9'H01F : cmd_iord_d <= pro_version_comment_word15[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD2 //@apireg:software:name CommentWord2 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8880; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word2 //@apireg:0xaddr 0X8800 | (((0X20&0XFF) << 2) | ((0X20&0X100) << 6)) 9'H020 : cmd_iord_d <= pro_version_comment_word2[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD3 //@apireg:software:name CommentWord3 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8884; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word3 //@apireg:0xaddr 0X8800 | (((0X21&0XFF) << 2) | ((0X21&0X100) << 6)) 9'H021 : cmd_iord_d <= pro_version_comment_word3[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD4 //@apireg:software:name CommentWord4 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8888; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word4 //@apireg:0xaddr 0X8800 | (((0X22&0XFF) << 2) | ((0X22&0X100) << 6)) 9'H022 : cmd_iord_d <= pro_version_comment_word4[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD5 //@apireg:software:name CommentWord5 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X888C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word5 //@apireg:0xaddr 0X8800 | (((0X23&0XFF) << 2) | ((0X23&0X100) << 6)) 9'H023 : cmd_iord_d <= pro_version_comment_word5[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD6 //@apireg:software:name CommentWord6 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8890; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word6 //@apireg:0xaddr 0X8800 | (((0X24&0XFF) << 2) | ((0X24&0X100) << 6)) 9'H024 : cmd_iord_d <= pro_version_comment_word6[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD7 //@apireg:software:name CommentWord7 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8894; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word7 //@apireg:0xaddr 0X8800 | (((0X25&0XFF) << 2) | ((0X25&0X100) << 6)) 9'H025 : cmd_iord_d <= pro_version_comment_word7[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD8 //@apireg:software:name CommentWord8 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X8898; 版本信息，备注,,,, //@apireg:note reg_hw_name:pro_version_comment_word8 //@apireg:0xaddr 0X8800 | (((0X26&0XFF) << 2) | ((0X26&0X100) << 6)) 9'H026 : cmd_iord_d <= pro_version_comment_word8[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_COMMENT_WORD9 //@apireg:software:name CommentWord9 //@apireg:value:appoint bit-width:16 ; 256bits_info //@apireg:desc abs-addr:0X889C; 版本信息，设计者,,,, //@apireg:note reg_hw_name:pro_version_comment_word9 //@apireg:0xaddr 0X8800 | (((0X27&0XFF) << 2) | ((0X27&0X100) << 6)) 9'H027 : cmd_iord_d <= pro_version_comment_word9[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_TIME_WORD0 //@apireg:software:name CompileTimeWord0 //@apireg:value:appoint bit-width:16 ; low_16bits_of_32bits //@apireg:desc abs-addr:0X88A0; 版本信息，编译时间,,,, //@apireg:note reg_hw_name:pro_version_time_word0 //@apireg:0xaddr 0X8800 | (((0X28&0XFF) << 2) | ((0X28&0X100) << 6)) 9'H028 : cmd_iord_d <= pro_version_time_word0[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_TIME_WORD1 //@apireg:software:name CompileTimeWord1 //@apireg:value:appoint bit-width:16 ; high_16bits_of_32bits //@apireg:desc abs-addr:0X88A4; 版本信息，版本号,,,, //@apireg:note reg_hw_name:pro_version_time_word1 //@apireg:0xaddr 0X8800 | (((0X29&0XFF) << 2) | ((0X29&0X100) << 6)) 9'H029 : cmd_iord_d <= pro_version_time_word1[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_DESIGNER_WORD0 //@apireg:software:name DesignerWord0 //@apireg:value:appoint bit-width:16 ; 64bits_info //@apireg:desc abs-addr:0X88A8; 版本信息，设计者,,,, //@apireg:note reg_hw_name:pro_version_designer_word0 //@apireg:0xaddr 0X8800 | (((0X2A&0XFF) << 2) | ((0X2A&0X100) << 6)) 9'H02A : cmd_iord_d <= pro_version_designer_word0[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_DESIGNER_WORD1 //@apireg:software:name DesignerWord1 //@apireg:value:appoint bit-width:16 ; 64bits_info //@apireg:desc abs-addr:0X88AC; 版本信息，设计者,,,, //@apireg:note reg_hw_name:pro_version_designer_word1 //@apireg:0xaddr 0X8800 | (((0X2B&0XFF) << 2) | ((0X2B&0X100) << 6)) 9'H02B : cmd_iord_d <= pro_version_designer_word1[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_DESIGNER_WORD2 //@apireg:software:name DesignerWord2 //@apireg:value:appoint bit-width:16 ; 64bits_info //@apireg:desc abs-addr:0X88B0; 版本信息，设计者,,,, //@apireg:note reg_hw_name:pro_version_designer_word2 //@apireg:0xaddr 0X8800 | (((0X2C&0XFF) << 2) | ((0X2C&0X100) << 6)) 9'H02C : cmd_iord_d <= pro_version_designer_word2[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_DESIGNER_WORD3 //@apireg:software:name DesignerWord3 //@apireg:value:appoint bit-width:16 ; 64bits_info //@apireg:desc abs-addr:0X88B4; 版本信息，编译时间,,,, //@apireg:note reg_hw_name:pro_version_designer_word3 //@apireg:0xaddr 0X8800 | (((0X2D&0XFF) << 2) | ((0X2D&0X100) << 6)) 9'H02D : cmd_iord_d <= pro_version_designer_word3[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_VERSION_WORD0 //@apireg:software:name VersionWord0 //@apireg:value:appoint bit-width:16 ; low_16bits_of_32bits //@apireg:desc abs-addr:0X88B8; 版本信息，版本号,,,, //@apireg:note reg_hw_name:pro_version_version_word0 //@apireg:0xaddr 0X8800 | (((0X2E&0XFF) << 2) | ((0X2E&0X100) << 6)) 9'H02E : cmd_iord_d <= pro_version_version_word0[15:0]; //@apireg:group:title VersionInfo //@apireg:title PRO_VERSION_VERSION_WORD1 //@apireg:software:name VersionWord1 //@apireg:value:appoint bit-width:16 ; high_16bits_of_32bits //@apireg:desc abs-addr:0X88BC; 16位数据，由此寄存器写入，再由此寄存器读出，两者数据一致，表明上电OK。,,,, //@apireg:note reg_hw_name:pro_version_version_word1 //@apireg:0xaddr 0X8800 | (((0X2F&0XFF) << 2) | ((0X2F&0X100) << 6)) 9'H02F : cmd_iord_d <= pro_version_version_word1[15:0]; //@apireg:group:title dbi //@apireg:title DBI_FREQUENCY_INDEX //@apireg:software:name dbi_frequency_index //@apireg:value:appoint bit-width:10 ; 指示最高幅度对应的频率值，[6]代表有效使能位 //@apireg:desc abs-addr:0X88C8; none //@apireg:note reg_hw_name:dbi_frequency_index //@apireg:0xaddr 0X8800 | (((0X32&0XFF) << 2) | ((0X32&0X100) << 6)) 9'H032 : cmd_iord_d <= {{6{1'B0}},dbi_frequency_index[9:0]}; //@apireg:group:title dbi //@apireg:title DBI_MAX_AMPLITUDE_L16 //@apireg:software:name dbi_max_amplitude_l16 //@apireg:value:appoint bit-width:16 ; dbi频率计测量幅度值低16位 //@apireg:desc abs-addr:0X88D4; none //@apireg:note reg_hw_name:dbi_max_amplitude_l16 //@apireg:0xaddr 0X8800 | (((0X35&0XFF) << 2) | ((0X35&0X100) << 6)) 9'H035 : cmd_iord_d <= dbi_max_amplitude_l16[15:0]; //@apireg:group:title dbi //@apireg:title DBI_MAX_AMPLITUDE_H8 //@apireg:software:name dbi_max_amplitude_h8 //@apireg:value:appoint bit-width:8 ; dbi频率计测量幅度值高8位 //@apireg:desc abs-addr:0X88D8; none //@apireg:note reg_hw_name:dbi_max_amplitude_h8 //@apireg:0xaddr 0X8800 | (((0X36&0XFF) << 2) | ((0X36&0X100) << 6)) 9'H036 : cmd_iord_d <= {{8{1'B0}},dbi_max_amplitude_h8[7:0]}; //@apireg:group:title ext_10m //@apireg:title STATUS_OF_CLOCK //@apireg:software:name status_of_clock //@apireg:value:appoint bit-width:16 ; [0]:外部10m锁定状态 1锁定，0未锁定 //@apireg:desc abs-addr:0X8900; none //@apireg:note reg_hw_name:status_of_clock //@apireg:0xaddr 0X8800 | (((0X40&0XFF) << 2) | ((0X40&0X100) << 6)) 9'H040 : cmd_iord_d <= status_of_clock[15:0] ; //@apireg:group:title reverse //@apireg:title PRO_REVERSE_RD_REG_0 //@apireg:software:name pro_reverse_rd_reg_0 //@apireg:value:appoint bit-width:16 ; 处理板备用读寄存器 //@apireg:desc abs-addr:0X88CC; none //@apireg:note reg_hw_name:pro_reverse_rd_reg_0 //@apireg:0xaddr 0X8800 | (((0X33&0XFF) << 2) | ((0X33&0X100) << 6)) 9'H033 : cmd_iord_d <= pro_reverse_rd_reg_0[15:0]; //@apireg:group:title reverse //@apireg:title PRO_REVERSE_RD_REG_1 //@apireg:software:name pro_reverse_rd_reg_1 //@apireg:value:appoint bit-width:16 ; 处理板备用读寄存器 //@apireg:desc abs-addr:0X88D0; none //@apireg:note reg_hw_name:pro_reverse_rd_reg_1 //@apireg:0xaddr 0X8800 | (((0X34&0XFF) << 2) | ((0X34&0X100) << 6)) 9'H034 : cmd_iord_d <= pro_reverse_rd_reg_1[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_FLAG_ACQ1 //@apireg:software:name sync_trig_locat_flag_acq1 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X8910; none //@apireg:note reg_hw_name:sync_trig_locat_flag_acq1 //@apireg:0xaddr 0X8800 | (((0X44&0XFF) << 2) | ((0X44&0X100) << 6)) 9'H044 : cmd_iord_d <= {{14{1'B0}},sync_trig_locat_flag_acq1[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_FLAG_ACQ2 //@apireg:software:name sync_trig_locat_flag_acq2 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X8914; none //@apireg:note reg_hw_name:sync_trig_locat_flag_acq2 //@apireg:0xaddr 0X8800 | (((0X45&0XFF) << 2) | ((0X45&0X100) << 6)) 9'H045 : cmd_iord_d <= {{14{1'B0}},sync_trig_locat_flag_acq2[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_FLAG_ACQ3 //@apireg:software:name sync_trig_locat_flag_acq3 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X8918; none //@apireg:note reg_hw_name:sync_trig_locat_flag_acq3 //@apireg:0xaddr 0X8800 | (((0X46&0XFF) << 2) | ((0X46&0X100) << 6)) 9'H046 : cmd_iord_d <= {{14{1'B0}},sync_trig_locat_flag_acq3[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_FLAG_ACQ4 //@apireg:software:name sync_trig_locat_flag_acq4 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X891C; none //@apireg:note reg_hw_name:sync_trig_locat_flag_acq4 //@apireg:0xaddr 0X8800 | (((0X47&0XFF) << 2) | ((0X47&0X100) << 6)) 9'H047 : cmd_iord_d <= {{14{1'B0}},sync_trig_locat_flag_acq4[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_FLASH_SCAN_STATUS_PRO //@apireg:software:name sync_flag_pro //@apireg:value:appoint bit-width:16 ; 采集板到处理板触发位置传输的flash scan flag::[4]:delay_ctrl_lock[3]-wr_en,[2]-rd_en,[1]-rst,[0]-trig_locate //@apireg:desc abs-addr:0X8920; none //@apireg:note reg_hw_name:sync_flash_scan_status_pro //@apireg:0xaddr 0X8800 | (((0X48&0XFF) << 2) | ((0X48&0X100) << 6)) 9'H048 : cmd_iord_d <= sync_flash_scan_status_pro[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_FLAG_ACQ1 //@apireg:software:name sync_trig_flag_acq1 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X8924; none //@apireg:note reg_hw_name:sync_trig_flag_acq1 //@apireg:0xaddr 0X8800 | (((0X49&0XFF) << 2) | ((0X49&0X100) << 6)) 9'H049 : cmd_iord_d <= {{14{1'B0}},sync_trig_flag_acq1[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_FLAG_ACQ2 //@apireg:software:name sync_trig_flag_acq2 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X8928; none //@apireg:note reg_hw_name:sync_trig_flag_acq2 //@apireg:0xaddr 0X8800 | (((0X4A&0XFF) << 2) | ((0X4A&0X100) << 6)) 9'H04A : cmd_iord_d <= {{14{1'B0}},sync_trig_flag_acq2[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_FLAG_ACQ3 //@apireg:software:name sync_trig_flag_acq3 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X892C; none //@apireg:note reg_hw_name:sync_trig_flag_acq3 //@apireg:0xaddr 0X8800 | (((0X4B&0XFF) << 2) | ((0X4B&0X100) << 6)) 9'H04B : cmd_iord_d <= {{14{1'B0}},sync_trig_flag_acq3[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_FLAG_ACQ4 //@apireg:software:name sync_trig_flag_acq4 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X8930; none //@apireg:note reg_hw_name:sync_trig_flag_acq4 //@apireg:0xaddr 0X8800 | (((0X4C&0XFF) << 2) | ((0X4C&0X100) << 6)) 9'H04C : cmd_iord_d <= {{14{1'B0}},sync_trig_flag_acq4[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_READ_ACQ1 //@apireg:software:name tap_read_trig_acq1 //@apireg:value:appoint bit-width:16 ; 处理板trig信号回读tap值 //@apireg:desc abs-addr:0X8934; none //@apireg:note reg_hw_name:sync_trig_tap_read_acq1 //@apireg:0xaddr 0X8800 | (((0X4D&0XFF) << 2) | ((0X4D&0X100) << 6)) 9'H04D : cmd_iord_d <= sync_trig_tap_read_acq1[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_READ_ACQ2 //@apireg:software:name tap_read_trig_acq2 //@apireg:value:appoint bit-width:16 ; 处理板trig信号回读tap值 //@apireg:desc abs-addr:0X8938; none //@apireg:note reg_hw_name:sync_trig_tap_read_acq2 //@apireg:0xaddr 0X8800 | (((0X4E&0XFF) << 2) | ((0X4E&0X100) << 6)) 9'H04E : cmd_iord_d <= sync_trig_tap_read_acq2[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_READ_ACQ3 //@apireg:software:name tap_read_trig_acq3 //@apireg:value:appoint bit-width:16 ; 处理板trig信号回读tap值 //@apireg:desc abs-addr:0X893C; none //@apireg:note reg_hw_name:sync_trig_tap_read_acq3 //@apireg:0xaddr 0X8800 | (((0X4F&0XFF) << 2) | ((0X4F&0X100) << 6)) 9'H04F : cmd_iord_d <= sync_trig_tap_read_acq3[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_READ_ACQ4 //@apireg:software:name tap_read_trig_acq4 //@apireg:value:appoint bit-width:16 ; 处理板trig信号回读tap值 //@apireg:desc abs-addr:0X8940; none //@apireg:note reg_hw_name:sync_trig_tap_read_acq4 //@apireg:0xaddr 0X8800 | (((0X50&0XFF) << 2) | ((0X50&0X100) << 6)) 9'H050 : cmd_iord_d <= sync_trig_tap_read_acq4[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_READ_ACQ1 //@apireg:software:name tap_read_trig_locat_acq1 //@apireg:value:appoint bit-width:16 ; 处理板trig_location信号回读tap值 //@apireg:desc abs-addr:0X8944; none //@apireg:note reg_hw_name:sync_trig_locat_tap_read_acq1 //@apireg:0xaddr 0X8800 | (((0X51&0XFF) << 2) | ((0X51&0X100) << 6)) 9'H051 : cmd_iord_d <= sync_trig_locat_tap_read_acq1[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_READ_ACQ2 //@apireg:software:name tap_read_trig_locat_acq2 //@apireg:value:appoint bit-width:16 ; 处理板trig_location信号回读tap值 //@apireg:desc abs-addr:0X8948; none //@apireg:note reg_hw_name:sync_trig_locat_tap_read_acq2 //@apireg:0xaddr 0X8800 | (((0X52&0XFF) << 2) | ((0X52&0X100) << 6)) 9'H052 : cmd_iord_d <= sync_trig_locat_tap_read_acq2[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_READ_ACQ3 //@apireg:software:name tap_read_trig_locat_acq3 //@apireg:value:appoint bit-width:16 ; 处理板trig_location信号回读tap值 //@apireg:desc abs-addr:0X894C; none //@apireg:note reg_hw_name:sync_trig_locat_tap_read_acq3 //@apireg:0xaddr 0X8800 | (((0X53&0XFF) << 2) | ((0X53&0X100) << 6)) 9'H053 : cmd_iord_d <= sync_trig_locat_tap_read_acq3[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_READ_ACQ4 //@apireg:software:name tap_read_trig_locat_acq4 //@apireg:value:appoint bit-width:16 ; 处理板trig_location信号回读tap值 //@apireg:desc abs-addr:0X8950; none //@apireg:note reg_hw_name:sync_trig_locat_tap_read_acq4 //@apireg:0xaddr 0X8800 | (((0X54&0XFF) << 2) | ((0X54&0X100) << 6)) 9'H054 : cmd_iord_d <= sync_trig_locat_tap_read_acq4[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_READ_ACQ5 //@apireg:software:name tap_read_trig_acq5 //@apireg:value:appoint bit-width:16 ; 处理板trig信号回读tap值 //@apireg:desc abs-addr:0X8968; none //@apireg:note reg_hw_name:sync_trig_tap_read_acq5 //@apireg:0xaddr 0X8800 | (((0X5A&0XFF) << 2) | ((0X5A&0X100) << 6)) 9'H05A : cmd_iord_d <= sync_trig_tap_read_acq5[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_READ_ACQ6 //@apireg:software:name tap_read_trig_acq6 //@apireg:value:appoint bit-width:16 ; 处理板trig信号回读tap值 //@apireg:desc abs-addr:0X896C; none //@apireg:note reg_hw_name:sync_trig_tap_read_acq6 //@apireg:0xaddr 0X8800 | (((0X5B&0XFF) << 2) | ((0X5B&0X100) << 6)) 9'H05B : cmd_iord_d <= sync_trig_tap_read_acq6[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_READ_ACQ7 //@apireg:software:name tap_read_trig_acq7 //@apireg:value:appoint bit-width:16 ; 处理板trig信号回读tap值 //@apireg:desc abs-addr:0X8970; none //@apireg:note reg_hw_name:sync_trig_tap_read_acq7 //@apireg:0xaddr 0X8800 | (((0X5C&0XFF) << 2) | ((0X5C&0X100) << 6)) 9'H05C : cmd_iord_d <= sync_trig_tap_read_acq7[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_READ_ACQ8 //@apireg:software:name tap_read_trig_acq8 //@apireg:value:appoint bit-width:16 ; 处理板trig信号回读tap值 //@apireg:desc abs-addr:0X8974; none //@apireg:note reg_hw_name:sync_trig_tap_read_acq8 //@apireg:0xaddr 0X8800 | (((0X5D&0XFF) << 2) | ((0X5D&0X100) << 6)) 9'H05D : cmd_iord_d <= sync_trig_tap_read_acq8[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_READ_ACQ5 //@apireg:software:name tap_read_trig_locat_acq5 //@apireg:value:appoint bit-width:16 ; 处理板trig_location信号回读tap值 //@apireg:desc abs-addr:0X8978; none //@apireg:note reg_hw_name:sync_trig_locat_tap_read_acq5 //@apireg:0xaddr 0X8800 | (((0X5E&0XFF) << 2) | ((0X5E&0X100) << 6)) 9'H05E : cmd_iord_d <= sync_trig_locat_tap_read_acq5[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_READ_ACQ6 //@apireg:software:name tap_read_trig_locat_acq6 //@apireg:value:appoint bit-width:16 ; 处理板trig_location信号回读tap值 //@apireg:desc abs-addr:0X897C; none //@apireg:note reg_hw_name:sync_trig_locat_tap_read_acq6 //@apireg:0xaddr 0X8800 | (((0X5F&0XFF) << 2) | ((0X5F&0X100) << 6)) 9'H05F : cmd_iord_d <= sync_trig_locat_tap_read_acq6[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_READ_ACQ7 //@apireg:software:name tap_read_trig_locat_acq7 //@apireg:value:appoint bit-width:16 ; 处理板trig_location信号回读tap值 //@apireg:desc abs-addr:0X8980; none //@apireg:note reg_hw_name:sync_trig_locat_tap_read_acq7 //@apireg:0xaddr 0X8800 | (((0X60&0XFF) << 2) | ((0X60&0X100) << 6)) 9'H060 : cmd_iord_d <= sync_trig_locat_tap_read_acq7[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_READ_ACQ8 //@apireg:software:name tap_read_trig_locat_acq8 //@apireg:value:appoint bit-width:16 ; 处理板trig_location信号回读tap值 //@apireg:desc abs-addr:0X8984; none //@apireg:note reg_hw_name:sync_trig_locat_tap_read_acq8 //@apireg:0xaddr 0X8800 | (((0X61&0XFF) << 2) | ((0X61&0X100) << 6)) 9'H061 : cmd_iord_d <= sync_trig_locat_tap_read_acq8[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_FLAG_ACQ5 //@apireg:software:name sync_trig_locat_flag_acq5 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X8988; none //@apireg:note reg_hw_name:sync_trig_locat_flag_acq5 //@apireg:0xaddr 0X8800 | (((0X62&0XFF) << 2) | ((0X62&0X100) << 6)) 9'H062 : cmd_iord_d <= {{14{1'B0}},sync_trig_locat_flag_acq5[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_FLAG_ACQ6 //@apireg:software:name sync_trig_locat_flag_acq6 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X898C; none //@apireg:note reg_hw_name:sync_trig_locat_flag_acq6 //@apireg:0xaddr 0X8800 | (((0X63&0XFF) << 2) | ((0X63&0X100) << 6)) 9'H063 : cmd_iord_d <= {{14{1'B0}},sync_trig_locat_flag_acq6[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_FLAG_ACQ7 //@apireg:software:name sync_trig_locat_flag_acq7 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X8990; none //@apireg:note reg_hw_name:sync_trig_locat_flag_acq7 //@apireg:0xaddr 0X8800 | (((0X64&0XFF) << 2) | ((0X64&0X100) << 6)) 9'H064 : cmd_iord_d <= {{14{1'B0}},sync_trig_locat_flag_acq7[1:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_FLAG_ACQ8 //@apireg:software:name sync_trig_locat_flag_acq8 //@apireg:value:appoint bit-width:2 ; 比较完成标志，1：成功 0：失败 //@apireg:desc abs-addr:0X8994; none //@apireg:note reg_hw_name:sync_trig_locat_flag_acq8 //@apireg:0xaddr 0X8800 | (((0X65&0XFF) << 2) | ((0X65&0X100) << 6)) 9'H065 : cmd_iord_d <= {{14{1'B0}},sync_trig_locat_flag_acq8[1:0]}; //@apireg:group:title search //@apireg:title SEARCH_FIFO_RD_FINISH //@apireg:software:name search_fifo_rd_finish //@apireg:value:appoint bit-width:1 ; 波形搜索存储fifo读完成 //@apireg:desc abs-addr:0X8954; none //@apireg:note reg_hw_name:search_fifo_rd_finish //@apireg:0xaddr 0X8800 | (((0X55&0XFF) << 2) | ((0X55&0X100) << 6)) 9'H055 : cmd_iord_d <= {{15{1'B0}},search_fifo_rd_finish[0:0]}; //@apireg:group:title search //@apireg:title SEARCH_FINISH_FLAG //@apireg:software:name search_finish_flag //@apireg:value:appoint bit-width:1 ; 波形搜索单次搜索完成 //@apireg:desc abs-addr:0X8958; none //@apireg:note reg_hw_name:search_finish_flag //@apireg:0xaddr 0X8800 | (((0X56&0XFF) << 2) | ((0X56&0X100) << 6)) 9'H056 : cmd_iord_d <= {{15{1'B0}},search_finish_flag[0:0]}; //@apireg:group:title search //@apireg:title SEARCH_FINISH_STATE //@apireg:software:name search_finish_state //@apireg:value:appoint bit-width:2 ; 波形搜索单次搜索结果状态 //@apireg:desc abs-addr:0X895C; none //@apireg:note reg_hw_name:search_finish_state //@apireg:0xaddr 0X8800 | (((0X57&0XFF) << 2) | ((0X57&0X100) << 6)) 9'H057 : cmd_iord_d <= {{14{1'B0}},search_finish_state[1:0]}; //@apireg:group:title search //@apireg:title SEARCH_STAMP //@apireg:software:name search_stamp //@apireg:value:appoint bit-width:15 ; 波形搜索特征点位置信息 //@apireg:desc abs-addr:0X8960; none //@apireg:note reg_hw_name:search_stamp //@apireg:0xaddr 0X8800 | (((0X58&0XFF) << 2) | ((0X58&0X100) << 6)) 9'H058 : cmd_iord_d <= {{1{1'B0}},search_stamp[14:0]}; //@apireg:group:title search //@apireg:title STAMP_NUM //@apireg:software:name stamp_num //@apireg:value:appoint bit-width:12 ; 波形搜索单次搜索特征点总数 //@apireg:desc abs-addr:0X8964; none //@apireg:note reg_hw_name:stamp_num //@apireg:0xaddr 0X8800 | (((0X59&0XFF) << 2) | ((0X59&0X100) << 6)) 9'H059 : cmd_iord_d <= {{4{1'B0}},stamp_num[11:0]}; default: ; endcase end end //@apireg:write_read_attribute:attribute:end //////////////////////////////////////////////////////////////////////////////// //读回写寄存器 //////////////////////////////////////////////////////////////////////////////// always@(posedge cmd_clk) begin case ({pro_read_wreg_addr[14],pro_read_wreg_addr[9:2]}) //------------------------------------------------------------------- //读回下发的写寄存器 //------------------------------------------------------------------- //此处自动追加用户寄存器定义 //@INSERT_RD_WREG_FLAG //@apireg:group:title Average //@apireg:title AVERAGE_ENABLE //@apireg:software:name Enable //@apireg:value:appoint bit-width:1 ; 使能平均功能 //@apireg:desc abs-addr:0X8A88; none //@apireg:note reg_hw_name:average_enable //@apireg:0xaddr 0X8800 | (((0XA2&0XFF) << 2) | ((0XA2&0X100) << 6)) 9'H0A2 : pro_read_wreg_data <= {{15{1'B0}},average_enable[0:0]}; //@apireg:group:title Average //@apireg:title AVERAGE_RAM_RESET //@apireg:software:name RamReset //@apireg:value:appoint bit-width:1 ; 平均模块内部ram缓冲区清除，相当于重新开始平均 //@apireg:desc abs-addr:0X8A8C; none //@apireg:note reg_hw_name:average_ram_reset //@apireg:0xaddr 0X8800 | (((0XA3&0XFF) << 2) | ((0XA3&0X100) << 6)) 9'H0A3 : pro_read_wreg_data <= {{15{1'B0}},average_ram_reset[0:0]}; //@apireg:group:title Average //@apireg:title AVERAGE_NUMBER //@apireg:software:name Number //@apireg:value:appoint bit-width:8 ; 平均次数，多少帧波形数据进行平均 //@apireg:desc abs-addr:0X8A90; none //@apireg:note reg_hw_name:average_number //@apireg:0xaddr 0X8800 | (((0XA4&0XFF) << 2) | ((0XA4&0X100) << 6)) 9'H0A4 : pro_read_wreg_data <= {{8{1'B0}},average_number[7:0]}; //@apireg:group:title Average //@apireg:title AVERAGE_ADDR_INIT //@apireg:software:name AddrInit //@apireg:value:appoint bit-width:16 ; 平均模块内部ram缓冲区起始地址，默认设置为0 //@apireg:desc abs-addr:0X8A94; none //@apireg:note reg_hw_name:average_addr_init //@apireg:0xaddr 0X8800 | (((0XA5&0XFF) << 2) | ((0XA5&0X100) << 6)) 9'H0A5 : pro_read_wreg_data <= average_addr_init[15:0] ; //@apireg:group:title Average //@apireg:title AVERAGE_ADDR_REGION //@apireg:software:name AddrRegion //@apireg:value:appoint bit-width:16 ; 平均模块内部ram缓冲区最大地址，默认设置为平均的样点数 //@apireg:desc abs-addr:0X8A98; none //@apireg:note reg_hw_name:average_addr_region //@apireg:0xaddr 0X8800 | (((0XA6&0XFF) << 2) | ((0XA6&0X100) << 6)) 9'H0A6 : pro_read_wreg_data <= average_addr_region[15:0]; //@apireg:group:title Average //@apireg:title AVERAGE_ADDR_OVER_DLY_NUM //@apireg:software:name average_addr_over_dly_num //@apireg:value:appoint bit-width:16 ; ？？平均次数？？ //@apireg:desc abs-addr:0X8B38; none //@apireg:note reg_hw_name:average_addr_over_dly_num //@apireg:0xaddr 0X8800 | (((0XCE&0XFF) << 2) | ((0XCE&0X100) << 6)) 9'H0CE : pro_read_wreg_data <= average_addr_over_dly_num[15:0]; //@apireg:group:title Awg //@apireg:title AWG_ADDR_CTRL //@apireg:software:name awg_addr_ctrl //@apireg:value:appoint bit-width:10 ; 低8bit是地址； ; 第9bit是cs，控制写入：置1时写入，置0时不发送； ; 第10bit是data_en：0是写寄存器，1是写数据 //@apireg:desc abs-addr:0X8BB4; none //@apireg:note reg_hw_name:awg_addr_ctrl //@apireg:0xaddr 0X8800 | (((0XED&0XFF) << 2) | ((0XED&0X100) << 6)) 9'H0ED : pro_read_wreg_data <= {{6{1'B0}},awg_addr_ctrl[9:0]}; //@apireg:group:title Awg //@apireg:title AWG_DATA_IN //@apireg:software:name awg_data_in //@apireg:value:appoint bit-width:16 ; data_en为0时，只发送低8bit的数据 ; data_en为1时，16bit的数据全部发送 //@apireg:desc abs-addr:0X8BB8; 16bit的数据发送时，发送的是什么值？,,,, //@apireg:note reg_hw_name:awg_data_in //@apireg:0xaddr 0X8800 | (((0XEE&0XFF) << 2) | ((0XEE&0X100) << 6)) 9'H0EE : pro_read_wreg_data <= awg_data_in[15:0] ; //@apireg:group:title Awg //@apireg:title AWG_WR_CTRL //@apireg:software:name awg_wr_ctrl //@apireg:value:appoint bit-width:2 ; bit0是写使能：上升沿写入 ; bit1是读使能：上升沿读取 ; 两个bit不能同时有效 //@apireg:desc abs-addr:0X8BBC; none //@apireg:note reg_hw_name:awg_wr_ctrl //@apireg:0xaddr 0X8800 | (((0XEF&0XFF) << 2) | ((0XEF&0X100) << 6)) 9'H0EF : pro_read_wreg_data <= {{14{1'B0}},awg_wr_ctrl[1:0]}; //@apireg:group:title DBI //@apireg:title DBI_MODULE_EN //@apireg:software:name ProDbiModuleEn //@apireg:value:appoint bit-width:5 ; 处理板dbi模块开关使能3bit //@apireg:desc abs-addr:0X8818; bit2： 代表拼合模块有效 ; bit1：代表幅频补偿模块有效； ; bit0：代表相频补偿模块有效； ; [000]：代表处理板DBI各模块不工作,,,, //@apireg:note reg_hw_name:dbi_module_en //@apireg:0xaddr 0X8800 | (((0X06&0XFF) << 2) | ((0X06&0X100) << 6)) 9'H006 : pro_read_wreg_data <= {{11{1'B0}},dbi_module_en[4:0]}; //@apireg:group:title DBI //@apireg:title PRO_FACTOR_SEL //@apireg:software:name ProFactorSelect //@apireg:value:appoint bit-width:2 ; 处理板dbi模块系数的选择 //@apireg:desc abs-addr:0X881C; none //@apireg:note reg_hw_name:pro_factor_sel //@apireg:0xaddr 0X8800 | (((0X07&0XFF) << 2) | ((0X07&0X100) << 6)) 9'H007 : pro_read_wreg_data <= {{14{1'B0}},pro_factor_sel[1:0]}; //@apireg:group:title DBI //@apireg:title PRO_FACTOR_WA //@apireg:software:name ProFactorWa //@apireg:value:appoint bit-width:16 ; 处理板dbi模块系数的写地址 //@apireg:desc abs-addr:0X8820; none //@apireg:note reg_hw_name:pro_factor_wa //@apireg:0xaddr 0X8800 | (((0X08&0XFF) << 2) | ((0X08&0X100) << 6)) 9'H008 : pro_read_wreg_data <= pro_factor_wa[15:0] ; //@apireg:group:title DBI //@apireg:title PRO_FACTOR_WD_HIGH //@apireg:software:name ProFactorWdHigh //@apireg:value:appoint bit-width:2 ; 处理板dbi模块系数的写地址[17:0] //@apireg:desc abs-addr:0X8824; none //@apireg:note reg_hw_name:pro_factor_wd_high //@apireg:0xaddr 0X8800 | (((0X09&0XFF) << 2) | ((0X09&0X100) << 6)) 9'H009 : pro_read_wreg_data <= {{14{1'B0}},pro_factor_wd_high[1:0]}; //@apireg:group:title DBI //@apireg:title PRO_FACTOR_WD_LOW //@apireg:software:name ProFactorWdLow //@apireg:value:appoint bit-width:16 ; 处理板dbi模块系数的写数据[15:0] //@apireg:desc abs-addr:0X8828; none //@apireg:note reg_hw_name:pro_factor_wd_low //@apireg:0xaddr 0X8800 | (((0X0A&0XFF) << 2) | ((0X0A&0X100) << 6)) 9'H00A : pro_read_wreg_data <= pro_factor_wd_low[15:0] ; //@apireg:group:title DBI //@apireg:title PRO_FACTOR_WEN //@apireg:software:name ProFactorWen //@apireg:value:appoint bit-width:1 ; 处理板dbi模块系数的写使能 //@apireg:desc abs-addr:0X882C; none //@apireg:note reg_hw_name:pro_factor_wen //@apireg:0xaddr 0X8800 | (((0X0B&0XFF) << 2) | ((0X0B&0X100) << 6)) 9'H00B : pro_read_wreg_data <= {{15{1'B0}},pro_factor_wen[0:0]}; //@apireg:group:title DBI //@apireg:title DBI_MULT_FACTOR_WA //@apireg:software:name ProMultiFactorWa //@apireg:value:appoint bit-width:12 ; 10bits，num_of_data //@apireg:desc abs-addr:0X8830; 连续自然数,,,, //@apireg:note reg_hw_name:dbi_mult_factor_wa //@apireg:0xaddr 0X8800 | (((0X0C&0XFF) << 2) | ((0X0C&0X100) << 6)) 9'H00C : pro_read_wreg_data <= {{4{1'B0}},dbi_mult_factor_wa[11:0]}; //@apireg:group:title DBI //@apireg:title DBI_MULT_FACTOR_WD_HIGH //@apireg:software:name ProMultiFactorWdHigh //@apireg:value:appoint bit-width:1 ; msb_of_17bits //@apireg:desc abs-addr:0X8834; 插值滤波器系数，最高位,,,, //@apireg:note reg_hw_name:dbi_mult_factor_wd_high //@apireg:0xaddr 0X8800 | (((0X0D&0XFF) << 2) | ((0X0D&0X100) << 6)) 9'H00D : pro_read_wreg_data <= {{15{1'B0}},dbi_mult_factor_wd_high[0:0]}; //@apireg:group:title DBI //@apireg:title DBI_MULT_FACTOR_WD_LOW //@apireg:software:name ProMultiFactorWdLow //@apireg:value:appoint bit-width:16 ; low_16bits_of_17bits //@apireg:desc abs-addr:0X8838; 插值滤波器系数，低16位,,,, //@apireg:note reg_hw_name:dbi_mult_factor_wd_low //@apireg:0xaddr 0X8800 | (((0X0E&0XFF) << 2) | ((0X0E&0X100) << 6)) 9'H00E : pro_read_wreg_data <= dbi_mult_factor_wd_low[15:0]; //@apireg:group:title DBI //@apireg:title DBI_MULT_FACTOR_WEN //@apireg:software:name ProMultiFactorWen //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X883C; 先发送数据，然后拉高使能完成一次系数发送，每次发系数前拉低，发完系数拉高,,,, //@apireg:note reg_hw_name:dbi_mult_factor_wen //@apireg:0xaddr 0X8800 | (((0X0F&0XFF) << 2) | ((0X0F&0X100) << 6)) 9'H00F : pro_read_wreg_data <= {{15{1'B0}},dbi_mult_factor_wen[0:0]}; //@apireg:group:title DBI //@apireg:title DBI_MULT_INTER_EN //@apireg:software:name ProMultiInterEn //@apireg:value:appoint bit-width:1 ; 1bit, active high //@apireg:desc abs-addr:0X8840; 等于1时打开插值，等于0时关闭插值,,,, //@apireg:note reg_hw_name:dbi_mult_inter_en //@apireg:0xaddr 0X8800 | (((0X10&0XFF) << 2) | ((0X10&0X100) << 6)) 9'H010 : pro_read_wreg_data <= {{15{1'B0}},dbi_mult_inter_en[0:0]}; //@apireg:group:title DBI //@apireg:title DBI_MULT_INTERP_MUL //@apireg:software:name ProMultiInterpRate //@apireg:value:appoint bit-width:16 ; 8bits, num of interpolation rate //@apireg:desc abs-addr:0X8844; 八位自然数，最大插值倍率为100，所以需要八位位宽 ; 20Gsps模式下的插值倍率：2/4/5/10/20/25/50/100,,,, //@apireg:note reg_hw_name:dbi_mult_interp_mul //@apireg:0xaddr 0X8800 | (((0X11&0XFF) << 2) | ((0X11&0X100) << 6)) 9'H011 : pro_read_wreg_data <= dbi_mult_interp_mul[15:0]; //@apireg:group:title DBI //@apireg:title DBI_MULT_RESET_DSP //@apireg:software:name ProMultiResetDsp //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8848; 高有效：等于1时复位， ; 发送系数前复位1次,,,, //@apireg:note reg_hw_name:dbi_mult_reset_dsp //@apireg:0xaddr 0X8800 | (((0X12&0XFF) << 2) | ((0X12&0X100) << 6)) 9'H012 : pro_read_wreg_data <= {{15{1'B0}},dbi_mult_reset_dsp[0:0]}; //@apireg:group:title DBI //@apireg:title DEBUG_NUM //@apireg:software:name SubDataDebugNum //@apireg:value:appoint bit-width:6 ; 2bit；数据接收fifo满控制==dbi单双通道模式 //@apireg:desc abs-addr:0X884C; [00]：输入四路数据； ; [01]：仅输入第一子带数据； ; [10]：仅输入第一、二子带数据 ; [01]：仅输入第一、二、三子带数据,,,, //@apireg:note reg_hw_name:debug_num //@apireg:0xaddr 0X8800 | (((0X13&0XFF) << 2) | ((0X13&0X100) << 6)) 9'H013 : pro_read_wreg_data <= {{10{1'B0}},debug_num[5:0]}; //@apireg:group:title DBI //@apireg:title DBI_INTER_COMP_ZERO //@apireg:software:name dbi_inter_comp_zero //@apireg:value:appoint bit-width:16 ; dbi software 补0操作 [15]使能 [14:0]计数值 //@apireg:desc abs-addr:0X8AAC; none //@apireg:note reg_hw_name:dbi_inter_comp_zero //@apireg:0xaddr 0X8800 | (((0XAB&0XFF) << 2) | ((0XAB&0X100) << 6)) 9'H0AB : pro_read_wreg_data <= dbi_inter_comp_zero[15:0]; //@apireg:group:title DBI //@apireg:title DBI_FACTOR_SELECT_PRO //@apireg:software:name DBI_FACTOR_SELSECT_PRO //@apireg:value:appoint bit-width:8 ; 处理板选择下发滤波器系数的种类 //@apireg:desc abs-addr:0X8B8C; 独热码形式，八种滤波器系数，可扩展,,,, //@apireg:note reg_hw_name:dbi_factor_select_pro //@apireg:0xaddr 0X8800 | (((0XE3&0XFF) << 2) | ((0XE3&0X100) << 6)) 9'H0E3 : pro_read_wreg_data <= {{8{1'B0}},dbi_factor_select_pro[7:0]}; //@apireg:group:title DBI //@apireg:title DMA_RST_PRO //@apireg:software:name DMA_RST_PRO //@apireg:value:appoint bit-width:1 ; 处理板dma下发复位信号，更换滤波器系数需要复位 //@apireg:desc abs-addr:0X8B90; 复位信号,,,, //@apireg:note reg_hw_name:dma_rst_pro //@apireg:0xaddr 0X8800 | (((0XE4&0XFF) << 2) | ((0XE4&0X100) << 6)) 9'H0E4 : pro_read_wreg_data <= {{15{1'B0}},dma_rst_pro[0:0]}; //@apireg:group:title DBI //@apireg:title CHANNEL_EN //@apireg:software:name channel_en //@apireg:value:appoint bit-width:1 ; 通道模式使能 //@apireg:desc abs-addr:0XC9A8; 通道模式使能,,,, //@apireg:note reg_hw_name:channel_en //@apireg:0xaddr 0X8800 | (((0X16A&0XFF) << 2) | ((0X16A&0X100) << 6)) 9'H16A : pro_read_wreg_data <= {{15{1'B0}},channel_en[0:0]}; //@apireg:group:title DCM_CTRL //@apireg:title RST_DCM_CONTROL //@apireg:software:name Reset //@apireg:value:appoint bit-width:8 ; 8bits，bit2：acq1_7044_sync，bit4：acq2_7044_sync，other bits：no use //@apireg:desc abs-addr:0X8850; 第3位，第5位用作采集板7044同步引脚，其余位未使用,,,, //@apireg:note reg_hw_name:rst_dcm_control //@apireg:0xaddr 0X8800 | (((0X14&0XFF) << 2) | ((0X14&0X100) << 6)) 9'H014 : pro_read_wreg_data <= {{8{1'B0}},rst_dcm_control[7:0]}; //@apireg:group:title Data2Pcie //@apireg:title DATA_TX_CLK_RESET //@apireg:software:name ResetTxClk //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8804; 传输模块ODDR的复位，为高电平时复位,,,, //@apireg:note reg_hw_name:data_tx_clk_reset //@apireg:0xaddr 0X8800 | (((0X01&0XFF) << 2) | ((0X01&0X100) << 6)) 9'H001 : pro_read_wreg_data <= {{15{1'B0}},data_tx_clk_reset[0:0]}; //@apireg:group:title Data2Pcie //@apireg:title DATA_TX_IO_RESET //@apireg:software:name ResetTxIO //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8808; 传输模块FDRE的复位，为高电平时复位， ; 初始化复位一次,,,, //@apireg:note reg_hw_name:data_tx_io_reset //@apireg:0xaddr 0X8800 | (((0X02&0XFF) << 2) | ((0X02&0X100) << 6)) 9'H002 : pro_read_wreg_data <= {{15{1'B0}},data_tx_io_reset[0:0]}; //@apireg:group:title DataPath //@apireg:title PRO_SELECT_ACQ_CHANNEL //@apireg:software:name pro_select_acq_channel //@apireg:value:appoint bit-width:16 ; 处理板数字信号处理选择数据来自哪个模拟通道，0表示模拟通道1，1表示模拟通道2，以此类推，如果一张采集卡接两个模拟通道，则0/1表示第一张采集卡的数据 //@apireg:desc abs-addr:0X880C; none //@apireg:note reg_hw_name:pro_select_acq_channel //@apireg:0xaddr 0X8800 | (((0X03&0XFF) << 2) | ((0X03&0X100) << 6)) 9'H003 : pro_read_wreg_data <= pro_select_acq_channel[15:0]; //@apireg:group:title DataPath //@apireg:title PRO_LINKDEMUX_SELECT //@apireg:software:name pro_linkdemux_select //@apireg:value:appoint bit-width:3 ; 处理板接受数据后数据解析类型选择： ; 0：正常时域数据； ; 1：dpo映射时域数据； ; 2：协议解码数据； ; 3、频域数据； ; 4、快传数据； ; 5、la数据； ; 默认态：正常时域数据； //@apireg:desc abs-addr:0X8810; none //@apireg:note reg_hw_name:pro_linkdemux_select //@apireg:0xaddr 0X8800 | (((0X04&0XFF) << 2) | ((0X04&0X100) << 6)) 9'H004 : pro_read_wreg_data <= {{13{1'B0}},pro_linkdemux_select[2:0]}; //@apireg:group:title DataPath //@apireg:title PRO_LINKMUX_SELECT //@apireg:software:name pro_linkmux_select //@apireg:value:appoint bit-width:3 ; 处理板到pcie数据的数据解析类型选择： ; 0：正常时域数据； ; 1：dpo映射时域数据； ; 2：协议解码数据； ; 3、频域数据； ; 4、快传数据； ; 5、la数据； ; 默认态：正常时域数据； //@apireg:desc abs-addr:0X8814; none //@apireg:note reg_hw_name:pro_linkmux_select //@apireg:0xaddr 0X8800 | (((0X05&0XFF) << 2) | ((0X05&0X100) << 6)) 9'H005 : pro_read_wreg_data <= {{13{1'B0}},pro_linkmux_select[2:0]}; //@apireg:group:title Decoder //@apireg:title PROTOCOL_FIFO_RAM_SEL //@apireg:software:name DataFromFifoOrRam //@apireg:value:appoint bit-width:1 ; 1bit 1：fifo 波形数据 0：ram 解码数据 //@apireg:desc abs-addr:0X8854; 选择传输波形数据或解码包,,,, //@apireg:note reg_hw_name:fifo_ram_sel //@apireg:0xaddr 0X8800 | (((0X15&0XFF) << 2) | ((0X15&0X100) << 6)) 9'H015 : pro_read_wreg_data <= {{15{1'B0}},fifo_ram_sel[0:0]}; //@apireg:group:title Decoder //@apireg:title USER_DATA_H //@apireg:software:name protocol_user_data_h //@apireg:value:appoint bit-width:16 ; 16bits：触发比较值h，现在无论要发多长的比较值，都只用一个16位接口分批次发送 //@apireg:desc abs-addr:0X8AB4; 如果要发一个48位的值，应该拆成3次发送。先发送低16位值和地址编码4'b0，然后再发送其有效使能user_data_valid_h；发送中16位时应该先拉低有效，再发送值和地址编码4‘b1，然后再拉高有效；然后再拉低有效，发送高16位值和地址编码4'b2，随后拉高有效.发送完毕后，要拉低有效使能。（两个16位值之间至少要间隔4个时钟，当然以软件下发参数的速度来看，肯定可以满足）,,,, //@apireg:note reg_hw_name:user_data_h //@apireg:0xaddr 0X8800 | (((0XAD&0XFF) << 2) | ((0XAD&0X100) << 6)) 9'H0AD : pro_read_wreg_data <= user_data_h[15:0] ; //@apireg:group:title Decoder //@apireg:title USER_DATA_L //@apireg:software:name protocol_user_data_l //@apireg:value:appoint bit-width:16 ; 16bits：触发比较值l，现在无论要发多长的比较值，都只用一个16位接口分批次发送 //@apireg:desc abs-addr:0X8AB8; 如果要发一个48位的值，应该拆成3次发送。先发送低16位值和地址编码4'b0，然后再发送其有效使能user_data_valid_h；发送中16位时应该先拉低有效，再发送值和地址编码4‘b1，然后再拉高有效；然后再拉低有效，发送高16位值和地址编码4'b2，随后拉高有效.发送完毕后，要拉低有效使能。,,,, //@apireg:note reg_hw_name:user_data_l //@apireg:0xaddr 0X8800 | (((0XAE&0XFF) << 2) | ((0XAE&0X100) << 6)) 9'H0AE : pro_read_wreg_data <= user_data_l[15:0] ; //@apireg:group:title Decoder //@apireg:title USER_DATA_VALID_H //@apireg:software:name protocol_user_data_valid_h //@apireg:value:appoint bit-width:1 ; 高有效，拉高时硬件会接收user_data_h //@apireg:desc abs-addr:0X8ABC; 每次发送user_data_h前拉低，发送后再拉高,,,, //@apireg:note reg_hw_name:user_data_valid_h //@apireg:0xaddr 0X8800 | (((0XAF&0XFF) << 2) | ((0XAF&0X100) << 6)) 9'H0AF : pro_read_wreg_data <= {{15{1'B0}},user_data_valid_h[0:0]}; //@apireg:group:title Decoder //@apireg:title USER_DATA_VALID_L //@apireg:software:name protocol_user_data_valid_l //@apireg:value:appoint bit-width:1 ; 高有效，拉高时硬件会接收user_data_l //@apireg:desc abs-addr:0X8AC0; 每次发送user_data_L前拉低，发送后再拉高,,,, //@apireg:note reg_hw_name:user_data_valid_l //@apireg:0xaddr 0X8800 | (((0XB0&0XFF) << 2) | ((0XB0&0X100) << 6)) 9'H0B0 : pro_read_wreg_data <= {{15{1'B0}},user_data_valid_l[0:0]}; //@apireg:group:title Decoder //@apireg:title USER_DATA_ADDR_H //@apireg:software:name protocol_user_data_addr_h //@apireg:value:appoint bit-width:4 ; user_data_h的地址编码，发送的第一个user_data_h地址编码为0，依次递增。 //@apireg:desc abs-addr:0X8AC4; user_data_h更新时同步刷新,,,, //@apireg:note reg_hw_name:user_data_addr_h //@apireg:0xaddr 0X8800 | (((0XB1&0XFF) << 2) | ((0XB1&0X100) << 6)) 9'H0B1 : pro_read_wreg_data <= {{12{1'B0}},user_data_addr_h[3:0]}; //@apireg:group:title Decoder //@apireg:title USER_DATA_ADDR_L //@apireg:software:name protocol_user_data_addr_l //@apireg:value:appoint bit-width:4 ; user_data_l的地址编码，发送的第一个user_data_l地址编码为0，依次递增。 //@apireg:desc abs-addr:0X8AC8; user_data_l更新时同步刷新,,,, //@apireg:note reg_hw_name:user_data_addr_l //@apireg:0xaddr 0X8800 | (((0XB2&0XFF) << 2) | ((0XB2&0X100) << 6)) 9'H0B2 : pro_read_wreg_data <= {{12{1'B0}},user_data_addr_l[3:0]}; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B1_L //@apireg:software:name SignalSource_B1_L //@apireg:value:appoint bit-width:16 ; 16bits解码通道1信号源选择：协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8ACC; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b1_l //@apireg:0xaddr 0X8800 | (((0XB3&0XFF) << 2) | ((0XB3&0X100) << 6)) 9'H0B3 : pro_read_wreg_data <= protocol_source_ch_sel_b1_l[15:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B1_M //@apireg:software:name SignalSource_B1_M //@apireg:value:appoint bit-width:16 ; 协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8AD0; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b1_m //@apireg:0xaddr 0X8800 | (((0XB4&0XFF) << 2) | ((0XB4&0X100) << 6)) 9'H0B4 : pro_read_wreg_data <= protocol_source_ch_sel_b1_m[15:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B1_H //@apireg:software:name SignalSource_B1_H //@apireg:value:appoint bit-width:4 ; 协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8AD4; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b1_h //@apireg:0xaddr 0X8800 | (((0XB5&0XFF) << 2) | ((0XB5&0X100) << 6)) 9'H0B5 : pro_read_wreg_data <= {{12{1'B0}},protocol_source_ch_sel_b1_h[3:0]}; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B2_L //@apireg:software:name SignalSource_B2_L //@apireg:value:appoint bit-width:16 ; 16bits解码通道2信号源选择：协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8AD8; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b2_l //@apireg:0xaddr 0X8800 | (((0XB6&0XFF) << 2) | ((0XB6&0X100) << 6)) 9'H0B6 : pro_read_wreg_data <= protocol_source_ch_sel_b2_l[15:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B2_M //@apireg:software:name SignalSource_B2_M //@apireg:value:appoint bit-width:16 ; 协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8ADC; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b2_m //@apireg:0xaddr 0X8800 | (((0XB7&0XFF) << 2) | ((0XB7&0X100) << 6)) 9'H0B7 : pro_read_wreg_data <= protocol_source_ch_sel_b2_m[15:0]; //@apireg:group:title Decoder //@apireg:title PROTOCOL_SOURCE_CH_SEL_B2_H //@apireg:software:name SignalSource_B2_H //@apireg:value:appoint bit-width:4 ; 协议模块预留有6个信号源通道，分别是channel0-channel5。而示波器有4个模拟通道+预留48个数字通道，对这4+48=52个通道进行编号，需要6位宽的寄存器。所以6个协议信号源通道需要6*6=36位宽的控制字。每6位用来依次对channel0-channel5选通。 //@apireg:desc abs-addr:0X8AE0; 不同的解码通道发送的控制字不能冲突，比如解码通道B1占了模拟通道1，那么再打开解码通道B2的时候，就必须选用其它通道。这是理所当然的事，你不可能在CH1上同时输入两种协议信号吧。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_source_ch_sel_b2_h //@apireg:0xaddr 0X8800 | (((0XB8&0XFF) << 2) | ((0XB8&0X100) << 6)) 9'H0B8 : pro_read_wreg_data <= {{12{1'B0}},protocol_source_ch_sel_b2_h[3:0]}; //@apireg:group:title Decoder //@apireg:title PROTOCOL_TYPE_B1 //@apireg:software:name TypeB1 //@apireg:value:appoint bit-width:5 ; 解码通道b1所选择的协议类型，最多支持32种协议，具体对应关系请看硬件部分（可以看mso2g） //@apireg:desc abs-addr:0X8AE4; 不同解码通道协议选择应该不同，不能同时分析同一种协议。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_type_b1 //@apireg:0xaddr 0X8800 | (((0XB9&0XFF) << 2) | ((0XB9&0X100) << 6)) 9'H0B9 : pro_read_wreg_data <= {{11{1'B0}},protocol_type_b1[4:0]}; //@apireg:group:title Decoder //@apireg:title PROTOCOL_TYPE_B2 //@apireg:software:name TypeB2 //@apireg:value:appoint bit-width:5 ; 解码通道b2所选择的协议类型，最多支持32种协议，具体对应关系请看硬件部分（可以看mso2g） //@apireg:desc abs-addr:0X8AE8; 不同解码通道协议选择应该不同，不能同时分析同一种协议。（协议使能一打开就该发送）,,,, //@apireg:note reg_hw_name:protocol_type_b2 //@apireg:0xaddr 0X8800 | (((0XBA&0XFF) << 2) | ((0XBA&0X100) << 6)) 9'H0BA : pro_read_wreg_data <= {{11{1'B0}},protocol_type_b2[4:0]}; //@apireg:group:title Decoder //@apireg:title PROTOCOL_RST //@apireg:software:name ResetAfterParamChanged //@apireg:value:appoint bit-width:1 ; 协议模块使能，高有效。 //@apireg:desc abs-addr:0X8AEC; 协议全局使能，要打开协议使能必须将其拉高。,,,, //@apireg:note reg_hw_name:protocol_rst //@apireg:0xaddr 0X8800 | (((0XBB&0XFF) << 2) | ((0XBB&0X100) << 6)) 9'H0BB : pro_read_wreg_data <= {{15{1'B0}},protocol_rst[0:0]}; //@apireg:group:title Decoder //@apireg:title PROTOCOL_TYPE //@apireg:software:name ProtocolTypeForTrigger //@apireg:value:appoint bit-width:5 ; 触发通道协议选择 //@apireg:desc abs-addr:0X8AF0; 其值应该和protocol_type_B1或protocol_type_B2同步发送，而且发送值相同。其作用仅仅是为了分配set参数，由于不会同时分析相同协议，所以不需要区分B1和B2。（原来有protocol_type4trigger和protocol_type4decode之分，现在不需要了，所以连带decode_or_trigger这个控制字也不需要了）,,,, //@apireg:note reg_hw_name:protocol_type //@apireg:0xaddr 0X8800 | (((0XBC&0XFF) << 2) | ((0XBC&0X100) << 6)) 9'H0BC : pro_read_wreg_data <= {{11{1'B0}},protocol_type[4:0]}; //@apireg:group:title Decoder //@apireg:title TRIG_CTRL_WORD0 //@apireg:software:name TrigControlWordL //@apireg:value:appoint bit-width:16 ; 协议set控制参数低16位 //@apireg:desc abs-addr:0X8AF4; 协议使能打开后，从低位依次发送。,,,, //@apireg:note reg_hw_name:trig_ctrl_word0 //@apireg:0xaddr 0X8800 | (((0XBD&0XFF) << 2) | ((0XBD&0X100) << 6)) 9'H0BD : pro_read_wreg_data <= trig_ctrl_word0[15:0] ; //@apireg:group:title Decoder //@apireg:title TRIG_CTRL_WORD1 //@apireg:software:name TrigControlWordM //@apireg:value:appoint bit-width:16 ; 协议set控制参数中16位 //@apireg:desc abs-addr:0X8AF8; none //@apireg:note reg_hw_name:trig_ctrl_word1 //@apireg:0xaddr 0X8800 | (((0XBE&0XFF) << 2) | ((0XBE&0X100) << 6)) 9'H0BE : pro_read_wreg_data <= trig_ctrl_word1[15:0] ; //@apireg:group:title Decoder //@apireg:title TRIG_CTRL_WORD2 //@apireg:software:name TrigControlWordH //@apireg:value:appoint bit-width:16 ; 协议set控制参数高16位 //@apireg:desc abs-addr:0X8AFC; none //@apireg:note reg_hw_name:trig_ctrl_word2 //@apireg:0xaddr 0X8800 | (((0XBF&0XFF) << 2) | ((0XBF&0X100) << 6)) 9'H0BF : pro_read_wreg_data <= trig_ctrl_word2[15:0] ; //@apireg:group:title Decoder //@apireg:title DECODE_RST //@apireg:software:name RamResetEnable //@apireg:value:appoint bit-width:1 ; 协议模块解码使能，高有效。 //@apireg:desc abs-addr:0X8B00; 要观察解码标签必须打开此使能,,,, //@apireg:note reg_hw_name:decode_rst //@apireg:0xaddr 0X8800 | (((0XC0&0XFF) << 2) | ((0XC0&0X100) << 6)) 9'H0C0 : pro_read_wreg_data <= {{15{1'B0}},decode_rst[0:0]}; //@apireg:group:title Decoder //@apireg:title DSP_SET_B1 //@apireg:software:name B1Enable //@apireg:value:appoint bit-width:1 ; 解码通道b1使能，高有效。 //@apireg:desc abs-addr:0X8B04; 示波器上打开对应解码通道，在选取协议类型后应该打开通道使能。,,,, //@apireg:note reg_hw_name:dsp_set_b1 //@apireg:0xaddr 0X8800 | (((0XC1&0XFF) << 2) | ((0XC1&0X100) << 6)) 9'H0C1 : pro_read_wreg_data <= {{15{1'B0}},dsp_set_b1[0:0]}; //@apireg:group:title Decoder //@apireg:title DSP_SET_B2 //@apireg:software:name B2Enable //@apireg:value:appoint bit-width:1 ; 解码通道b2使能，高有效。 //@apireg:desc abs-addr:0X8B08; 同上,,,, //@apireg:note reg_hw_name:dsp_set_b2 //@apireg:0xaddr 0X8800 | (((0XC2&0XFF) << 2) | ((0XC2&0X100) << 6)) 9'H0C2 : pro_read_wreg_data <= {{15{1'B0}},dsp_set_b2[0:0]}; //@apireg:group:title Decoder //@apireg:title DECODE_RAM_PREDEPTH //@apireg:software:name RamPreDepth //@apireg:value:appoint bit-width:12 ; 解码ram预触发深度 //@apireg:desc abs-addr:0X8B0C; 根据需求设置，打开解码使能后发送。,,,, //@apireg:note reg_hw_name:decode_ram_predepth //@apireg:0xaddr 0X8800 | (((0XC3&0XFF) << 2) | ((0XC3&0X100) << 6)) 9'H0C3 : pro_read_wreg_data <= {{4{1'B0}},decode_ram_predepth[11:0]}; //@apireg:group:title Decoder //@apireg:title DSP_WRRAM_EN //@apireg:software:name RamWriteEnable //@apireg:value:appoint bit-width:1 ; 解码ram写使能，高有效 //@apireg:desc abs-addr:0X8B10; 打开解码使能的时候就应该打开解码RAM写使能。,,,, //@apireg:note reg_hw_name:dsp_wrram_en //@apireg:0xaddr 0X8800 | (((0XC4&0XFF) << 2) | ((0XC4&0X100) << 6)) 9'H0C4 : pro_read_wreg_data <= {{15{1'B0}},dsp_wrram_en[0:0]}; //@apireg:group:title Decoder //@apireg:title DSP_RDRAM_EN //@apireg:software:name RamReadEnable //@apireg:value:appoint bit-width:1 ; 解码ram读使能，高有效 //@apireg:desc abs-addr:0X8B14; 打开解码使能后应该定期发送RAM读使能,,,, //@apireg:note reg_hw_name:dsp_rdram_en //@apireg:0xaddr 0X8800 | (((0XC5&0XFF) << 2) | ((0XC5&0X100) << 6)) 9'H0C5 : pro_read_wreg_data <= {{15{1'B0}},dsp_rdram_en[0:0]}; //@apireg:group:title Decoder //@apireg:title TRIG_TYPE_SEL //@apireg:software:name TrigTypeSelect //@apireg:value:appoint bit-width:5 ; 协议触发源选择 //@apireg:desc abs-addr:0X8B18; 打开协议使能后应该发送，其值应该和当前激活协议通道的控制字protocol_type相同。,,,, //@apireg:note reg_hw_name:trig_type_sel //@apireg:0xaddr 0X8800 | (((0XC6&0XFF) << 2) | ((0XC6&0X100) << 6)) 9'H0C6 : pro_read_wreg_data <= {{11{1'B0}},trig_type_sel[4:0]}; //@apireg:group:title Dpo //@apireg:title DPO_DIGITAL_TRIG_EN //@apireg:software:name DigitalTrigEnable //@apireg:value:appoint bit-width:1 ; 0：数字触发关闭； ; 1：数字触发使能 //@apireg:desc abs-addr:0X8858; 可以与其他部分的数字触发使能复用,,,, //@apireg:note reg_hw_name:dpo_digital_trig_en //@apireg:0xaddr 0X8800 | (((0X16&0XFF) << 2) | ((0X16&0X100) << 6)) 9'H016 : pro_read_wreg_data <= {{15{1'B0}},dpo_digital_trig_en[0:0]}; //@apireg:group:title Dpo //@apireg:title DPO_DIN_TEST_CONTROL //@apireg:software:name dpo_din_test_control //@apireg:value:appoint bit-width:1 ; dpo数据测试使能 //@apireg:desc abs-addr:0X885C; none //@apireg:note reg_hw_name:dpo_din_test_control //@apireg:0xaddr 0X8800 | (((0X17&0XFF) << 2) | ((0X17&0X100) << 6)) 9'H017 : pro_read_wreg_data <= {{15{1'B0}},dpo_din_test_control[0:0]}; //@apireg:group:title Dpo //@apireg:title DPO_EN //@apireg:software:name Enable //@apireg:value:appoint bit-width:2 ; bit0：三维映射使能，高有效； ; bit1：三维映射模式，1表示矢量映射，0表示映射 //@apireg:desc abs-addr:0X8860; none //@apireg:note reg_hw_name:dpo_en //@apireg:0xaddr 0X8800 | (((0X18&0XFF) << 2) | ((0X18&0X100) << 6)) 9'H018 : pro_read_wreg_data <= {{14{1'B0}},dpo_en[1:0]} ; //@apireg:group:title Dpo //@apireg:title DPO_DECIMATION //@apireg:software:name ExtractNum //@apireg:value:appoint bit-width:4 ; 4bit后抽倍数 //@apireg:desc abs-addr:0X8864; none //@apireg:note reg_hw_name:dpo_decimation //@apireg:0xaddr 0X8800 | (((0X19&0XFF) << 2) | ((0X19&0X100) << 6)) 9'H019 : pro_read_wreg_data <= {{12{1'B0}},dpo_decimation[3:0]}; //@apireg:group:title Dpo //@apireg:title DPO_CHANNEL_MODE //@apireg:software:name MapChMode //@apireg:value:appoint bit-width:1 ; 三维映射采集数据8路/4路传输控制 //@apireg:desc abs-addr:0X8868; 三维映射采集数据8路/4路传输控制（采集板传到处理板），单通道8路传输，双通道4路传输,,,, //@apireg:note reg_hw_name:dpo_channel_mode //@apireg:0xaddr 0X8800 | (((0X1A&0XFF) << 2) | ((0X1A&0X100) << 6)) 9'H01A : pro_read_wreg_data <= {{15{1'B0}},dpo_channel_mode[0:0]}; //@apireg:group:title Dpo //@apireg:title DPO_MAP_FIFO_DEPTH //@apireg:software:name MapFifoDepth //@apireg:value:appoint bit-width:16 ; 并行映射fifo预满深度 //@apireg:desc abs-addr:0X886C; 并行映射fifo预满深度,,,, //@apireg:note reg_hw_name:dpo_map_fifo_depth //@apireg:0xaddr 0X8800 | (((0X1B&0XFF) << 2) | ((0X1B&0X100) << 6)) 9'H01B : pro_read_wreg_data <= dpo_map_fifo_depth[15:0] ; //@apireg:group:title Dpo //@apireg:title DPO_MEASURE_FIFO_DEPTH //@apireg:software:name MeasureFifoDepth //@apireg:value:appoint bit-width:16 ; 三维映射参数测量fifo预满深度 //@apireg:desc abs-addr:0X8870; 三维映射软件FIFO预满深度,,,, //@apireg:note reg_hw_name:dpo_measure_fifo_depth //@apireg:0xaddr 0X8800 | (((0X1C&0XFF) << 2) | ((0X1C&0X100) << 6)) 9'H01C : pro_read_wreg_data <= dpo_measure_fifo_depth[15:0]; //@apireg:group:title Dpo //@apireg:title DPO_PRO_RESET //@apireg:software:name OutReset //@apireg:value:appoint bit-width:1 ; 0：不进行复位； ; 1：复位输出行列 //@apireg:desc abs-addr:0X8874; 不确定新的送显方式是否仍需要，保留,,,, //@apireg:note reg_hw_name:dpo_pro_reset //@apireg:0xaddr 0X8800 | (((0X1D&0XFF) << 2) | ((0X1D&0X100) << 6)) 9'H01D : pro_read_wreg_data <= {{15{1'B0}},dpo_pro_reset[0:0]}; //@apireg:group:title Dpo //@apireg:title DPO_PARALLEL_EN //@apireg:software:name ParallelDpx //@apireg:value:appoint bit-width:1 ; 三维映射乒乓使能 //@apireg:desc abs-addr:0X8878; none //@apireg:note reg_hw_name:dpo_parallel_en //@apireg:0xaddr 0X8800 | (((0X1E&0XFF) << 2) | ((0X1E&0X100) << 6)) 9'H01E : pro_read_wreg_data <= {{15{1'B0}},dpo_parallel_en[0:0]}; //@apireg:group:title Dpo //@apireg:title DPX_RAM_TEST_D_CTRL //@apireg:software:name RAMTestEn //@apireg:value:appoint bit-width:1 ; 送显映射数据测试使能（测试pcie传输） //@apireg:desc abs-addr:0X887C; 送显映射数据测试使能（测试PCIE传输）,,,, //@apireg:note reg_hw_name:dpx_ram_test_d_ctrl //@apireg:0xaddr 0X8800 | (((0X1F&0XFF) << 2) | ((0X1F&0X100) << 6)) 9'H01F : pro_read_wreg_data <= {{15{1'B0}},dpx_ram_test_d_ctrl[0:0]}; //@apireg:group:title Dpo //@apireg:title DPO_TIME_OVER //@apireg:software:name TimeOverCtrlWord //@apireg:value:appoint bit-width:1 ; 0：计时未到； ; 1：计时超时 //@apireg:desc abs-addr:0X8880; 发1表明pc需要读取数据，硬件停止当前的波形映射，进行送显,,,, //@apireg:note reg_hw_name:dpo_time_over //@apireg:0xaddr 0X8800 | (((0X20&0XFF) << 2) | ((0X20&0X100) << 6)) 9'H020 : pro_read_wreg_data <= {{15{1'B0}},dpo_time_over[0:0]}; //@apireg:group:title Dpo //@apireg:title DPO_CNT_SCREEN_MAX //@apireg:software:name cnt_screen_max //@apireg:value:appoint bit-width:16 ; ？？映射次数？？默认 0x1fff //@apireg:desc abs-addr:0X8B3C; 默认 0X1FFF,,,, //@apireg:note reg_hw_name:dpo_cnt_screen_max //@apireg:0xaddr 0X8800 | (((0XCF&0XFF) << 2) | ((0XCF&0X100) << 6)) 9'H0CF : pro_read_wreg_data <= dpo_cnt_screen_max[15:0] ; //@apireg:group:title Dpo //@apireg:title DPO_TEST_CTRL //@apireg:software:name dpo_test_ctrl //@apireg:value:appoint bit-width:16 ; 测试模式控制 //@apireg:desc abs-addr:0X8B40; none //@apireg:note reg_hw_name:dpo_test_ctrl //@apireg:0xaddr 0X8800 | (((0XD0&0XFF) << 2) | ((0XD0&0X100) << 6)) 9'H0D0 : pro_read_wreg_data <= dpo_test_ctrl[15:0] ; //@apireg:group:title Dpo //@apireg:title PRO_PINGPONG_CNT_THRESH //@apireg:software:name pro_pingpong_cnt_thresh //@apireg:value:appoint bit-width:16 ; 处理板乒乓传输计数器阈值 //@apireg:desc abs-addr:0X8B94; none //@apireg:note reg_hw_name:pro_pingpong_cnt_thresh //@apireg:0xaddr 0X8800 | (((0XE5&0XFF) << 2) | ((0XE5&0X100) << 6)) 9'H0E5 : pro_read_wreg_data <= pro_pingpong_cnt_thresh[15:0]; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_READSTART //@apireg:software:name ReadStart //@apireg:value:appoint bit-width:1 ; 启动接收flash的数据，等待时间与spiclock有关。先启动，等待，读数，然后关闭 //@apireg:desc abs-addr:0X8890; 读回下发寄存器的值,,,, //@apireg:note reg_hw_name:pro_config_flash_readstart //@apireg:0xaddr 0X8800 | (((0X24&0XFF) << 2) | ((0X24&0X100) << 6)) 9'H024 : pro_read_wreg_data <= {{15{1'B0}},pro_config_flash_readstart[0:0]}; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_SPICLOCK_DIV //@apireg:software:name SpiClock //@apireg:value:appoint bit-width:8 ; 独热码，指定spi的时钟的分频比 //@apireg:desc abs-addr:0X8894; none //@apireg:note reg_hw_name:pro_config_flash_spiclock_div //@apireg:0xaddr 0X8800 | (((0X25&0XFF) << 2) | ((0X25&0X100) << 6)) 9'H025 : pro_read_wreg_data <= {{8{1'B0}},pro_config_flash_spiclock_div[7:0]}; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_SS //@apireg:software:name SS //@apireg:value:appoint bit-width:1 ; 通过spi总线往来传输数据时为1，关闭spi总线时为0，参照flash命令时序图 //@apireg:desc abs-addr:0X8898; none //@apireg:note reg_hw_name:pro_config_flash_ss //@apireg:0xaddr 0X8800 | (((0X26&0XFF) << 2) | ((0X26&0X100) << 6)) 9'H026 : pro_read_wreg_data <= {{15{1'B0}},pro_config_flash_ss[0:0]}; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_WRITEDATA //@apireg:software:name WriteData //@apireg:value:appoint bit-width:8 ; 传向flash的数据，每次8bit //@apireg:desc abs-addr:0X889C; none //@apireg:note reg_hw_name:pro_config_flash_writedata //@apireg:0xaddr 0X8800 | (((0X27&0XFF) << 2) | ((0X27&0X100) << 6)) 9'H027 : pro_read_wreg_data <= {{8{1'B0}},pro_config_flash_writedata[7:0]}; //@apireg:group:title FPGAFlashUpdater //@apireg:title PRO_CONFIG_FLASH_WRITESTART //@apireg:software:name WriteStart //@apireg:value:appoint bit-width:1 ; 启动先flash的数据传输，每次8bit，等待的时间与spiclock有关。先writedata，然后启动传输，之后关闭 //@apireg:desc abs-addr:0X88A0; none //@apireg:note reg_hw_name:pro_config_flash_writestart //@apireg:0xaddr 0X8800 | (((0X28&0XFF) << 2) | ((0X28&0X100) << 6)) 9'H028 : pro_read_wreg_data <= {{15{1'B0}},pro_config_flash_writestart[0:0]}; //@apireg:group:title FREQ_DETECTION //@apireg:title AFC_FACTOR_CH_SEL //@apireg:software:name afc_factor_ch_sel //@apireg:value:appoint bit-width:2 ; 处理板四通道系数下发选择：（00选通第一通道道 01第二通道 10第三通道 11第四通道） //@apireg:desc abs-addr:0XC9B0; none //@apireg:note reg_hw_name:afc_factor_ch_sel //@apireg:0xaddr 0X8800 | (((0X16C&0XFF) << 2) | ((0X16C&0X100) << 6)) 9'H16C : pro_read_wreg_data <= {{14{1'B0}},afc_factor_ch_sel[1:0]}; //@apireg:group:title FREQ_DETECTION //@apireg:title AFC_FACTOR_WA //@apireg:software:name afc_factor_wa //@apireg:value:appoint bit-width:16 ; 系数地址 //@apireg:desc abs-addr:0XC9B4; none //@apireg:note reg_hw_name:afc_factor_wa //@apireg:0xaddr 0X8800 | (((0X16D&0XFF) << 2) | ((0X16D&0X100) << 6)) 9'H16D : pro_read_wreg_data <= afc_factor_wa[15:0] ; //@apireg:group:title FREQ_DETECTION //@apireg:title AFC_FACTOR_WD_L //@apireg:software:name afc_factor_wd_L //@apireg:value:appoint bit-width:16 ; 系数低16bit //@apireg:desc abs-addr:0XC9B8; none //@apireg:note reg_hw_name:afc_factor_wd_l //@apireg:0xaddr 0X8800 | (((0X16E&0XFF) << 2) | ((0X16E&0X100) << 6)) 9'H16E : pro_read_wreg_data <= afc_factor_wd_l[15:0] ; //@apireg:group:title FREQ_DETECTION //@apireg:title AFC_FACTOR_WD_H //@apireg:software:name afc_factor_wd_H //@apireg:value:appoint bit-width:16 ; 系数高bit //@apireg:desc abs-addr:0XC9BC; none //@apireg:note reg_hw_name:afc_factor_wd_h //@apireg:0xaddr 0X8800 | (((0X16F&0XFF) << 2) | ((0X16F&0X100) << 6)) 9'H16F : pro_read_wreg_data <= afc_factor_wd_h[15:0] ; //@apireg:group:title FREQ_DETECTION //@apireg:title AFC_FACTOR_WEN //@apireg:software:name afc_factor_wen //@apireg:value:appoint bit-width:1 ; 系数写使能 （硬件检测上升沿接收数据） //@apireg:desc abs-addr:0XC9C0; none //@apireg:note reg_hw_name:afc_factor_wen //@apireg:0xaddr 0X8800 | (((0X170&0XFF) << 2) | ((0X170&0X100) << 6)) 9'H170 : pro_read_wreg_data <= {{15{1'B0}},afc_factor_wen[0:0]}; //@apireg:group:title FREQ_DETECTION //@apireg:title INTERP_FACTOR_WA //@apireg:software:name interp_factor_wa //@apireg:value:appoint bit-width:16 ; 系数地址 //@apireg:desc abs-addr:0XC9C4; none //@apireg:note reg_hw_name:interp_factor_wa //@apireg:0xaddr 0X8800 | (((0X171&0XFF) << 2) | ((0X171&0X100) << 6)) 9'H171 : pro_read_wreg_data <= interp_factor_wa[15:0] ; //@apireg:group:title FREQ_DETECTION //@apireg:title INTERP_FACTOR_WD_L //@apireg:software:name interp_factor_wd_L //@apireg:value:appoint bit-width:16 ; 系数低16bit //@apireg:desc abs-addr:0XC9C8; none //@apireg:note reg_hw_name:interp_factor_wd_l //@apireg:0xaddr 0X8800 | (((0X172&0XFF) << 2) | ((0X172&0X100) << 6)) 9'H172 : pro_read_wreg_data <= interp_factor_wd_l[15:0] ; //@apireg:group:title FREQ_DETECTION //@apireg:title INTERP_FACTOR_WD_H //@apireg:software:name interp_factor_wd_H //@apireg:value:appoint bit-width:16 ; 系数高bit //@apireg:desc abs-addr:0XC9CC; none //@apireg:note reg_hw_name:interp_factor_wd_h //@apireg:0xaddr 0X8800 | (((0X173&0XFF) << 2) | ((0X173&0X100) << 6)) 9'H173 : pro_read_wreg_data <= interp_factor_wd_h[15:0] ; //@apireg:group:title FREQ_DETECTION //@apireg:title INTERP_FACTOR_WEN //@apireg:software:name interp_factor_wen //@apireg:value:appoint bit-width:1 ; 系数写使能（硬件检测上升沿接收数据） //@apireg:desc abs-addr:0XC9D0; none //@apireg:note reg_hw_name:interp_factor_wen //@apireg:0xaddr 0X8800 | (((0X174&0XFF) << 2) | ((0X174&0X100) << 6)) 9'H174 : pro_read_wreg_data <= {{15{1'B0}},interp_factor_wen[0:0]}; //@apireg:group:title FREQ_DETECTION //@apireg:title PRO_AFC_EN //@apireg:software:name pro_afc_en //@apireg:value:appoint bit-width:1 ; 幅频校准使能 //@apireg:desc abs-addr:0XC9D4; none //@apireg:note reg_hw_name:pro_afc_en //@apireg:0xaddr 0X8800 | (((0X175&0XFF) << 2) | ((0X175&0X100) << 6)) 9'H175 : pro_read_wreg_data <= {{15{1'B0}},pro_afc_en[0:0]}; //@apireg:group:title FREQ_DETECTION //@apireg:title PRO_INTERP_EN //@apireg:software:name pro_interp_en //@apireg:value:appoint bit-width:1 ; 插值使能 //@apireg:desc abs-addr:0XC9D8; none //@apireg:note reg_hw_name:pro_interp_en //@apireg:0xaddr 0X8800 | (((0X176&0XFF) << 2) | ((0X176&0X100) << 6)) 9'H176 : pro_read_wreg_data <= {{15{1'B0}},pro_interp_en[0:0]}; //@apireg:group:title FifoCtrl //@apireg:title DSP_FIFO_START //@apireg:software:name AcqWriteEnable //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8884; 0->1 上升沿 复位，当该写使能有效并且采集板数据有效， ; 采集板FIFO未满时，采集板FIFO的写使能才有效， ; 每次采集时，先发一次0， ; 再发一次1表明本次采集开始写入FIFO,,,, //@apireg:note reg_hw_name:dsp_fifo_start //@apireg:0xaddr 0X8800 | (((0X21&0XFF) << 2) | ((0X21&0X100) << 6)) 9'H021 : pro_read_wreg_data <= {{15{1'B0}},dsp_fifo_start[0:0]}; //@apireg:group:title FifoCtrl //@apireg:title PRO_FIFO_DEPTH //@apireg:software:name FullProgDepth //@apireg:value:appoint bit-width:16 ; 16bits，num_of_pts //@apireg:desc abs-addr:0X8888; 处理板软件Fifo深度，最大16384， ; 初始化发送值为12288,,,, //@apireg:note reg_hw_name:pro_fifo_depth //@apireg:0xaddr 0X8800 | (((0X22&0XFF) << 2) | ((0X22&0X100) << 6)) 9'H022 : pro_read_wreg_data <= pro_fifo_depth[15:0] ; //@apireg:group:title FifoCtrl //@apireg:title PARALLEL_FIFO_THRESHOLD //@apireg:software:name ParallelFifoDepth //@apireg:value:appoint bit-width:16 ; 16bit 并行regular fifo可编程满深度 //@apireg:desc abs-addr:0X888C; 默认值为6144,,,, //@apireg:note reg_hw_name:parallel_fifo_threshold //@apireg:0xaddr 0X8800 | (((0X23&0XFF) << 2) | ((0X23&0X100) << 6)) 9'H023 : pro_read_wreg_data <= parallel_fifo_threshold[15:0]; //@apireg:group:title Inverter //@apireg:title INVERTER_EN //@apireg:software:name Enable //@apireg:value:appoint bit-width:16 ; 通道反相运算使能，高有效，bit0对应模拟通道0，bit1对应模拟通道1，以此类推 //@apireg:desc abs-addr:0X88A4; none //@apireg:note reg_hw_name:inverter_en //@apireg:0xaddr 0X8800 | (((0X29&0XFF) << 2) | ((0X29&0X100) << 6)) 9'H029 : pro_read_wreg_data <= inverter_en[15:0] ; //@apireg:group:title IoCtrl //@apireg:title CLK_SOURCE_SELECT //@apireg:software:name clk_source_select //@apireg:value:appoint bit-width:16 ; 外部10m输入选择 //@apireg:desc abs-addr:0XC9E0; none //@apireg:note reg_hw_name:clk_source_select //@apireg:0xaddr 0X8800 | (((0X178&0XFF) << 2) | ((0X178&0X100) << 6)) 9'H178 : pro_read_wreg_data <= clk_source_select[15:0] ; //@apireg:group:title LA //@apireg:title V7_AD5668_CTRL_DATA_HIGH //@apireg:software:name AD5668CtrlDataH //@apireg:value:appoint bit-width:16 ; 深机箱用。16bit //@apireg:desc abs-addr:0X88A8; 使能后发送的32位数据的低16位,,,, //@apireg:note reg_hw_name:v7_ad5668_ctrl_data_high //@apireg:0xaddr 0X8800 | (((0X2A&0XFF) << 2) | ((0X2A&0X100) << 6)) 9'H02A : pro_read_wreg_data <= v7_ad5668_ctrl_data_high[15:0]; //@apireg:group:title LA //@apireg:title V7_AD5668_CTRL_DATA_LOW //@apireg:software:name AD5668CtrlDataL //@apireg:value:appoint bit-width:16 ; 深机箱用。16bit，参照手册。包含比较电平的发送 //@apireg:desc abs-addr:0X88AC; 使能后发送的32位数据的高16位,,,, //@apireg:note reg_hw_name:v7_ad5668_ctrl_data_low //@apireg:0xaddr 0X8800 | (((0X2B&0XFF) << 2) | ((0X2B&0X100) << 6)) 9'H02B : pro_read_wreg_data <= v7_ad5668_ctrl_data_low[15:0]; //@apireg:group:title LA //@apireg:title V7_AD5668START //@apireg:software:name AD5668TransStart //@apireg:value:appoint bit-width:16 ; 深机箱用。16bit，为上升沿有效，000：拉低停止传输，111：拉高开始传输 //@apireg:desc abs-addr:0X88B0; 使能后发送32位数据，延迟需要满足通过SPI将32位数据传输完毕，与传输该数据的SPI的Clock有关。先将数据发送给FPGA，然后拉高，延时足够的时间，然后拉低。,,,, //@apireg:note reg_hw_name:v7_ad5668start //@apireg:0xaddr 0X8800 | (((0X2C&0XFF) << 2) | ((0X2C&0X100) << 6)) 9'H02C : pro_read_wreg_data <= v7_ad5668start[15:0] ; //@apireg:group:title LA //@apireg:title LA_DECIMATION_H16 //@apireg:software:name DecimationH16 //@apireg:value:appoint bit-width:16 ; 16bit //@apireg:desc abs-addr:0X88B4; 抽取比的高16位，抽取比取值范围为1~10_000_000_000,,,, //@apireg:note reg_hw_name:la_decimation_h16 //@apireg:0xaddr 0X8800 | (((0X2D&0XFF) << 2) | ((0X2D&0X100) << 6)) 9'H02D : pro_read_wreg_data <= la_decimation_h16[15:0] ; //@apireg:group:title LA //@apireg:title LA_DECIMATION_L16 //@apireg:software:name DecimationL16 //@apireg:value:appoint bit-width:16 ; 16bit //@apireg:desc abs-addr:0X88B8; 抽取比的低16位，抽取比取值范围为1~10_000_000_000,,,, //@apireg:note reg_hw_name:la_decimation_l16 //@apireg:0xaddr 0X8800 | (((0X2E&0XFF) << 2) | ((0X2E&0X100) << 6)) 9'H02E : pro_read_wreg_data <= la_decimation_l16[15:0] ; //@apireg:group:title LA //@apireg:title LA_DECIMATION_M16 //@apireg:software:name DecimationM16 //@apireg:value:appoint bit-width:16 ; 16bit //@apireg:desc abs-addr:0X88BC; 抽取比的中16位，抽取比取值范围为1~10_000_000_000,,,, //@apireg:note reg_hw_name:la_decimation_m16 //@apireg:0xaddr 0X8800 | (((0X2F&0XFF) << 2) | ((0X2F&0X100) << 6)) 9'H02F : pro_read_wreg_data <= la_decimation_m16[15:0] ; //@apireg:group:title LA //@apireg:title LA_PROG_FULL_THRESH_HIGH //@apireg:software:name FIFODepthH //@apireg:value:appoint bit-width:16 ; 5bit //@apireg:desc abs-addr:0X88C0; la模块FIFO可编程满深度的高5位，FIFO可编程满深度的最大为1024,,,, //@apireg:note reg_hw_name:la_prog_full_thresh_high //@apireg:0xaddr 0X8800 | (((0X30&0XFF) << 2) | ((0X30&0X100) << 6)) 9'H030 : pro_read_wreg_data <= la_prog_full_thresh_high[15:0]; //@apireg:group:title LA //@apireg:title LA_PROG_FULL_THRESH_LOW //@apireg:software:name FIFODepthL //@apireg:value:appoint bit-width:16 ; 16bit //@apireg:desc abs-addr:0X88C4; la模块FIFO可编程满深度的低16位，FIFO可编程满深度的最大为1024,,,, //@apireg:note reg_hw_name:la_prog_full_thresh_low //@apireg:0xaddr 0X8800 | (((0X31&0XFF) << 2) | ((0X31&0X100) << 6)) 9'H031 : pro_read_wreg_data <= la_prog_full_thresh_low[15:0]; //@apireg:group:title LA //@apireg:title LA_GTX_RDY //@apireg:software:name GtxReady //@apireg:value:appoint bit-width:1 ; 1bit，上升沿有效 //@apireg:desc abs-addr:0X88C8; 初始化时复位一次； 深机箱：控制Iserdese的 bitslip控制信号，高电平有效,,,, //@apireg:note reg_hw_name:la_gtx_rdy //@apireg:0xaddr 0X8800 | (((0X32&0XFF) << 2) | ((0X32&0X100) << 6)) 9'H032 : pro_read_wreg_data <= {{15{1'B0}},la_gtx_rdy[0:0]}; //@apireg:group:title LA //@apireg:title LA_GTX_RESET //@apireg:software:name GtxReset //@apireg:value:appoint bit-width:1 ; 1bit，下降沿有效 //@apireg:desc abs-addr:0X88CC; 初始化时复位一次,,,, //@apireg:note reg_hw_name:la_gtx_reset //@apireg:0xaddr 0X8800 | (((0X33&0XFF) << 2) | ((0X33&0X100) << 6)) 9'H033 : pro_read_wreg_data <= {{15{1'B0}},la_gtx_reset[0:0]}; //@apireg:group:title LA //@apireg:title LA_SAMPLE_MODE //@apireg:software:name InterpolationMode //@apireg:value:appoint bit-width:8 ; 4bit //@apireg:desc abs-addr:0X88D0; 插值模式，固定发送0b1000,,,, //@apireg:note reg_hw_name:la_sample_mode //@apireg:0xaddr 0X8800 | (((0X34&0XFF) << 2) | ((0X34&0X100) << 6)) 9'H034 : pro_read_wreg_data <= {{8{1'B0}},la_sample_mode[7:0]}; //@apireg:group:title LA //@apireg:title LA_DDR_EN //@apireg:software:name IsDDRMode //@apireg:value:appoint bit-width:1 ; 1bit,0为普通存储，1为ddr存储 //@apireg:desc abs-addr:0X88D4; 存储模式选择,,,, //@apireg:note reg_hw_name:la_ddr_en //@apireg:0xaddr 0X8800 | (((0X35&0XFF) << 2) | ((0X35&0X100) << 6)) 9'H035 : pro_read_wreg_data <= {{15{1'B0}},la_ddr_en[0:0]}; //@apireg:group:title LA //@apireg:title V7_LA_EN //@apireg:software:name PowerCtrl //@apireg:value:appoint bit-width:3 ; 深机箱用。3bit，000：断电，111：通电 //@apireg:desc abs-addr:0X88D8; 给LA板子供电，给3块LA板供电，需要同时控制,,,, //@apireg:note reg_hw_name:v7_la_en //@apireg:0xaddr 0X8800 | (((0X36&0XFF) << 2) | ((0X36&0X100) << 6)) 9'H036 : pro_read_wreg_data <= {{13{1'B0}},v7_la_en[2:0]}; //@apireg:group:title LA //@apireg:title LA_SOFT_RESET //@apireg:software:name SoftReset //@apireg:value:appoint bit-width:1 ; 1bit，下降沿有效 //@apireg:desc abs-addr:0X88DC; gt的时钟的复位信号。先复位SoftReset，再复位GtxReset，最后复位GtxReady。SoftReset和GtxReset之间没有延迟时间要求，但需要保证顺序正确，GtxReset和GtxReady之间手册中要求不低于500ns的延迟,,,, //@apireg:note reg_hw_name:la_soft_reset //@apireg:0xaddr 0X8800 | (((0X37&0XFF) << 2) | ((0X37&0X100) << 6)) 9'H037 : pro_read_wreg_data <= {{15{1'B0}},la_soft_reset[0:0]}; //@apireg:group:title LA //@apireg:title LA_TRIG_EDGE_SEL //@apireg:software:name TrigEdgeSel //@apireg:value:appoint bit-width:2 ; 2bit，低位：1：上升沿触发 0：下降沿触发； 高位：1：选择la触发信号，0：选择时域触发信号 //@apireg:desc abs-addr:0X88E0; 边沿触发选择。,,,, //@apireg:note reg_hw_name:la_trig_edge_sel //@apireg:0xaddr 0X8800 | (((0X38&0XFF) << 2) | ((0X38&0X100) << 6)) 9'H038 : pro_read_wreg_data <= {{14{1'B0}},la_trig_edge_sel[1:0]}; //@apireg:group:title LA //@apireg:title LA_TRIG_NUM //@apireg:software:name TrigSourceSel //@apireg:value:appoint bit-width:16 ; 16bit //@apireg:desc abs-addr:0X88E4; LA触发源数据选择，自然数序列，16通道时数据范围为1~16，48路时数据范围为1~48,,,, //@apireg:note reg_hw_name:la_trig_num //@apireg:0xaddr 0X8800 | (((0X39&0XFF) << 2) | ((0X39&0X100) << 6)) 9'H039 : pro_read_wreg_data <= la_trig_num[15:0] ; //@apireg:group:title LA //@apireg:title PC_DDR3_UI_RST_N_LA //@apireg:software:name DdrUiReset //@apireg:value:appoint bit-width:1 ; ddr3 ui复位，低有效 //@apireg:desc abs-addr:0X8B48; none //@apireg:note reg_hw_name:pc_ddr3_ui_rst_n_la //@apireg:0xaddr 0X8800 | (((0XD2&0XFF) << 2) | ((0XD2&0X100) << 6)) 9'H0D2 : pro_read_wreg_data <= {{15{1'B0}},pc_ddr3_ui_rst_n_la[0:0]}; //@apireg:group:title LA //@apireg:title PC_DDR3_FIFO_WEN //@apireg:software:name DdrWriteEnable //@apireg:value:appoint bit-width:1 ; ddr3控制器的写使能，1为打开，0为关闭 //@apireg:desc abs-addr:0X8B4C; none //@apireg:note reg_hw_name:pc_ddr3_fifo_wen //@apireg:0xaddr 0X8800 | (((0XD3&0XFF) << 2) | ((0XD3&0X100) << 6)) 9'H0D3 : pro_read_wreg_data <= {{15{1'B0}},pc_ddr3_fifo_wen[0:0]}; //@apireg:group:title LA //@apireg:title PC_WR_ADDR_SEGMENT_H //@apireg:software:name DdrWriteStartAddrH //@apireg:value:appoint bit-width:16 ; 写初始地址高13位 //@apireg:desc abs-addr:0X8B50; none //@apireg:note reg_hw_name:pc_wr_addr_segment_h //@apireg:0xaddr 0X8800 | (((0XD4&0XFF) << 2) | ((0XD4&0X100) << 6)) 9'H0D4 : pro_read_wreg_data <= pc_wr_addr_segment_h[15:0]; //@apireg:group:title LA //@apireg:title PC_WR_ADDR_SEGMENT_L //@apireg:software:name DdrWriteStartAddrL //@apireg:value:appoint bit-width:16 ; 写初始地址低16位 //@apireg:desc abs-addr:0X8B54; none //@apireg:note reg_hw_name:pc_wr_addr_segment_l //@apireg:0xaddr 0X8800 | (((0XD5&0XFF) << 2) | ((0XD5&0X100) << 6)) 9'H0D5 : pro_read_wreg_data <= pc_wr_addr_segment_l[15:0]; //@apireg:group:title LA //@apireg:title PC_WR_CTRL_DEPTH_H //@apireg:software:name DdrWriteAddrLengthH //@apireg:value:appoint bit-width:16 ; 写数据的存储长度高12位 //@apireg:desc abs-addr:0X8B58; none //@apireg:note reg_hw_name:pc_wr_ctrl_depth_h //@apireg:0xaddr 0X8800 | (((0XD6&0XFF) << 2) | ((0XD6&0X100) << 6)) 9'H0D6 : pro_read_wreg_data <= pc_wr_ctrl_depth_h[15:0] ; //@apireg:group:title LA //@apireg:title PC_WR_CTRL_DEPTH_L //@apireg:software:name DdrWriteAddrLengthL //@apireg:value:appoint bit-width:16 ; 写数据的存储长度低16位 //@apireg:desc abs-addr:0X8B5C; none //@apireg:note reg_hw_name:pc_wr_ctrl_depth_l //@apireg:0xaddr 0X8800 | (((0XD7&0XFF) << 2) | ((0XD7&0X100) << 6)) 9'H0D7 : pro_read_wreg_data <= pc_wr_ctrl_depth_l[15:0] ; //@apireg:group:title LA //@apireg:title PC_WR_PRE_SEPTH_H //@apireg:software:name DdrWritePreDepthH //@apireg:value:appoint bit-width:16 ; 写数据的预触发深度高12位 //@apireg:desc abs-addr:0X8B60; none //@apireg:note reg_hw_name:pc_wr_pre_septh_h //@apireg:0xaddr 0X8800 | (((0XD8&0XFF) << 2) | ((0XD8&0X100) << 6)) 9'H0D8 : pro_read_wreg_data <= pc_wr_pre_septh_h[15:0] ; //@apireg:group:title LA //@apireg:title PC_WR_PRE_SEPTH_L //@apireg:software:name DdrWritePreDepthL //@apireg:value:appoint bit-width:16 ; 写数据的预触发深度低16位 //@apireg:desc abs-addr:0X8B64; none //@apireg:note reg_hw_name:pc_wr_pre_septh_l //@apireg:0xaddr 0X8800 | (((0XD9&0XFF) << 2) | ((0XD9&0X100) << 6)) 9'H0D9 : pro_read_wreg_data <= pc_wr_pre_septh_l[15:0] ; //@apireg:group:title LA //@apireg:title PC_DDR3_REN_LA //@apireg:software:name DdrReadEnable //@apireg:value:appoint bit-width:1 ; ddr3控制器的读使能，1为打开，0为关闭 //@apireg:desc abs-addr:0X8B68; none //@apireg:note reg_hw_name:pc_ddr3_ren_la //@apireg:0xaddr 0X8800 | (((0XDA&0XFF) << 2) | ((0XDA&0X100) << 6)) 9'H0DA : pro_read_wreg_data <= {{15{1'B0}},pc_ddr3_ren_la[0:0]}; //@apireg:group:title LA //@apireg:title PC_RD_LENGTH_H //@apireg:software:name DdrReadAddrLengthH //@apireg:value:appoint bit-width:16 ; 读数据地址个数高12位 //@apireg:desc abs-addr:0X8B6C; none //@apireg:note reg_hw_name:pc_rd_length_h //@apireg:0xaddr 0X8800 | (((0XDB&0XFF) << 2) | ((0XDB&0X100) << 6)) 9'H0DB : pro_read_wreg_data <= pc_rd_length_h[15:0] ; //@apireg:group:title LA //@apireg:title PC_RD_LENGTH_L //@apireg:software:name DdrReadAddrLengthL //@apireg:value:appoint bit-width:16 ; 读数据地址个数低16位 //@apireg:desc abs-addr:0X8B70; none //@apireg:note reg_hw_name:pc_rd_length_l //@apireg:0xaddr 0X8800 | (((0XDC&0XFF) << 2) | ((0XDC&0X100) << 6)) 9'H0DC : pro_read_wreg_data <= pc_rd_length_l[15:0] ; //@apireg:group:title LA //@apireg:title PC_RD_BEGIN_ADDR_H //@apireg:software:name DdrReadBeginAddrH //@apireg:value:appoint bit-width:16 ; 读数据地址中的第一个地址高13位（可能是从数据存储段的中间开始读） //@apireg:desc abs-addr:0X8B74; none //@apireg:note reg_hw_name:pc_rd_begin_addr_h //@apireg:0xaddr 0X8800 | (((0XDD&0XFF) << 2) | ((0XDD&0X100) << 6)) 9'H0DD : pro_read_wreg_data <= pc_rd_begin_addr_h[15:0] ; //@apireg:group:title LA //@apireg:title PC_RD_BEGIN_ADDR_L //@apireg:software:name DdrReadBeginAddL //@apireg:value:appoint bit-width:16 ; 读数据地址中的第一个地址低16位（可能是从数据存储段的中间开始读） //@apireg:desc abs-addr:0X8B78; none //@apireg:note reg_hw_name:pc_rd_begin_addr_l //@apireg:0xaddr 0X8800 | (((0XDE&0XFF) << 2) | ((0XDE&0X100) << 6)) 9'H0DE : pro_read_wreg_data <= pc_rd_begin_addr_l[15:0] ; //@apireg:group:title LA //@apireg:title PC_RD_SEGMENT_BEGIN_ADDR_H //@apireg:software:name DdrSegmentStartAddrH //@apireg:value:appoint bit-width:16 ; 读数据对应存储段的起始地址高13位 //@apireg:desc abs-addr:0X8B7C; none //@apireg:note reg_hw_name:pc_rd_segment_begin_addr_h //@apireg:0xaddr 0X8800 | (((0XDF&0XFF) << 2) | ((0XDF&0X100) << 6)) 9'H0DF : pro_read_wreg_data <= pc_rd_segment_begin_addr_h[15:0]; //@apireg:group:title LA //@apireg:title PC_RD_SEGMENT_BEGIN_ADDR_L //@apireg:software:name DdrSegmentStartAddrL //@apireg:value:appoint bit-width:16 ; 读数据对应存储段的起始地址低16位 //@apireg:desc abs-addr:0X8B80; none //@apireg:note reg_hw_name:pc_rd_segment_begin_addr_l //@apireg:0xaddr 0X8800 | (((0XE0&0XFF) << 2) | ((0XE0&0X100) << 6)) 9'H0E0 : pro_read_wreg_data <= pc_rd_segment_begin_addr_l[15:0]; //@apireg:group:title LA //@apireg:title PC_RD_CTRL_DEPTH_H //@apireg:software:name DdrSegmentAddrLengthH //@apireg:value:appoint bit-width:16 ; 读数据对应存储段的存储深度高12位 //@apireg:desc abs-addr:0X8B84; none //@apireg:note reg_hw_name:pc_rd_ctrl_depth_h //@apireg:0xaddr 0X8800 | (((0XE1&0XFF) << 2) | ((0XE1&0X100) << 6)) 9'H0E1 : pro_read_wreg_data <= pc_rd_ctrl_depth_h[15:0] ; //@apireg:group:title LA //@apireg:title PC_RD_CTRL_DEPTH_L //@apireg:software:name DdrSegmentAddrLengthL //@apireg:value:appoint bit-width:16 ; 读数据对应存储段的存储深度低16位 //@apireg:desc abs-addr:0X8B88; none //@apireg:note reg_hw_name:pc_rd_ctrl_depth_l //@apireg:0xaddr 0X8800 | (((0XE2&0XFF) << 2) | ((0XE2&0X100) << 6)) 9'H0E2 : pro_read_wreg_data <= pc_rd_ctrl_depth_l[15:0] ; //@apireg:group:title LA //@apireg:title PC_MIG_SYS_RST_N //@apireg:software:name DdrMigReset //@apireg:value:appoint bit-width:1 ; ddr3 mig复位，低有效 //@apireg:desc abs-addr:0X8B98; none //@apireg:note reg_hw_name:pc_mig_sys_rst_n //@apireg:0xaddr 0X8800 | (((0XE6&0XFF) << 2) | ((0XE6&0X100) << 6)) 9'H0E6 : pro_read_wreg_data <= {{15{1'B0}},pc_mig_sys_rst_n[0:0]}; //@apireg:group:title LA //@apireg:title LA_DDR3_PK_DECIMATION //@apireg:software:name DdrPkDecimationHd //@apireg:value:appoint bit-width:16 ; ddr3 后抽抽取比高16位 //@apireg:desc abs-addr:0X8B9C; none //@apireg:note reg_hw_name:la_ddr3_pk_decimation //@apireg:0xaddr 0X8800 | (((0XE7&0XFF) << 2) | ((0XE7&0X100) << 6)) 9'H0E7 : pro_read_wreg_data <= la_ddr3_pk_decimation[15:0]; //@apireg:group:title LA //@apireg:title LA_DDR3_PK_MODE //@apireg:software:name DdrPkMode //@apireg:value:appoint bit-width:16 ; ddr3 后抽抽取比低16位 //@apireg:desc abs-addr:0X8BA0; none //@apireg:note reg_hw_name:la_ddr3_pk_mode //@apireg:0xaddr 0X8800 | (((0XE8&0XFF) << 2) | ((0XE8&0X100) << 6)) 9'H0E8 : pro_read_wreg_data <= la_ddr3_pk_mode[15:0] ; //@apireg:group:title LA //@apireg:title LA_GTRXCDRHOLD //@apireg:software:name GTRXCDRHOLD //@apireg:value:appoint bit-width:1 ; 1bit，界面可控，初始值0；la数据稳定后，可在界面上设置为1 //@apireg:desc abs-addr:0XC960; 初始化时复位一次,,,, //@apireg:note reg_hw_name:la_gtrxcdrhold //@apireg:0xaddr 0X8800 | (((0X158&0XFF) << 2) | ((0X158&0X100) << 6)) 9'H158 : pro_read_wreg_data <= {{15{1'B0}},la_gtrxcdrhold[0:0]}; //@apireg:group:title LA //@apireg:title SOFT_NORMAL_DISCARD_NUM //@apireg:software:name SoftNormalDiscardNum //@apireg:value:appoint bit-width:8 ; 时域一级触发软件丢点值 //@apireg:desc abs-addr:0XC97C; none //@apireg:note reg_hw_name:soft_normal_discard_num //@apireg:0xaddr 0X8800 | (((0X15F&0XFF) << 2) | ((0X15F&0X100) << 6)) 9'H15F : pro_read_wreg_data <= {{8{1'B0}},soft_normal_discard_num[7:0]}; //@apireg:group:title LA //@apireg:title INTER_MULTIPLE //@apireg:software:name InterMultiple //@apireg:value:appoint bit-width:9 ; 插值倍数 //@apireg:desc abs-addr:0XC980; none //@apireg:note reg_hw_name:inter_multiple //@apireg:0xaddr 0X8800 | (((0X160&0XFF) << 2) | ((0X160&0X100) << 6)) 9'H160 : pro_read_wreg_data <= {{7{1'B0}},inter_multiple[8:0]}; //@apireg:group:title LA //@apireg:title NORMAL_INTERPOLATION_SET //@apireg:software:name NormalInterpolationSet //@apireg:value:appoint bit-width:3 ; 是否为插值档 1：插值；0：非插值 //@apireg:desc abs-addr:0XC984; none //@apireg:note reg_hw_name:normal_interpolation_set //@apireg:0xaddr 0X8800 | (((0X161&0XFF) << 2) | ((0X161&0X100) << 6)) 9'H161 : pro_read_wreg_data <= {{13{1'B0}},normal_interpolation_set[2:0]}; //@apireg:group:title LA //@apireg:title TRIG_MODULE_LA_TRIG_PREDEPTH_SET_H16 //@apireg:software:name LaTrigPredepthSetH //@apireg:value:appoint bit-width:16 ; la一级预触发深度高16bit //@apireg:desc abs-addr:0XC988; none //@apireg:note reg_hw_name:trig_module_la_trig_predepth_set_h16 //@apireg:0xaddr 0X8800 | (((0X162&0XFF) << 2) | ((0X162&0X100) << 6)) 9'H162 : pro_read_wreg_data <= trig_module_la_trig_predepth_set_h16[15:0]; //@apireg:group:title LA //@apireg:title TRIG_MODULE_LA_TRIG_PREDEPTH_SET_L16 //@apireg:software:name LaTrigPredepthSetL //@apireg:value:appoint bit-width:16 ; la一级预触发深度低16bit //@apireg:desc abs-addr:0XC98C; none //@apireg:note reg_hw_name:trig_module_la_trig_predepth_set_l16 //@apireg:0xaddr 0X8800 | (((0X163&0XFF) << 2) | ((0X163&0X100) << 6)) 9'H163 : pro_read_wreg_data <= trig_module_la_trig_predepth_set_l16[15:0]; //@apireg:group:title LA //@apireg:title TRIG_MODULE_LA_TRIG_PREDEPTH_SET_M16 //@apireg:software:name LaTrigPredepthSetM //@apireg:value:appoint bit-width:16 ; la一级预触发深度中16bit //@apireg:desc abs-addr:0XC990; none //@apireg:note reg_hw_name:trig_module_la_trig_predepth_set_m16 //@apireg:0xaddr 0X8800 | (((0X164&0XFF) << 2) | ((0X164&0X100) << 6)) 9'H164 : pro_read_wreg_data <= trig_module_la_trig_predepth_set_m16[15:0]; //@apireg:group:title LA //@apireg:title LA_POST_INTER_EN //@apireg:software:name la_post_inter_en_dbi20g //@apireg:value:appoint bit-width:1 ; la插值使能 1：开 ;0：关 //@apireg:desc abs-addr:0XC994; none //@apireg:note reg_hw_name:la_post_inter_en //@apireg:0xaddr 0X8800 | (((0X165&0XFF) << 2) | ((0X165&0X100) << 6)) 9'H165 : pro_read_wreg_data <= {{15{1'B0}},la_post_inter_en[0:0]}; //@apireg:group:title LA //@apireg:title PC_WR_POS_DEPTH_H //@apireg:software:name DdrWritePosDepthH //@apireg:value:appoint bit-width:16 ; 写数据的后触发深度高16位 //@apireg:desc abs-addr:0XC998; none //@apireg:note reg_hw_name:pc_wr_pos_depth_h //@apireg:0xaddr 0X8800 | (((0X166&0XFF) << 2) | ((0X166&0X100) << 6)) 9'H166 : pro_read_wreg_data <= pc_wr_pos_depth_h[15:0] ; //@apireg:group:title LA //@apireg:title PC_WR_POS_DEPTH_L //@apireg:software:name DdrWritePosDepthL //@apireg:value:appoint bit-width:16 ; 写数据的后触发深度低16位 //@apireg:desc abs-addr:0XC99C; none //@apireg:note reg_hw_name:pc_wr_pos_depth_l //@apireg:0xaddr 0X8800 | (((0X167&0XFF) << 2) | ((0X167&0X100) << 6)) 9'H167 : pro_read_wreg_data <= pc_wr_pos_depth_l[15:0] ; //@apireg:group:title LA //@apireg:title PC_FINE_H16 //@apireg:software:name PcFineH //@apireg:value:appoint bit-width:16 ; ms2g：0.1浮点数下发高16位 //@apireg:desc abs-addr:0XC9A0; none //@apireg:note reg_hw_name:pc_fine_h16 //@apireg:0xaddr 0X8800 | (((0X168&0XFF) << 2) | ((0X168&0X100) << 6)) 9'H168 : pro_read_wreg_data <= pc_fine_h16[15:0] ; //@apireg:group:title LA //@apireg:title PC_FINE_L16 //@apireg:software:name PcFineL //@apireg:value:appoint bit-width:16 ; ms2g：0.1浮点数下发低16位 //@apireg:desc abs-addr:0XC9A4; none //@apireg:note reg_hw_name:pc_fine_l16 //@apireg:0xaddr 0X8800 | (((0X169&0XFF) << 2) | ((0X169&0X100) << 6)) 9'H169 : pro_read_wreg_data <= pc_fine_l16[15:0] ; //@apireg:group:title LSCtrl //@apireg:title DDR_FAST_TRANS_CH_SEL //@apireg:software:name FastChSelect //@apireg:value:appoint bit-width:8 ; 快传选择要传输的数据模拟通道，0对于ch1,1对于ch2，以此类推 //@apireg:desc abs-addr:0X88E8; none //@apireg:note reg_hw_name:ddr_fast_trans_ch_sel //@apireg:0xaddr 0X8800 | (((0X3A&0XFF) << 2) | ((0X3A&0X100) << 6)) 9'H03A : pro_read_wreg_data <= {{8{1'B0}},ddr_fast_trans_ch_sel[7:0]}; //@apireg:group:title LSCtrl //@apireg:title FAST_EN //@apireg:software:name Enable //@apireg:value:appoint bit-width:1 ; 1bit，0：normal，1：ddr //@apireg:desc abs-addr:0X88EC; ddr模式开关 ，0为普通模式，1为ddr模式,,,, //@apireg:note reg_hw_name:fast_en //@apireg:0xaddr 0X8800 | (((0X3B&0XFF) << 2) | ((0X3B&0X100) << 6)) 9'H03B : pro_read_wreg_data <= {{15{1'B0}},fast_en[0:0]}; //@apireg:group:title LSCtrl //@apireg:title PC_DDR_PRO_FAST_TRANS_EN //@apireg:software:name pc_ddr_pro_fast_trans_en //@apireg:value:appoint bit-width:1 ; 1bit,1:active //@apireg:desc abs-addr:0X88F0; 发1选择处理板快速传输链路，用于传原始采样点、波形搜索结果、触发地址,,,, //@apireg:note reg_hw_name:pc_ddr_pro_fast_trans_en //@apireg:0xaddr 0X8800 | (((0X3C&0XFF) << 2) | ((0X3C&0X100) << 6)) 9'H03C : pro_read_wreg_data <= {{15{1'B0}},pc_ddr_pro_fast_trans_en[0:0]}; //@apireg:group:title FIFO //@apireg:title PRO_DATA_FD_FIFO_EMPTY_THRESH //@apireg:software:name FIFOProgEmptyThresh //@apireg:value:appoint bit-width:14 ; 14bits,与stft步进有关 //@apireg:desc abs-addr:0X88F4; none //@apireg:note reg_hw_name:pro_data_fd_fifo_empty_thresh //@apireg:0xaddr 0X8800 | (((0X3D&0XFF) << 2) | ((0X3D&0X100) << 6)) 9'H03D : pro_read_wreg_data <= {{2{1'B0}},pro_data_fd_fifo_empty_thresh[13:0]}; //@apireg:group:title FIFO //@apireg:title PRO_DATA_FD_FIFO_FULL_THRESH //@apireg:software:name FIFOProgFullThresh //@apireg:value:appoint bit-width:14 ; 14bits,最大16384 //@apireg:desc abs-addr:0X88F8; none //@apireg:note reg_hw_name:pro_data_fd_fifo_full_thresh //@apireg:0xaddr 0X8800 | (((0X3E&0XFF) << 2) | ((0X3E&0X100) << 6)) 9'H03E : pro_read_wreg_data <= {{2{1'B0}},pro_data_fd_fifo_full_thresh[13:0]}; //@apireg:group:title STFT //@apireg:title MD8G_PRO_DATA_CHOOSE //@apireg:software:name DataChoose //@apireg:value:appoint bit-width:8 ; 4bit,bit3表示频域或时域数据选择，0表示时域，1表示频域；bit2-0表示选择模拟通道 //@apireg:desc abs-addr:0X88FC; none //@apireg:note reg_hw_name:md8g_pro_data_choose //@apireg:0xaddr 0X8800 | (((0X3F&0XFF) << 2) | ((0X3F&0X100) << 6)) 9'H03F : pro_read_wreg_data <= {{8{1'B0}},md8g_pro_data_choose[7:0]}; //@apireg:group:title STFT //@apireg:title COEFFICIENT_DATAIN_H16 //@apireg:software:name CoefficientDataInH16 //@apireg:value:appoint bit-width:16 ; 16bits,窗函数系数高16位 //@apireg:desc abs-addr:0X8900; none //@apireg:note reg_hw_name:coefficient_datain_h16 //@apireg:0xaddr 0X8800 | (((0X40&0XFF) << 2) | ((0X40&0X100) << 6)) 9'H040 : pro_read_wreg_data <= coefficient_datain_h16[15:0]; //@apireg:group:title STFT //@apireg:title COEFFICIENT_DATAIN_L16 //@apireg:software:name CoefficientDataInL16 //@apireg:value:appoint bit-width:16 ; 16bits,窗函数系数低16位 //@apireg:desc abs-addr:0X8904; none //@apireg:note reg_hw_name:coefficient_datain_l16 //@apireg:0xaddr 0X8800 | (((0X41&0XFF) << 2) | ((0X41&0X100) << 6)) 9'H041 : pro_read_wreg_data <= coefficient_datain_l16[15:0]; //@apireg:group:title STFT //@apireg:title COEFFICIENT_DATA_WREN //@apireg:software:name CoefficientDataWREN //@apireg:value:appoint bit-width:1 ; 1bit,窗函数写使能 //@apireg:desc abs-addr:0X8908; none //@apireg:note reg_hw_name:coefficient_data_wren //@apireg:0xaddr 0X8800 | (((0X42&0XFF) << 2) | ((0X42&0X100) << 6)) 9'H042 : pro_read_wreg_data <= {{15{1'B0}},coefficient_data_wren[0:0]}; //@apireg:group:title STFT //@apireg:title FFT_CONFIG_START //@apireg:software:name FFTConfigStart //@apireg:value:appoint bit-width:1 ; 1bit, fft核开始配置 //@apireg:desc abs-addr:0X890C; none //@apireg:note reg_hw_name:fft_config_start //@apireg:0xaddr 0X8800 | (((0X43&0XFF) << 2) | ((0X43&0X100) << 6)) 9'H043 : pro_read_wreg_data <= {{15{1'B0}},fft_config_start[0:0]}; //@apireg:group:title STFT //@apireg:title FFT_PARAM_DIR //@apireg:software:name FFTParamDir //@apireg:value:appoint bit-width:1 ; 1bit,为1时选择fft，为0时选择ifft //@apireg:desc abs-addr:0X8910; none //@apireg:note reg_hw_name:fft_param_dir //@apireg:0xaddr 0X8800 | (((0X44&0XFF) << 2) | ((0X44&0X100) << 6)) 9'H044 : pro_read_wreg_data <= {{15{1'B0}},fft_param_dir[0:0]}; //@apireg:group:title STFT //@apireg:title FFT_PARAM_NFFT //@apireg:software:name FFTParamNFFT //@apireg:value:appoint bit-width:5 ; 5bits,配置fft核的nfft，0~16；需和fft点数相对应 //@apireg:desc abs-addr:0X8914; none //@apireg:note reg_hw_name:fft_param_nfft //@apireg:0xaddr 0X8800 | (((0X45&0XFF) << 2) | ((0X45&0X100) << 6)) 9'H045 : pro_read_wreg_data <= {{11{1'B0}},fft_param_nfft[4:0]}; //@apireg:group:title STFT //@apireg:title FFT_PARAM_POINTNUM //@apireg:software:name FFTParamPointNum //@apireg:value:appoint bit-width:14 ; 11bits,fft单轮运算点数 //@apireg:desc abs-addr:0X8918; none //@apireg:note reg_hw_name:fft_param_pointnum //@apireg:0xaddr 0X8800 | (((0X46&0XFF) << 2) | ((0X46&0X100) << 6)) 9'H046 : pro_read_wreg_data <= {{2{1'B0}},fft_param_pointnum[13:0]}; //@apireg:group:title STFT //@apireg:title FFT_PARAM_SCALESCH //@apireg:software:name FFTParamScaleSCH //@apireg:value:appoint bit-width:16 ; 10bits,配置数据缩放比例;1024个点，radix-4，一共5级，每级2bit //@apireg:desc abs-addr:0X891C; none //@apireg:note reg_hw_name:fft_param_scalesch //@apireg:0xaddr 0X8800 | (((0X47&0XFF) << 2) | ((0X47&0X100) << 6)) 9'H047 : pro_read_wreg_data <= fft_param_scalesch[15:0] ; //@apireg:group:title STFT //@apireg:title FFT_TIMES //@apireg:software:name FFTTimes //@apireg:value:appoint bit-width:8 ; 8bits,设置fft运算次数，最大为256 //@apireg:desc abs-addr:0X8920; none //@apireg:note reg_hw_name:fft_times //@apireg:0xaddr 0X8800 | (((0X48&0XFF) << 2) | ((0X48&0X100) << 6)) 9'H048 : pro_read_wreg_data <= {{8{1'B0}},fft_times[7:0]}; //@apireg:group:title STFT //@apireg:title STFT_CALC_START //@apireg:software:name STFTCalcStart //@apireg:value:appoint bit-width:1 ; 1bit,fft开始运算 //@apireg:desc abs-addr:0X8924; none //@apireg:note reg_hw_name:stft_calc_start //@apireg:0xaddr 0X8800 | (((0X49&0XFF) << 2) | ((0X49&0X100) << 6)) 9'H049 : pro_read_wreg_data <= {{15{1'B0}},stft_calc_start[0:0]}; //@apireg:group:title STFT //@apireg:title STFT_DATA_SELECT //@apireg:software:name STFTDataSelect //@apireg:value:appoint bit-width:4 ; 4bits,4'b0001:输入数据直接输出；4'b0010:fft处理后的im&re；4'b0100:fft处理后的amp&pha；4'b1000:输入数据i/q的amp&pha //@apireg:desc abs-addr:0X8928; none //@apireg:note reg_hw_name:stft_data_select //@apireg:0xaddr 0X8800 | (((0X4A&0XFF) << 2) | ((0X4A&0X100) << 6)) 9'H04A : pro_read_wreg_data <= {{12{1'B0}},stft_data_select[3:0]}; //@apireg:group:title STFT //@apireg:title STFT_STEP //@apireg:software:name STFTStep //@apireg:value:appoint bit-width:14 ; 7bits,设置fft运算的步进 //@apireg:desc abs-addr:0X892C; none //@apireg:note reg_hw_name:stft_step //@apireg:0xaddr 0X8800 | (((0X4B&0XFF) << 2) | ((0X4B&0X100) << 6)) 9'H04B : pro_read_wreg_data <= {{2{1'B0}},stft_step[13:0]}; //@apireg:group:title PowerManager //@apireg:title ACQBOARDPOWERCTRL //@apireg:software:name AcqBoardPowerCtrl //@apireg:value:appoint bit-width:8 ; bit0：cpci1_power_load_en ; bit1：cpci1_fpga_load_en ; bit2：cpci2_power_load_en ; bit3：cpci2_fpga_load_en ; bit4：cpci3_power_load_en ; bit5：cpci3_fpga_load_en ; bit6：cpci4_power_load_en ; bit7：cpci4_fpga_load_en //@apireg:desc abs-addr:0X8930; 00 断电, FF上电,,,, //@apireg:note reg_hw_name:acqboardpowerctrl //@apireg:0xaddr 0X8800 | (((0X4C&0XFF) << 2) | ((0X4C&0X100) << 6)) 9'H04C : pro_read_wreg_data <= {{8{1'B0}},acqboardpowerctrl[7:0]}; //@apireg:group:title RegMonitor //@apireg:title PRO_READ_WREG_ADDR //@apireg:software:name RegAddress //@apireg:value:appoint bit-width:16 ; read back write-register //@apireg:desc abs-addr:0X8934; 读回下发寄存器的值,,,, //@apireg:note reg_hw_name:pro_read_wreg_addr //@apireg:0xaddr 0X8800 | (((0X4D&0XFF) << 2) | ((0X4D&0X100) << 6)) 9'H04D : pro_read_wreg_data <= pro_read_wreg_addr[15:0] ; //@apireg:group:title Scan //@apireg:title SCAN_DATACOUNT_LATCH //@apireg:software:name DatacountLatch //@apireg:value:appoint bit-width:1 ; 0：关闭锁存 ; 1: 开启锁存 //@apireg:desc abs-addr:0X8938; 在上升沿进行数据计数值锁存,,,, //@apireg:note reg_hw_name:scan_datacount_latch //@apireg:0xaddr 0X8800 | (((0X4E&0XFF) << 2) | ((0X4E&0X100) << 6)) 9'H04E : pro_read_wreg_data <= {{15{1'B0}},scan_datacount_latch[0:0]}; //@apireg:group:title Scan //@apireg:title SCAN_DATACOUNT_PASSBACK //@apireg:software:name DatacountPassback //@apireg:value:appoint bit-width:15 ; 15bit : 开启读使能标志 ; 低14bit：返回用于决定读取个数的当前datacount值 //@apireg:desc abs-addr:0X893C; 开启使能标志上升沿作为开启softfifo的ren标志,,,, //@apireg:note reg_hw_name:scan_datacount_passback //@apireg:0xaddr 0X8800 | (((0X4F&0XFF) << 2) | ((0X4F&0X100) << 6)) 9'H04F : pro_read_wreg_data <= {{1{1'B0}},scan_datacount_passback[14:0]}; //@apireg:group:title Scan //@apireg:title PRO_SCAN_ENABLE //@apireg:software:name ProScanEnable //@apireg:value:appoint bit-width:1 ; 0:正常采集板传输模式 ; 1：scan模式开启 //@apireg:desc abs-addr:0X8940; none //@apireg:note reg_hw_name:pro_scan_enable //@apireg:0xaddr 0X8800 | (((0X50&0XFF) << 2) | ((0X50&0X100) << 6)) 9'H050 : pro_read_wreg_data <= {{15{1'B0}},pro_scan_enable[0:0]}; //@apireg:group:title SerdesSync //@apireg:title PRO_ISERDES_SCAN_LENGTH //@apireg:software:name pro_iserdes_scan_length //@apireg:value:appoint bit-width:8 ; idelay的扫窗长度，扫窗确定合适延迟值后，需要达到扫窗长度的次数后才能确定改值有效，输出同步完成信号 //@apireg:desc abs-addr:0X8944; none //@apireg:note reg_hw_name:pro_iserdes_scan_length //@apireg:0xaddr 0X8800 | (((0X51&0XFF) << 2) | ((0X51&0X100) << 6)) 9'H051 : pro_read_wreg_data <= {{8{1'B0}},pro_iserdes_scan_length[7:0]}; //@apireg:group:title SerdesSync //@apireg:title PRO_ISERDES_SYNC_EN //@apireg:software:name pro_iserdes_sync_en //@apireg:value:appoint bit-width:1 ; 处理板iserdes开始同步使能，边沿有效，上升沿开始同步，下降沿结束同步 //@apireg:desc abs-addr:0X8948; 板间通信同步使能，边沿有效,,,, //@apireg:note reg_hw_name:pro_iserdes_sync_en //@apireg:0xaddr 0X8800 | (((0X52&0XFF) << 2) | ((0X52&0X100) << 6)) 9'H052 : pro_read_wreg_data <= {{15{1'B0}},pro_iserdes_sync_en[0:0]}; //@apireg:group:title SerdesSync //@apireg:title PRO_ISERDES_TAP_START //@apireg:software:name pro_iserdes_TAP_start //@apireg:value:appoint bit-width:5 ; idelay的扫窗延迟最小值 //@apireg:desc abs-addr:0X894C; none //@apireg:note reg_hw_name:pro_iserdes_tap_start //@apireg:0xaddr 0X8800 | (((0X53&0XFF) << 2) | ((0X53&0X100) << 6)) 9'H053 : pro_read_wreg_data <= {{11{1'B0}},pro_iserdes_tap_start[4:0]}; //@apireg:group:title SerdesSync //@apireg:title PRO_ISERDES_TAP_STOP //@apireg:software:name pro_iserdes_TAP_stop //@apireg:value:appoint bit-width:5 ; idelay的扫窗延迟最大值 //@apireg:desc abs-addr:0X8950; none //@apireg:note reg_hw_name:pro_iserdes_tap_stop //@apireg:0xaddr 0X8800 | (((0X54&0XFF) << 2) | ((0X54&0X100) << 6)) 9'H054 : pro_read_wreg_data <= {{11{1'B0}},pro_iserdes_tap_stop[4:0]}; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_IN_DELAY_DATA_CE1 //@apireg:software:name CE1 //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8954; 上升沿使能IDelay模块的increment/decrement输入， ; 当IN_DELAY_RESET有效时，该使能无效,,,, //@apireg:note reg_hw_name:pro_in_delay_data_ce1 //@apireg:0xaddr 0X8800 | (((0X55&0XFF) << 2) | ((0X55&0X100) << 6)) 9'H055 : pro_read_wreg_data <= {{15{1'B0}},pro_in_delay_data_ce1[0:0]}; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_IN_DELAY_DATA_CE3 //@apireg:software:name CE3 //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8958; 上升沿使能IDelay模块的increment/decrement输入， ; 当IN_DELAY_RESET有效时，该使能无效,,,, //@apireg:note reg_hw_name:pro_in_delay_data_ce3 //@apireg:0xaddr 0X8800 | (((0X56&0XFF) << 2) | ((0X56&0X100) << 6)) 9'H056 : pro_read_wreg_data <= {{15{1'B0}},pro_in_delay_data_ce3[0:0]}; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_IN_DELAY_DATA_CE5 //@apireg:software:name CE5 //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X895C; 上升沿使能IDelay模块的increment/decrement输入， ; 当IN_DELAY_RESET有效时，该使能无效,,,, //@apireg:note reg_hw_name:pro_in_delay_data_ce5 //@apireg:0xaddr 0X8800 | (((0X57&0XFF) << 2) | ((0X57&0X100) << 6)) 9'H057 : pro_read_wreg_data <= {{15{1'B0}},pro_in_delay_data_ce5[0:0]}; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_IN_DELAY_DATA_CE7 //@apireg:software:name CE7 //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8960; 上升沿使能IDelay模块的increment/decrement输入， ; 当IN_DELAY_RESET有效时，该使能无效,,,, //@apireg:note reg_hw_name:pro_in_delay_data_ce7 //@apireg:0xaddr 0X8800 | (((0X58&0XFF) << 2) | ((0X58&0X100) << 6)) 9'H058 : pro_read_wreg_data <= {{15{1'B0}},pro_in_delay_data_ce7[0:0]}; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_CNTVALUEIN1 //@apireg:software:name Count1 //@apireg:value:appoint bit-width:5 ; 5bits，value_of_delay //@apireg:desc abs-addr:0X8964; 延迟量设置，最大为31， ; 延迟量等于设置值×78ps,,,, //@apireg:note reg_hw_name:pro_cntvaluein1 //@apireg:0xaddr 0X8800 | (((0X59&0XFF) << 2) | ((0X59&0X100) << 6)) 9'H059 : pro_read_wreg_data <= {{11{1'B0}},pro_cntvaluein1[4:0]}; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_CNTVALUEIN3 //@apireg:software:name Count3 //@apireg:value:appoint bit-width:5 ; 5bits，value_of_delay //@apireg:desc abs-addr:0X8968; 延迟量设置，最大为31， ; 延迟量等于设置值×78ps,,,, //@apireg:note reg_hw_name:pro_cntvaluein3 //@apireg:0xaddr 0X8800 | (((0X5A&0XFF) << 2) | ((0X5A&0X100) << 6)) 9'H05A : pro_read_wreg_data <= {{11{1'B0}},pro_cntvaluein3[4:0]}; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_CNTVALUEIN5 //@apireg:software:name Count5 //@apireg:value:appoint bit-width:5 ; 5bits，value_of_delay //@apireg:desc abs-addr:0X896C; 延迟量设置，最大为31， ; 延迟量等于设置值×78ps,,,, //@apireg:note reg_hw_name:pro_cntvaluein5 //@apireg:0xaddr 0X8800 | (((0X5B&0XFF) << 2) | ((0X5B&0X100) << 6)) 9'H05B : pro_read_wreg_data <= {{11{1'B0}},pro_cntvaluein5[4:0]}; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_CNTVALUEIN7 //@apireg:software:name Count7 //@apireg:value:appoint bit-width:5 ; 5bits，value_of_delay //@apireg:desc abs-addr:0X8970; 延迟量设置，最大为31， ; 延迟量等于设置值×78ps,,,, //@apireg:note reg_hw_name:pro_cntvaluein7 //@apireg:0xaddr 0X8800 | (((0X5C&0XFF) << 2) | ((0X5C&0X100) << 6)) 9'H05C : pro_read_wreg_data <= {{11{1'B0}},pro_cntvaluein7[4:0]}; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_DATA_RX_IO_RESET //@apireg:software:name RxIOReset //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8974; IDelaycCrl模块复位，高电平复位， ; 初始化时复位一次,,,, //@apireg:note reg_hw_name:pro_data_rx_io_reset //@apireg:0xaddr 0X8800 | (((0X5D&0XFF) << 2) | ((0X5D&0X100) << 6)) 9'H05D : pro_read_wreg_data <= {{15{1'B0}},pro_data_rx_io_reset[0:0]}; //@apireg:group:title SyncDataRxIDelay //@apireg:title PRO_IN_DELAY_RESET //@apireg:software:name SetEffect //@apireg:value:appoint bit-width:1 ; 1bit，active high //@apireg:desc abs-addr:0X8978; 拉高生效.先设置数据，然后拉高生效。,,,, //@apireg:note reg_hw_name:pro_in_delay_reset //@apireg:0xaddr 0X8800 | (((0X5E&0XFF) << 2) | ((0X5E&0X100) << 6)) 9'H05E : pro_read_wreg_data <= {{15{1'B0}},pro_in_delay_reset[0:0]}; //@apireg:group:title SysInfo //@apireg:title PRO_REG_READ_BACK //@apireg:software:name WorkOKTest //@apireg:value:appoint bit-width:16 ; 16bits_data //@apireg:desc abs-addr:0XCBF8; SPI写数据（共24bit，分高低位） 低8位,,,, //@apireg:note reg_hw_name:pro_reg_read_back //@apireg:0xaddr 0X8800 | (((0X1FE&0XFF) << 2) | ((0X1FE&0X100) << 6)) 9'H1FE : pro_read_wreg_data <= pro_reg_read_back[15:0] ; //@apireg:group:title SysMon //@apireg:title PRO_SYSMON_RST //@apireg:software:name pro_sysmon_rst //@apireg:value:appoint bit-width:1 ; 系统检测模块复位，1bit，高有效 //@apireg:desc abs-addr:0X897C; none //@apireg:note reg_hw_name:pro_sysmon_rst //@apireg:0xaddr 0X8800 | (((0X5F&0XFF) << 2) | ((0X5F&0X100) << 6)) 9'H05F : pro_read_wreg_data <= {{15{1'B0}},pro_sysmon_rst[0:0]}; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_AUTO_EN //@apireg:software:name AutoModeEnable //@apireg:value:appoint bit-width:16 ; 1bit 1：auto triger，0： single triger //@apireg:desc abs-addr:0X8980; 是否选择了自动触发模式， ; 当一定时间内没有产生触发时， ; 屏幕强制产生触发信号，刷新波形,,,, //@apireg:note reg_hw_name:trig_module_trig_auto_en //@apireg:0xaddr 0X8800 | (((0X60&0XFF) << 2) | ((0X60&0X100) << 6)) 9'H060 : pro_read_wreg_data <= trig_module_trig_auto_en[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_CALI_VALUE //@apireg:software:name CalibrationNum //@apireg:value:appoint bit-width:8 ; 8bits //@apireg:desc abs-addr:0X8984; 校正参数，设定的校正时间，触发信号到来之后继续 ; 读FIFO，用于修正实际触发点的固定偏移,,,, //@apireg:note reg_hw_name:trig_module_trig_cali_value //@apireg:0xaddr 0X8800 | (((0X61&0XFF) << 2) | ((0X61&0X100) << 6)) 9'H061 : pro_read_wreg_data <= {{8{1'B0}},trig_module_trig_cali_value[7:0]}; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_CALI_TRIG_DELAY_EN //@apireg:software:name CaliTrigDelayEnable //@apireg:value:appoint bit-width:1 ; 1bit 1：calibrate 0：off //@apireg:desc abs-addr:0X8988; 校正参数使能，当使能有效时，修正数才起作用,,,, //@apireg:note reg_hw_name:trig_module_cali_trig_delay_en //@apireg:0xaddr 0X8800 | (((0X62&0XFF) << 2) | ((0X62&0X100) << 6)) 9'H062 : pro_read_wreg_data <= {{15{1'B0}},trig_module_cali_trig_delay_en[0:0]}; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRI_FORCE //@apireg:software:name ForceTrigEnable //@apireg:value:appoint bit-width:1 ; 1bit 1：force triger 高有效 //@apireg:desc abs-addr:0X898C; 无论是否产生触发，都输出一个强制触发信号， ; 显示一帧波形,,,, //@apireg:note reg_hw_name:trig_module_tri_force //@apireg:0xaddr 0X8800 | (((0X63&0XFF) << 2) | ((0X63&0X100) << 6)) 9'H063 : pro_read_wreg_data <= {{15{1'B0}},trig_module_tri_force[0:0]}; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRI_HOLDOFF_TIME_H16 //@apireg:software:name HoldOffTimeH //@apireg:value:appoint bit-width:16 ; 16bits 1：[31:16] //@apireg:desc abs-addr:0X8990; 触发释抑参数， 触发释抑这段时间内不响应触发， ; 释抑结束后马上响应下一个触发沿,,,, //@apireg:note reg_hw_name:trig_module_tri_holdoff_time_h16 //@apireg:0xaddr 0X8800 | (((0X64&0XFF) << 2) | ((0X64&0X100) << 6)) 9'H064 : pro_read_wreg_data <= trig_module_tri_holdoff_time_h16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRI_HOLDOFF_TIME_L16 //@apireg:software:name HoldOffTimeL //@apireg:value:appoint bit-width:16 ; 16bits 0：[15:0] //@apireg:desc abs-addr:0X8994; 触发释抑参数， 触发释抑这段时间内不响应触发， ; 释抑结束后马上响应下一个触发沿,,,, //@apireg:note reg_hw_name:trig_module_tri_holdoff_time_l16 //@apireg:0xaddr 0X8800 | (((0X65&0XFF) << 2) | ((0X65&0X100) << 6)) 9'H065 : pro_read_wreg_data <= trig_module_tri_holdoff_time_l16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_POSDEPTH_SET_H16 //@apireg:software:name PosDepthSetH //@apireg:value:appoint bit-width:16 ; 16bits 2：[47:32] //@apireg:desc abs-addr:0X8998; 后触发深度，以4ns为单位的个数,,,, //@apireg:note reg_hw_name:trig_module_trig_posdepth_set_h16 //@apireg:0xaddr 0X8800 | (((0X66&0XFF) << 2) | ((0X66&0X100) << 6)) 9'H066 : pro_read_wreg_data <= trig_module_trig_posdepth_set_h16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_POSDEPTH_SET_L16 //@apireg:software:name PosDepthSetL //@apireg:value:appoint bit-width:16 ; 16bits 0：[15:0] //@apireg:desc abs-addr:0X899C; 后触发深度，以4ns为单位的个数,,,, //@apireg:note reg_hw_name:trig_module_trig_posdepth_set_l16 //@apireg:0xaddr 0X8800 | (((0X67&0XFF) << 2) | ((0X67&0X100) << 6)) 9'H067 : pro_read_wreg_data <= trig_module_trig_posdepth_set_l16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_POSDEPTH_SET_M16 //@apireg:software:name PosDepthSetM //@apireg:value:appoint bit-width:16 ; 16bits 1：[31:16] //@apireg:desc abs-addr:0X89A0; 后触发深度，以4ns为单位的个数,,,, //@apireg:note reg_hw_name:trig_module_trig_posdepth_set_m16 //@apireg:0xaddr 0X8800 | (((0X68&0XFF) << 2) | ((0X68&0X100) << 6)) 9'H068 : pro_read_wreg_data <= trig_module_trig_posdepth_set_m16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET_H16 //@apireg:software:name PreDepthSetH //@apireg:value:appoint bit-width:16 ; 16bits 2：[47:32] //@apireg:desc abs-addr:0X89A4; 预触发深度，调节触发点在屏幕中的位置,,,, //@apireg:note reg_hw_name:trig_module_trig_predepth_set_h16 //@apireg:0xaddr 0X8800 | (((0X69&0XFF) << 2) | ((0X69&0X100) << 6)) 9'H069 : pro_read_wreg_data <= trig_module_trig_predepth_set_h16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET_L16 //@apireg:software:name PreDepthSetL //@apireg:value:appoint bit-width:16 ; 16bits 0：[15:0] //@apireg:desc abs-addr:0X89A8; 预触发深度，调节触发点在屏幕中的位置,,,, //@apireg:note reg_hw_name:trig_module_trig_predepth_set_l16 //@apireg:0xaddr 0X8800 | (((0X6A&0XFF) << 2) | ((0X6A&0X100) << 6)) 9'H06A : pro_read_wreg_data <= trig_module_trig_predepth_set_l16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET_M16 //@apireg:software:name PreDepthSetM //@apireg:value:appoint bit-width:16 ; 16bits 1：[31:16] //@apireg:desc abs-addr:0X89AC; 预触发深度，调节触发点在屏幕中的位置,,,, //@apireg:note reg_hw_name:trig_module_trig_predepth_set_m16 //@apireg:0xaddr 0X8800 | (((0X6B&0XFF) << 2) | ((0X6B&0X100) << 6)) 9'H06B : pro_read_wreg_data <= trig_module_trig_predepth_set_m16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_RESET_N //@apireg:software:name Reset //@apireg:value:appoint bit-width:1 ; 1bit 0：active 低有效 //@apireg:desc abs-addr:0X89B0; 软件触发复位,,,, //@apireg:note reg_hw_name:trig_module_trig_reset_n //@apireg:0xaddr 0X8800 | (((0X6C&0XFF) << 2) | ((0X6C&0X100) << 6)) 9'H06C : pro_read_wreg_data <= {{15{1'B0}},trig_module_trig_reset_n[0:0]}; //@apireg:group:title 1st //@apireg:title TRIG_1ST_ACQ_TRIG_OR_EXT_SEL //@apireg:software:name SourceControl //@apireg:value:appoint bit-width:5 ; 5bits：b[2：0]选择来自哪一块采集板：000，板一，001，板二，002，板三，003：板四，004：板五，006：板六 //@apireg:desc abs-addr:0X89B4; 1级触发采集路径选择，最高两位为00时选择触发来自采集板,,,, //@apireg:note reg_hw_name:trig_1st_source_sel //@apireg:0xaddr 0X8800 | (((0X6D&0XFF) << 2) | ((0X6D&0X100) << 6)) 9'H06D : pro_read_wreg_data <= {{11{1'B0}},trig_1st_source_sel[4:0]}; //@apireg:group:title 1st //@apireg:title TRIG_EXT_SETTING //@apireg:software:name trig_ext_setting //@apireg:value:appoint bit-width:16 ; [15:0]外触发设置 //@apireg:desc abs-addr:0X8AA8; none //@apireg:note reg_hw_name:trig_ext_setting //@apireg:0xaddr 0X8800 | (((0XAA&0XFF) << 2) | ((0XAA&0X100) << 6)) 9'H0AA : pro_read_wreg_data <= trig_ext_setting[15:0] ; //@apireg:group:title 1st //@apireg:title TRIG_1ST_AUTO_FAST_SETTING //@apireg:software:name auto_fast //@apireg:value:appoint bit-width:16 ; 16bits，[15] 1： 使能打开 0：使能关闭 ; [14:0] 计数个数 //@apireg:desc abs-addr:0X8AB0; 1级触发自动快速触发设置,,,, //@apireg:note reg_hw_name:trig_1st_auto_fast_setting //@apireg:0xaddr 0X8800 | (((0XAC&0XFF) << 2) | ((0XAC&0X100) << 6)) 9'H0AC : pro_read_wreg_data <= trig_1st_auto_fast_setting[15:0]; //@apireg:group:title 1st //@apireg:title REG_CH_OFFSET_ADJUST_EN //@apireg:software:name adjust_en //@apireg:value:appoint bit-width:1 ; 通道偏移功能使能 1:打开 0：关闭 //@apireg:desc abs-addr:0XC844; none //@apireg:note reg_hw_name:reg_ch_offset_adjust_en //@apireg:0xaddr 0X8800 | (((0X111&0XFF) << 2) | ((0X111&0X100) << 6)) 9'H111 : pro_read_wreg_data <= {{15{1'B0}},reg_ch_offset_adjust_en[0:0]}; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET1_H16 //@apireg:software:name trig_predepth_set1_h16 //@apireg:value:appoint bit-width:16 ; 通道2偏移预触发设定 //@apireg:desc abs-addr:0XC848; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set1_h16 //@apireg:0xaddr 0X8800 | (((0X112&0XFF) << 2) | ((0X112&0X100) << 6)) 9'H112 : pro_read_wreg_data <= trig_module_trig_predepth_set1_h16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET1_L16 //@apireg:software:name trig_predepth_set1_l16 //@apireg:value:appoint bit-width:16 ; 通道2偏移预触发设定 //@apireg:desc abs-addr:0XC84C; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set1_l16 //@apireg:0xaddr 0X8800 | (((0X113&0XFF) << 2) | ((0X113&0X100) << 6)) 9'H113 : pro_read_wreg_data <= trig_module_trig_predepth_set1_l16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET1_M16 //@apireg:software:name trig_predepth_set1_m16 //@apireg:value:appoint bit-width:16 ; 通道2偏移预触发设定 //@apireg:desc abs-addr:0XC850; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set1_m16 //@apireg:0xaddr 0X8800 | (((0X114&0XFF) << 2) | ((0X114&0X100) << 6)) 9'H114 : pro_read_wreg_data <= trig_module_trig_predepth_set1_m16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET2_H16 //@apireg:software:name trig_predepth_set2_h16 //@apireg:value:appoint bit-width:16 ; 通道3偏移预触发设定 //@apireg:desc abs-addr:0XC854; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set2_h16 //@apireg:0xaddr 0X8800 | (((0X115&0XFF) << 2) | ((0X115&0X100) << 6)) 9'H115 : pro_read_wreg_data <= trig_module_trig_predepth_set2_h16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET2_L16 //@apireg:software:name trig_predepth_set2_l16 //@apireg:value:appoint bit-width:16 ; 通道3偏移预触发设定 //@apireg:desc abs-addr:0XC858; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set2_l16 //@apireg:0xaddr 0X8800 | (((0X116&0XFF) << 2) | ((0X116&0X100) << 6)) 9'H116 : pro_read_wreg_data <= trig_module_trig_predepth_set2_l16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET2_M16 //@apireg:software:name trig_predepth_set2_m16 //@apireg:value:appoint bit-width:16 ; 通道3偏移预触发设定 //@apireg:desc abs-addr:0XC85C; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set2_m16 //@apireg:0xaddr 0X8800 | (((0X117&0XFF) << 2) | ((0X117&0X100) << 6)) 9'H117 : pro_read_wreg_data <= trig_module_trig_predepth_set2_m16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET3_H16 //@apireg:software:name trig_predepth_set3_h16 //@apireg:value:appoint bit-width:16 ; 通道4偏移预触发设定 //@apireg:desc abs-addr:0XC860; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set3_h16 //@apireg:0xaddr 0X8800 | (((0X118&0XFF) << 2) | ((0X118&0X100) << 6)) 9'H118 : pro_read_wreg_data <= trig_module_trig_predepth_set3_h16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET3_L16 //@apireg:software:name trig_predepth_set3_l16 //@apireg:value:appoint bit-width:16 ; 通道4偏移预触发设定 //@apireg:desc abs-addr:0XC864; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set3_l16 //@apireg:0xaddr 0X8800 | (((0X119&0XFF) << 2) | ((0X119&0X100) << 6)) 9'H119 : pro_read_wreg_data <= trig_module_trig_predepth_set3_l16[15:0]; //@apireg:group:title 1st //@apireg:title TRIG_MODULE_TRIG_PREDEPTH_SET3_M16 //@apireg:software:name trig_predepth_set3_m16 //@apireg:value:appoint bit-width:16 ; 通道4偏移预触发设定 //@apireg:desc abs-addr:0XC868; none //@apireg:note reg_hw_name:trig_module_trig_predepth_set3_m16 //@apireg:0xaddr 0X8800 | (((0X11A&0XFF) << 2) | ((0X11A&0X100) << 6)) 9'H11A : pro_read_wreg_data <= trig_module_trig_predepth_set3_m16[15:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_AUTO_TRIG_EN //@apireg:software:name AutoModeEnable //@apireg:value:appoint bit-width:1 ; 1bit，1：auto_trig，0：normal_trig //@apireg:desc abs-addr:0X89B8; 2级触发模式1：自动触发； 0：正常触发,,,, //@apireg:note reg_hw_name:trig_2nd_auto_trig_en //@apireg:0xaddr 0X8800 | (((0X6E&0XFF) << 2) | ((0X6E&0X100) << 6)) 9'H06E : pro_read_wreg_data <= {{15{1'B0}},trig_2nd_auto_trig_en[0:0]}; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_CMP1_LEVEL_L //@apireg:software:name CompareVoltage1Down //@apireg:value:appoint bit-width:12 ; 12bits，value_of_level //@apireg:desc abs-addr:0X89BC; 2级触发电平低电平组：12位下限的以12Bit之4096为基准， ; 2048表示0电平,,,, //@apireg:note reg_hw_name:trig_2nd_cmp1_level_l //@apireg:0xaddr 0X8800 | (((0X6F&0XFF) << 2) | ((0X6F&0X100) << 6)) 9'H06F : pro_read_wreg_data <= {{4{1'B0}},trig_2nd_cmp1_level_l[11:0]}; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_CMP1_LEVEL_H //@apireg:software:name CompareVoltage1Up //@apireg:value:appoint bit-width:12 ; 12bits，value_of_level //@apireg:desc abs-addr:0X89C0; 2级触发电平低电平组：12位上限的以12Bit之4096为基准， ; 2048表示0电平,,,, //@apireg:note reg_hw_name:trig_2nd_cmp1_level_h //@apireg:0xaddr 0X8800 | (((0X70&0XFF) << 2) | ((0X70&0X100) << 6)) 9'H070 : pro_read_wreg_data <= {{4{1'B0}},trig_2nd_cmp1_level_h[11:0]}; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_CMP2_LEVEL_L //@apireg:software:name CompareVoltage2Down //@apireg:value:appoint bit-width:12 ; 12bits value_of_level //@apireg:desc abs-addr:0X89C4; 2级触发电平高电平组：用于需要两组触发电平的触发模式，如斜率，欠幅触发等,,,, //@apireg:note reg_hw_name:trig_2nd_cmp2_level_l //@apireg:0xaddr 0X8800 | (((0X71&0XFF) << 2) | ((0X71&0X100) << 6)) 9'H071 : pro_read_wreg_data <= {{4{1'B0}},trig_2nd_cmp2_level_l[11:0]}; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_CMP2_LEVEL_H //@apireg:software:name CompareVoltage2Up //@apireg:value:appoint bit-width:12 ; 12bits value_of_level //@apireg:desc abs-addr:0X89C8; 2级触发电平高电平组：用于需要两组触发电平的触发模式，如斜率，欠幅触发等,,,, //@apireg:note reg_hw_name:trig_2nd_cmp2_level_h //@apireg:0xaddr 0X8800 | (((0X72&0XFF) << 2) | ((0X72&0X100) << 6)) 9'H072 : pro_read_wreg_data <= {{4{1'B0}},trig_2nd_cmp2_level_h[11:0]}; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_EDGE_TRIG_CHS //@apireg:software:name EdgeSelect //@apireg:value:appoint bit-width:16 ; 1bit，1：rising edge，0：falling edge 1x:any edge //@apireg:desc abs-addr:0X89CC; 2级边沿触发极性选择：1：上升沿触发；0：下降沿触发,,,, //@apireg:note reg_hw_name:trig_2nd_edge_trig_edge_sel //@apireg:0xaddr 0X8800 | (((0X73&0XFF) << 2) | ((0X73&0X100) << 6)) 9'H073 : pro_read_wreg_data <= trig_2nd_edge_trig_edge_sel[15:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_PRETRIG_DEPTH //@apireg:software:name PreDepth //@apireg:value:appoint bit-width:16 ; 16bits，num_of_pts //@apireg:desc abs-addr:0X89D0; 2级触发预触发深度值,,,, //@apireg:note reg_hw_name:trig_2nd_pretrig_depth //@apireg:0xaddr 0X8800 | (((0X74&0XFF) << 2) | ((0X74&0X100) << 6)) 9'H074 : pro_read_wreg_data <= trig_2nd_pretrig_depth[15:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_AUTO_TRIG_NUM //@apireg:software:name SearchRange //@apireg:value:appoint bit-width:16 ; 16bits，num_of_pts //@apireg:desc abs-addr:0X89D4; 2级自动触发找点数，2级触发未来时，计数到该设置值后自动进行触发,,,, //@apireg:note reg_hw_name:trig_2nd_auto_trig_num //@apireg:0xaddr 0X8800 | (((0X75&0XFF) << 2) | ((0X75&0X100) << 6)) 9'H075 : pro_read_wreg_data <= trig_2nd_auto_trig_num[15:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_SERIAL_TRIG_EN //@apireg:software:name SerialTrigEnable //@apireg:value:appoint bit-width:4 ; 1bit，1：trig_en 0：trig_off //@apireg:desc abs-addr:0X89D8; 2级触发使能。1：触发使能 ；0：关闭,,,, //@apireg:note reg_hw_name:trig_2nd_serial_trig_en //@apireg:0xaddr 0X8800 | (((0X76&0XFF) << 2) | ((0X76&0X100) << 6)) 9'H076 : pro_read_wreg_data <= {{12{1'B0}},trig_2nd_serial_trig_en[3:0]}; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_TRIG_SOURCE_SEL //@apireg:software:name SourceSelect //@apireg:value:appoint bit-width:3 ; 3bits 0：channel1，1：channel2 ; （后续可能有其他的通道加入） //@apireg:desc abs-addr:0X89DC; 2级数字触发源选择，信号是迟滞比较后产生的新的状态信号， ; 用于数字边沿触发,,,, //@apireg:note reg_hw_name:trig_2nd_trig_source_sel //@apireg:0xaddr 0X8800 | (((0X77&0XFF) << 2) | ((0X77&0X100) << 6)) 9'H077 : pro_read_wreg_data <= {{13{1'B0}},trig_2nd_trig_source_sel[2:0]}; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_TRIG_TYPE_SEL //@apireg:software:name TrigTypeSelect //@apireg:value:appoint bit-width:16 ; 11bits，[2:0]代表触发分类，00单通道高级触发，01多通道高级触发，02la触发，03协议触发，04其他触发（视频触发等）。[6:3]表示单通道高级触发类型：00边沿，01脉宽，02斜率，03跌落，04欠幅，05超时，06窗口。[10:7]表示多通道高级触发，00码型，01状态，02建立保持，03级联，04间隔。 //@apireg:desc abs-addr:0X89E0; 2级触发触发类型选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_type_sel //@apireg:0xaddr 0X8800 | (((0X78&0XFF) << 2) | ((0X78&0X100) << 6)) 9'H078 : pro_read_wreg_data <= trig_2nd_trig_type_sel[15:0]; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_SEARCH_EN //@apireg:software:name search_en //@apireg:value:appoint bit-width:1 ; 1：是开启查找触发点计数功能，不丢点 ; 0：关闭查找触发点计数功能，正常二级触发丢点模式 //@apireg:desc abs-addr:0X8A9C; none //@apireg:note reg_hw_name:trig_2nd_search_en //@apireg:0xaddr 0X8800 | (((0XA7&0XFF) << 2) | ((0XA7&0X100) << 6)) 9'H0A7 : pro_read_wreg_data <= {{15{1'B0}},trig_2nd_search_en[0:0]}; //@apireg:group:title 2nd //@apireg:title TRIG_2ND_AC_DC_SETTING //@apireg:software:name ac_dc_setting //@apireg:value:appoint bit-width:1 ; bit[0]开启二级触发ac_dc 使能。为高：ac.为低dc //@apireg:desc abs-addr:0X8AA0; none //@apireg:note reg_hw_name:trig_2nd_ac_dc_setting //@apireg:0xaddr 0X8800 | (((0XA8&0XFF) << 2) | ((0XA8&0X100) << 6)) 9'H0A8 : pro_read_wreg_data <= {{15{1'B0}},trig_2nd_ac_dc_setting[0:0]}; //@apireg:group:title ASourceSel //@apireg:title TRIG_COM_TRIG_EVENT_A_SOURCE_SEL //@apireg:software:name EventASourceSelect //@apireg:value:appoint bit-width:3 ; 3bits 0：channel1；1：channel2 ; （后续可能有其他的通道加入） //@apireg:desc abs-addr:0XC800; 事件A通道选择,,,, //@apireg:note reg_hw_name:trig_com_trig_event_a_source_sel //@apireg:0xaddr 0X8800 | (((0X100&0XFF) << 2) | ((0X100&0X100) << 6)) 9'H100 : pro_read_wreg_data <= {{13{1'B0}},trig_com_trig_event_a_source_sel[2:0]}; //@apireg:group:title BSourceSel //@apireg:title TRIG_COM_TRIG_EVENT_B_SOURCE_SEL //@apireg:software:name EventBSourceSelect //@apireg:value:appoint bit-width:3 ; 3bits 0：channel1；1：channel2 ; （后续可能有其他的通道加入） //@apireg:desc abs-addr:0XC804; 事件B通道选择,,,, //@apireg:note reg_hw_name:trig_com_trig_event_b_source_sel //@apireg:0xaddr 0X8800 | (((0X101&0XFF) << 2) | ((0X101&0X100) << 6)) 9'H101 : pro_read_wreg_data <= {{13{1'B0}},trig_com_trig_event_b_source_sel[2:0]}; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_EVENTA_SOURCE //@apireg:software:name EventASourceSelect //@apireg:value:appoint bit-width:4 ; 3bits 0：channel1；1：channel2 2：channel 3 ... ; （后续可能有其他的通道加入） //@apireg:desc abs-addr:0X89E4; 事件A通道选择,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_eventa_source //@apireg:0xaddr 0X8800 | (((0X79&0XFF) << 2) | ((0X79&0X100) << 6)) 9'H079 : pro_read_wreg_data <= {{12{1'B0}},trig_com_trig_cascade_eventa_source[3:0]}; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_EVENTB_SOURCE //@apireg:software:name EventBSourceSelect //@apireg:value:appoint bit-width:4 ; 3bits 0：channel1；1：channel2 2：channel 3 ... ; （后续可能有其他的通道加入） //@apireg:desc abs-addr:0X89E8; 事件B通道选择,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_eventb_source //@apireg:0xaddr 0X8800 | (((0X7A&0XFF) << 2) | ((0X7A&0X100) << 6)) 9'H07A : pro_read_wreg_data <= {{12{1'B0}},trig_com_trig_cascade_eventb_source[3:0]}; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADED_EN //@apireg:software:name CascadedEnable //@apireg:value:appoint bit-width:1 ; 1bit 0：关闭；1：开启； //@apireg:desc abs-addr:0X89EC; 级联触发使能,,,, //@apireg:note reg_hw_name:trig_com_trig_cascaded_en //@apireg:0xaddr 0X8800 | (((0X7B&0XFF) << 2) | ((0X7B&0X100) << 6)) 9'H07B : pro_read_wreg_data <= {{15{1'B0}},trig_com_trig_cascaded_en[0:0]}; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_EVENTA_TYPE //@apireg:software:name EventATrigType //@apireg:value:appoint bit-width:4 ; 0:边沿 1-脉宽 2-斜率 3-欠幅 4-超时 //@apireg:desc abs-addr:0X8BA4; 事件A触发类型选择,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_eventa_type //@apireg:0xaddr 0X8800 | (((0XE9&0XFF) << 2) | ((0XE9&0X100) << 6)) 9'H0E9 : pro_read_wreg_data <= {{12{1'B0}},trig_com_trig_cascade_eventa_type[3:0]}; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_EVENTB_TYPE //@apireg:software:name EventBTrigType //@apireg:value:appoint bit-width:4 ; 0:边沿 1-脉宽 2-斜率 3-欠幅 4-超时 //@apireg:desc abs-addr:0X8BA8; 事件B触发类型选择,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_eventb_type //@apireg:0xaddr 0X8800 | (((0XEA&0XFF) << 2) | ((0XEA&0X100) << 6)) 9'H0EA : pro_read_wreg_data <= {{12{1'B0}},trig_com_trig_cascade_eventb_type[3:0]}; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_DELAYA_SET //@apireg:software:name EventADelaySet //@apireg:value:appoint bit-width:16 ; [15] 为1，表示时间时间 ，此时[14:0]表示delay时间，以4ns为单位 ; 为0 ，表示事件，此时[14:0]表示delay事件，为事件个数 //@apireg:desc abs-addr:0X8BAC; 事件A延迟设置,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_delaya_set //@apireg:0xaddr 0X8800 | (((0XEB&0XFF) << 2) | ((0XEB&0X100) << 6)) 9'H0EB : pro_read_wreg_data <= trig_com_trig_cascade_delaya_set[15:0]; //@apireg:group:title Cascaded //@apireg:title TRIG_COM_TRIG_CASCADE_DELAYB_SET //@apireg:software:name EventBDelaySet //@apireg:value:appoint bit-width:16 ; [15] 为1，表示时间时间 ，此时[14:0]表示delay时间，以4ns为单位 ; 为0 ，表示事件，此时[14:0]表示delay事件，为事件个数 //@apireg:desc abs-addr:0X8BB0; 事件B延迟设置,,,, //@apireg:note reg_hw_name:trig_com_trig_cascade_delayb_set //@apireg:0xaddr 0X8800 | (((0XEC&0XFF) << 2) | ((0XEC&0X100) << 6)) 9'H0EC : pro_read_wreg_data <= trig_com_trig_cascade_delayb_set[15:0]; //@apireg:group:title Code //@apireg:title TRIG_COM_CODE_TRIG_CTRL_WORD0 //@apireg:software:name Condition //@apireg:value:appoint bit-width:3 ; 3bits 000：与；001：或；010：与非；011：或非； //@apireg:desc abs-addr:0X89F0; 码型逻辑比较选择,,,, //@apireg:note reg_hw_name:trig_com_code_trig_ctrl_word0 //@apireg:0xaddr 0X8800 | (((0X7C&0XFF) << 2) | ((0X7C&0X100) << 6)) 9'H07C : pro_read_wreg_data <= {{13{1'B0}},trig_com_code_trig_ctrl_word0[2:0]}; //@apireg:group:title Code //@apireg:title TRIG_COM_CODE_TRIG_CTRL_WORD1 //@apireg:software:name CtrlWord //@apireg:value:appoint bit-width:16 ; 16bits [15:8]：通道无关项选择 ; [7:0]：各通道码型设置值 //@apireg:desc abs-addr:0X89F4; 8通道码型设置,,,, //@apireg:note reg_hw_name:trig_com_code_trig_ctrl_word1 //@apireg:0xaddr 0X8800 | (((0X7D&0XFF) << 2) | ((0X7D&0X100) << 6)) 9'H07D : pro_read_wreg_data <= trig_com_code_trig_ctrl_word1[15:0]; //@apireg:group:title Code //@apireg:title TRIG_COM_CODE_CODE_WIDTH_FUNC //@apireg:software:name WidthAndPolarity //@apireg:value:appoint bit-width:4 ; 4bits [3:2]：00：正极性；01：负极性； ; [1:0]：00=大于；01=小于；10=等于；11=不等于； //@apireg:desc abs-addr:0X89F8; 码型脉宽比较符和极性选择,,,, //@apireg:note reg_hw_name:trig_com_code_code_width_func //@apireg:0xaddr 0X8800 | (((0X7E&0XFF) << 2) | ((0X7E&0X100) << 6)) 9'H07E : pro_read_wreg_data <= {{12{1'B0}},trig_com_code_code_width_func[3:0]}; //@apireg:group:title Dropout //@apireg:title TRIG_2ND_TRIG_DROPOUT_FUNC //@apireg:software:name IsDualEdgeRefresh //@apireg:value:appoint bit-width:1 ; 1bit 0：无双沿刷新；1：有双沿刷新 //@apireg:desc abs-addr:0X89FC; 2级跌落刷新极性选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_dropout_func //@apireg:0xaddr 0X8800 | (((0X7F&0XFF) << 2) | ((0X7F&0X100) << 6)) 9'H07F : pro_read_wreg_data <= {{15{1'B0}},trig_2nd_trig_dropout_func[0:0]}; //@apireg:group:title Dropout //@apireg:title TRIG_2ND_TRIG_DROPOUT_POLARITY_SEL //@apireg:software:name Polarity //@apireg:value:appoint bit-width:1 ; 1bit 0：上升沿；1：下降沿 //@apireg:desc abs-addr:0X8A00; 2级跌落极性选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_dropout_polarity_sel //@apireg:0xaddr 0X8800 | (((0X80&0XFF) << 2) | ((0X80&0X100) << 6)) 9'H080 : pro_read_wreg_data <= {{15{1'B0}},trig_2nd_trig_dropout_polarity_sel[0:0]}; //@apireg:group:title EdgeThenEdge //@apireg:title TRIG_COM_TRIG_ETE_CAPTURE_POLAR //@apireg:software:name CapturePolarity //@apireg:value:appoint bit-width:1 ; 1bit 0：上升沿；1：下降沿 //@apireg:desc abs-addr:0X8A04; 捕捉信号极性,,,, //@apireg:note reg_hw_name:trig_com_trig_ete_capture_polar //@apireg:0xaddr 0X8800 | (((0X81&0XFF) << 2) | ((0X81&0X100) << 6)) 9'H081 : pro_read_wreg_data <= {{15{1'B0}},trig_com_trig_ete_capture_polar[0:0]}; //@apireg:group:title EdgeThenEdge //@apireg:title TRIG_COM_TRIG_ETE_EVENT //@apireg:software:name EventType //@apireg:value:appoint bit-width:1 ; 1bit 0：时间计数；1：个数计数 //@apireg:desc abs-addr:0X8A08; 选择以时间进行计数或者以捕获沿个数进行计数,,,, //@apireg:note reg_hw_name:trig_com_trig_ete_event //@apireg:0xaddr 0X8800 | (((0X82&0XFF) << 2) | ((0X82&0X100) << 6)) 9'H082 : pro_read_wreg_data <= {{15{1'B0}},trig_com_trig_ete_event[0:0]}; //@apireg:group:title EdgeThenEdge //@apireg:title TRIG_COM_TRIG_ETE_LAUNCH_POLAR //@apireg:software:name LaunchPolarity //@apireg:value:appoint bit-width:1 ; 1bit 0：上升沿；1：下降沿 //@apireg:desc abs-addr:0X8A0C; 选通信号极性,,,, //@apireg:note reg_hw_name:trig_com_trig_ete_launch_polar //@apireg:0xaddr 0X8800 | (((0X83&0XFF) << 2) | ((0X83&0X100) << 6)) 9'H083 : pro_read_wreg_data <= {{15{1'B0}},trig_com_trig_ete_launch_polar[0:0]}; //@apireg:group:title Fifo //@apireg:title TRIG_2ND_SERIAL_PROG_FULL_THRESH //@apireg:software:name SerialFifoDepth //@apireg:value:appoint bit-width:16 ; 16bits，num_of_pts //@apireg:desc abs-addr:0X8A10; 2级采集板串行FIFO深度，最大16384，缓存波形数据并找点，不同时基档位数深度不同，目前初始化设为16000,,,, //@apireg:note reg_hw_name:trig_2nd_serial_prog_full_thresh //@apireg:0xaddr 0X8800 | (((0X84&0XFF) << 2) | ((0X84&0X100) << 6)) 9'H084 : pro_read_wreg_data <= trig_2nd_serial_prog_full_thresh[15:0]; //@apireg:group:title Glitch //@apireg:title TRIG_2ND_GLI_FUNC_SEL //@apireg:software:name Condition //@apireg:value:appoint bit-width:1 ; 1bit 0：<；1：> //@apireg:desc abs-addr:0X8A14; 2级毛刺条件设置,,,, //@apireg:note reg_hw_name:trig_2nd_gli_func_sel //@apireg:0xaddr 0X8800 | (((0X85&0XFF) << 2) | ((0X85&0X100) << 6)) 9'H085 : pro_read_wreg_data <= {{15{1'B0}},trig_2nd_gli_func_sel[0:0]}; //@apireg:group:title Interval //@apireg:title TRIG_COM_TRIG_INTERVAL_FUNC //@apireg:software:name Condition //@apireg:value:appoint bit-width:2 ; 2bits 0：大于；1：小于；2：等于；3：不等于 //@apireg:desc abs-addr:0X8A18; 2级间隔条件选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_interval_func //@apireg:0xaddr 0X8800 | (((0X86&0XFF) << 2) | ((0X86&0X100) << 6)) 9'H086 : pro_read_wreg_data <= {{14{1'B0}},trig_2nd_trig_interval_func[1:0]}; //@apireg:group:title Interval //@apireg:title TRIG_COM_TRIG_INTERVAL_POLARITY_SEL //@apireg:software:name Polarity //@apireg:value:appoint bit-width:1 ; 1bit 0：上升沿；1：下降沿 //@apireg:desc abs-addr:0X8A1C; 2级间隔极性选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_interval_polarity_sel //@apireg:0xaddr 0X8800 | (((0X87&0XFF) << 2) | ((0X87&0X100) << 6)) 9'H087 : pro_read_wreg_data <= {{15{1'B0}},trig_2nd_trig_interval_polarity_sel[0:0]}; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCA_SYNC_SET //@apireg:software:name LocationReserve1 //@apireg:value:appoint bit-width:16 ; 16bits:可扩展 //@apireg:desc abs-addr:0X8A20; 预留 2/19,,,, //@apireg:note reg_hw_name:trig_pro_loca_sync_set //@apireg:0xaddr 0X8800 | (((0X88&0XFF) << 2) | ((0X88&0X100) << 6)) 9'H088 : pro_read_wreg_data <= trig_pro_loca_sync_set[15:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCA_SYNC_SET_EXT //@apireg:software:name LocationReserve2 //@apireg:value:appoint bit-width:16 ; 预留扩展 //@apireg:desc abs-addr:0X8A24; 预留,,,, //@apireg:note reg_hw_name:trig_pro_loca_sync_set_ext //@apireg:0xaddr 0X8800 | (((0X89&0XFF) << 2) | ((0X89&0X100) << 6)) 9'H089 : pro_read_wreg_data <= trig_pro_loca_sync_set_ext[15:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCAL_SYNC_IO_RST //@apireg:software:name SyncReset //@apireg:value:appoint bit-width:1 ; delay复位，高有效， //@apireg:desc abs-addr:0X8A78; none //@apireg:note reg_hw_name:trig_pro_local_sync_io_rst //@apireg:0xaddr 0X8800 | (((0X9E&0XFF) << 2) | ((0X9E&0X100) << 6)) 9'H09E : pro_read_wreg_data <= {{15{1'B0}},trig_pro_local_sync_io_rst[0:0]}; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCAL_SYNC_DELAY_INC //@apireg:software:name SyncINC //@apireg:value:appoint bit-width:16 ; 16bits: 采集板inc使能，1递增0，递减 //@apireg:desc abs-addr:0X8A7C; none //@apireg:note reg_hw_name:trig_pro_local_sync_delay_inc //@apireg:0xaddr 0X8800 | (((0X9F&0XFF) << 2) | ((0X9F&0X100) << 6)) 9'H09F : pro_read_wreg_data <= trig_pro_local_sync_delay_inc[15:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCAL_SYNC_DELAY_CE //@apireg:software:name SyncCE //@apireg:value:appoint bit-width:16 ; 16bits：采集板ce使能，0时维持不变，1时在下一个时钟上升沿递增或递减 //@apireg:desc abs-addr:0X8A80; none //@apireg:note reg_hw_name:trig_pro_local_sync_delay_ce //@apireg:0xaddr 0X8800 | (((0XA0&0XFF) << 2) | ((0XA0&0X100) << 6)) 9'H0A0 : pro_read_wreg_data <= trig_pro_local_sync_delay_ce[15:0]; //@apireg:group:title Location //@apireg:title TRIG_PRO_LOCAL_SYNC_DELAY_VTC //@apireg:software:name SyncVTC //@apireg:value:appoint bit-width:16 ; 16bits: 采集板vtc使能高有效 //@apireg:desc abs-addr:0X8A84; none //@apireg:note reg_hw_name:trig_pro_local_sync_delay_vtc //@apireg:0xaddr 0X8800 | (((0XA1&0XFF) << 2) | ((0XA1&0X100) << 6)) 9'H0A1 : pro_read_wreg_data <= trig_pro_local_sync_delay_vtc[15:0]; //@apireg:group:title Location //@apireg:title DBI_PRO_TRIG_DISCARD //@apireg:software:name dbi_pro_trig_discard //@apireg:value:appoint bit-width:16 ; [15] 开启dbi 丢点使能 1有效 [14:0] 丢点数设置 //@apireg:desc abs-addr:0X8AA4; none //@apireg:note reg_hw_name:dbi_pro_trig_discard //@apireg:0xaddr 0X8800 | (((0XA9&0XFF) << 2) | ((0XA9&0X100) << 6)) 9'H0A9 : pro_read_wreg_data <= dbi_pro_trig_discard[15:0]; //@apireg:group:title Location //@apireg:title TRIG_1ST_TEST_MODE_PRO_EN //@apireg:software:name TestModeProEn //@apireg:value:appoint bit-width:1 ; 触发传输偏移量测试模式使能，1bit，测试模式设为1，正常采集模式设为0 //@apireg:desc abs-addr:0XC964; none //@apireg:note reg_hw_name:trig_1st_test_mode_pro_en //@apireg:0xaddr 0X8800 | (((0X159&0XFF) << 2) | ((0X159&0X100) << 6)) 9'H159 : pro_read_wreg_data <= {{15{1'B0}},trig_1st_test_mode_pro_en[0:0]}; //@apireg:group:title Location //@apireg:title TRIG_1ST_TEST_MODE_ACQ_NUM //@apireg:software:name TestAcqNum //@apireg:value:appoint bit-width:16 ; 触发传输偏移量测试采集板板卡号：0-采集板1 1-采集板2…… //@apireg:desc abs-addr:0XC968; none //@apireg:note reg_hw_name:trig_1st_test_mode_acq_num //@apireg:0xaddr 0X8800 | (((0X15A&0XFF) << 2) | ((0X15A&0X100) << 6)) 9'H15A : pro_read_wreg_data <= trig_1st_test_mode_acq_num[15:0]; //@apireg:group:title PulseWidth //@apireg:title TRIG_2ND_TRIG_PW_FUNC_SEL //@apireg:software:name Condition //@apireg:value:appoint bit-width:2 ; 2bit 0 = (实际脉宽)大于(设置值)； ; 1 = 小于； ; 2 = 等于； ; 3 = 小于或大于； //@apireg:desc abs-addr:0X8A28; 脉宽比较限定符选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_pw_func_sel //@apireg:0xaddr 0X8800 | (((0X8A&0XFF) << 2) | ((0X8A&0X100) << 6)) 9'H08A : pro_read_wreg_data <= {{14{1'B0}},trig_2nd_trig_pw_func_sel[1:0]}; //@apireg:group:title PulseWidth //@apireg:title TRIG_2ND_TRIG_PW_POLARITY_SEL //@apireg:software:name Polarity //@apireg:value:appoint bit-width:2 ; 2bit 0 = 正脉冲； ; 1 = 负脉冲； //@apireg:desc abs-addr:0X8A2C; 2级脉冲极性选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_pw_polarity_sel //@apireg:0xaddr 0X8800 | (((0X8B&0XFF) << 2) | ((0X8B&0X100) << 6)) 9'H08B : pro_read_wreg_data <= {{14{1'B0}},trig_2nd_trig_pw_polarity_sel[1:0]}; //@apireg:group:title Runt //@apireg:title TRIG_2ND_RUNT_FUNC_SEL //@apireg:software:name Condition //@apireg:value:appoint bit-width:3 ; 3bit 00：无关；01：<；10：>；11：= //@apireg:desc abs-addr:0X8A30; 2级欠幅条件，低两位：欠幅宽度条件设置； ; 高位：欠幅极性设置0：负欠幅 1：正欠幅,,,, //@apireg:note reg_hw_name:trig_2nd_runt_func_sel //@apireg:0xaddr 0X8800 | (((0X8C&0XFF) << 2) | ((0X8C&0X100) << 6)) 9'H08C : pro_read_wreg_data <= {{13{1'B0}},trig_2nd_runt_func_sel[2:0]}; //@apireg:group:title Setuphold //@apireg:title TRIG_COM_SETUP_HOLD_CTRL_WORD //@apireg:software:name PolarityAndCondition //@apireg:value:appoint bit-width:2 ; 2bits 0：setup，1:hold //@apireg:desc abs-addr:0X8A34; 低位：建立/保持选择， ; 高位：时钟极性选择,,,, //@apireg:note reg_hw_name:trig_com_setup_hold_ctrl_word //@apireg:0xaddr 0X8800 | (((0X8D&0XFF) << 2) | ((0X8D&0X100) << 6)) 9'H08D : pro_read_wreg_data <= {{14{1'B0}},trig_com_setup_hold_ctrl_word[1:0]}; //@apireg:group:title Slope //@apireg:title TRIG_COM_TRIG_SLOPE_FUNC_SEL //@apireg:software:name PolarityAndCondition //@apireg:value:appoint bit-width:3 ; 3bits [2]：1 = 上升沿； ; 0 = 下降沿；[1：0]：00 = (实际时间宽度)大于(设置值)； ; 01 = 小于； ; 10 = 等于； ; 11 = 不等于； //@apireg:desc abs-addr:0X8A38; 选择有效沿极性和选择比较限定符,,,, //@apireg:note reg_hw_name:trig_com_trig_slope_func_sel //@apireg:0xaddr 0X8800 | (((0X8E&0XFF) << 2) | ((0X8E&0X100) << 6)) 9'H08E : pro_read_wreg_data <= {{13{1'B0}},trig_com_trig_slope_func_sel[2:0]}; //@apireg:group:title State //@apireg:title TRIG_COM_STATE_TRIG_CTRL_WORD //@apireg:software:name CtrlWord //@apireg:value:appoint bit-width:15 ; none //@apireg:desc abs-addr:0X8A3C; none //@apireg:note reg_hw_name:trig_com_state_trig_ctrl_word //@apireg:0xaddr 0X8800 | (((0X8F&0XFF) << 2) | ((0X8F&0X100) << 6)) 9'H08F : pro_read_wreg_data <= {{1{1'B0}},trig_com_state_trig_ctrl_word[14:0]}; //@apireg:group:title Timeout //@apireg:title TRIG_2ND_TRIG_TIMEOUT_FUNC //@apireg:software:name IsKeepHighLevel //@apireg:value:appoint bit-width:1 ; 1bit 0 = 保持低电平； ; 1 = 保持高电平； //@apireg:desc abs-addr:0X8A40; 超时电压选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_timeout_func //@apireg:0xaddr 0X8800 | (((0X90&0XFF) << 2) | ((0X90&0X100) << 6)) 9'H090 : pro_read_wreg_data <= {{15{1'B0}},trig_2nd_trig_timeout_func[0:0]}; //@apireg:group:title Video //@apireg:title TRIG_COM_TRIG_VIDEO_CUSTOM_HORIZONTAL //@apireg:software:name CustomHorizontalSet //@apireg:value:appoint bit-width:11 ; 11bits //@apireg:desc abs-addr:0X8A44; 视频触发行设置,,,, //@apireg:note reg_hw_name:trig_com_trig_video_custom_horizontal //@apireg:0xaddr 0X8800 | (((0X91&0XFF) << 2) | ((0X91&0X100) << 6)) 9'H091 : pro_read_wreg_data <= {{5{1'B0}},trig_com_trig_video_custom_horizontal[10:0]}; //@apireg:group:title Video //@apireg:title TRIG_COM_TRIG_VIDEO_MODE //@apireg:software:name Standard //@apireg:value:appoint bit-width:3 ; 3bits 0：ntsc制式，480i； ; 1: pal制式,secam制式,576i； ; 2: 480p制式；3: 576p制式； ; 4: 720p制式；5: 原来是875i制式， ; 这里不需要，改成custom； ; 6: 1080i制式；7: 1080p制式 //@apireg:desc abs-addr:0X8A48; 视频制式,,,, //@apireg:note reg_hw_name:trig_com_trig_video_mode //@apireg:0xaddr 0X8800 | (((0X92&0XFF) << 2) | ((0X92&0X100) << 6)) 9'H092 : pro_read_wreg_data <= {{13{1'B0}},trig_com_trig_video_mode[2:0]}; //@apireg:group:title Video //@apireg:title TRIG_COM_TRIG_VIDEO_SYNC_NUMBER //@apireg:software:name SyncNumber //@apireg:value:appoint bit-width:11 ; 11bits //@apireg:desc abs-addr:0X8A4C; 视频触发行数设置,,,, //@apireg:note reg_hw_name:trig_com_trig_video_sync_number //@apireg:0xaddr 0X8800 | (((0X93&0XFF) << 2) | ((0X93&0X100) << 6)) 9'H093 : pro_read_wreg_data <= {{5{1'B0}},trig_com_trig_video_sync_number[10:0]}; //@apireg:group:title Video //@apireg:title TRIG_VIDEO_TRI_MODE //@apireg:software:name TrigMode //@apireg:value:appoint bit-width:3 ; 3bits 000=所有行；001=指定行；010：偶数场；011：奇数场；100：所有场 //@apireg:desc abs-addr:0X8A50; 视频触发模式,,,, //@apireg:note reg_hw_name:trig_video_tri_mode //@apireg:0xaddr 0X8800 | (((0X94&0XFF) << 2) | ((0X94&0X100) << 6)) 9'H094 : pro_read_wreg_data <= {{13{1'B0}},trig_video_tri_mode[2:0]}; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_TRIG_ETE_EVENT //@apireg:software:name EventType //@apireg:value:appoint bit-width:1 ; 1bit 0：时间计数；1：个数计数 //@apireg:desc abs-addr:0X8A54; 2级触发宽度计数选择，选择以时间还是事件计数,,,, //@apireg:note reg_hw_name:trig_2nd_trig_ete_event //@apireg:0xaddr 0X8800 | (((0X95&0XFF) << 2) | ((0X95&0X100) << 6)) 9'H095 : pro_read_wreg_data <= {{15{1'B0}},trig_2nd_trig_ete_event[0:0]}; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA2_SET_2 //@apireg:software:name NumberH //@apireg:value:appoint bit-width:16 ; 16bit [47:32] //@apireg:desc abs-addr:0X8A58; 2级触发宽度配置，以事件计数所有触发的宽度设置共用一组寄存器，在软件配置。,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data2_set_2 //@apireg:0xaddr 0X8800 | (((0X96&0XFF) << 2) | ((0X96&0X100) << 6)) 9'H096 : pro_read_wreg_data <= trig_2nd_configure_data2_set_2[15:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA2_SET_0 //@apireg:software:name NumberL //@apireg:value:appoint bit-width:16 ; 16bit [15：0] //@apireg:desc abs-addr:0X8A5C; 2级触发宽度配置，以事件计数所有触发的宽度设置共用一组寄存器，在软件配置。,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data2_set_0 //@apireg:0xaddr 0X8800 | (((0X97&0XFF) << 2) | ((0X97&0X100) << 6)) 9'H097 : pro_read_wreg_data <= trig_2nd_configure_data2_set_0[15:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA2_SET_1 //@apireg:software:name NumberM //@apireg:value:appoint bit-width:16 ; 16bit [31：16] //@apireg:desc abs-addr:0X8A60; 2级触发宽度配置，以事件计数所有触发的宽度设置共用一组寄存器，在软件配置。,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data2_set_1 //@apireg:0xaddr 0X8800 | (((0X98&0XFF) << 2) | ((0X98&0X100) << 6)) 9'H098 : pro_read_wreg_data <= trig_2nd_configure_data2_set_1[15:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA1_SET_2 //@apireg:software:name WidthH //@apireg:value:appoint bit-width:16 ; 16bits 2:[15：0] //@apireg:desc abs-addr:0X8A64; 2级触发宽度配置，以时间计数，所有触发的宽度设置共用一组寄存器，在软件配置。持续时间根据插值抽取后的倍数决定,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data1_set_2 //@apireg:0xaddr 0X8800 | (((0X99&0XFF) << 2) | ((0X99&0X100) << 6)) 9'H099 : pro_read_wreg_data <= trig_2nd_configure_data1_set_2[15:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA1_SET_0 //@apireg:software:name WidthL //@apireg:value:appoint bit-width:16 ; 16bits 0：[15:0]， //@apireg:desc abs-addr:0X8A68; 2级触发宽度配置，所有触发的宽度设置共用一组寄存器，在软件配置。持续时间根据插值抽取后的倍数决定,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data1_set_0 //@apireg:0xaddr 0X8800 | (((0X9A&0XFF) << 2) | ((0X9A&0X100) << 6)) 9'H09A : pro_read_wreg_data <= trig_2nd_configure_data1_set_0[15:0]; //@apireg:group:title WidthSet //@apireg:title TRIG_2ND_CONFIGURE_DATA1_SET_1 //@apireg:software:name WidthM //@apireg:value:appoint bit-width:16 ; 16bits 1：[31:16] //@apireg:desc abs-addr:0X8A6C; 2级触发宽度配置，以时间计数。所有触发的宽度设置共用一组寄存器，在软件配置。持续时间根据插值抽取后的倍数决定,,,, //@apireg:note reg_hw_name:trig_2nd_configure_data1_set_1 //@apireg:0xaddr 0X8800 | (((0X9B&0XFF) << 2) | ((0X9B&0X100) << 6)) 9'H09B : pro_read_wreg_data <= trig_2nd_configure_data1_set_1[15:0]; //@apireg:group:title Window //@apireg:title TRIG_2ND_TRIG_WINDOW_FUNC_SEL //@apireg:software:name setting_2nd //@apireg:value:appoint bit-width:3 ; trig_2nd_trig_window_func_sel[2]=0表示外部触发。 ; trig_2nd_trig_window_func_sel[2]=1表示内部触发。 ; trig_2nd_trig_window_func_sel[1:0]: ; 2’b00:大于； ; 2’b01:小于； ; 2’b10:等于； ; 2’b11:进入； //@apireg:desc abs-addr:0XC808; 二级窗口触发功能选择,,,, //@apireg:note reg_hw_name:trig_2nd_trig_window_func_sel //@apireg:0xaddr 0X8800 | (((0X102&0XFF) << 2) | ((0X102&0X100) << 6)) 9'H102 : pro_read_wreg_data <= {{13{1'B0}},trig_2nd_trig_window_func_sel[2:0]}; //@apireg:group:title Window //@apireg:title WINDOW_WIDTH_L //@apireg:software:name width_L_2nd //@apireg:value:appoint bit-width:16 ; 设置脉宽比较值低16位 //@apireg:desc abs-addr:0XC80C; none //@apireg:note reg_hw_name:window_width_l //@apireg:0xaddr 0X8800 | (((0X103&0XFF) << 2) | ((0X103&0X100) << 6)) 9'H103 : pro_read_wreg_data <= window_width_l[15:0] ; //@apireg:group:title Window //@apireg:title WINDOW_WIDTH_H //@apireg:software:name width_H_2nd //@apireg:value:appoint bit-width:16 ; 设置脉宽比较值高16位 //@apireg:desc abs-addr:0XC810; none //@apireg:note reg_hw_name:window_width_h //@apireg:0xaddr 0X8800 | (((0X104&0XFF) << 2) | ((0X104&0X100) << 6)) 9'H104 : pro_read_wreg_data <= window_width_h[15:0] ; //@apireg:group:title TriggerSync //@apireg:title TRIGGER_SYNC_SIGNAL_SWITCH_PRO //@apireg:software:name SignalSwitch //@apireg:value:appoint bit-width:1 ; 数据切换信号，0：扫窗测试信号，1：fifo读写使能信号 //@apireg:desc abs-addr:0X8A70; none //@apireg:note reg_hw_name:trigger_sync_signal_switch_pro //@apireg:0xaddr 0X8800 | (((0X9C&0XFF) << 2) | ((0X9C&0X100) << 6)) 9'H09C : pro_read_wreg_data <= {{15{1'B0}},trigger_sync_signal_switch_pro[0:0]}; //@apireg:group:title TriggerSync //@apireg:title TRIGGER_SYNC_START_SEARCH_PRO //@apireg:software:name StartSearch //@apireg:value:appoint bit-width:1 ; 扫窗开始信号，上升沿有效 //@apireg:desc abs-addr:0X8A74; none //@apireg:note reg_hw_name:trigger_sync_start_search_pro //@apireg:0xaddr 0X8800 | (((0X9D&0XFF) << 2) | ((0X9D&0X100) << 6)) 9'H09D : pro_read_wreg_data <= {{15{1'B0}},trigger_sync_start_search_pro[0:0]}; //@apireg:group:title dbi //@apireg:title DBI_PRO_AUTO_TRIG_NUM //@apireg:software:name DBI_DBIPROAUTOTRIGNUM //@apireg:value:appoint bit-width:16 ; dbi触发丢点数设置 //@apireg:desc abs-addr:0X8B2C; none //@apireg:note reg_hw_name:dbi_pro_auto_trig_num //@apireg:0xaddr 0X8800 | (((0XCB&0XFF) << 2) | ((0XCB&0X100) << 6)) 9'H0CB : pro_read_wreg_data <= dbi_pro_auto_trig_num[15:0]; //@apireg:group:title dbi //@apireg:title TRIG_2ND_PRETRIG_DEPTH_INTERP //@apireg:software:name DBI_TRIG2NDPRETRIGDEPTHINTERP //@apireg:value:appoint bit-width:16 ; dbi二级触发深度设置 //@apireg:desc abs-addr:0X8B30; none //@apireg:note reg_hw_name:trig_2nd_pretrig_depth_interp //@apireg:0xaddr 0X8800 | (((0XCC&0XFF) << 2) | ((0XCC&0X100) << 6)) 9'H0CC : pro_read_wreg_data <= trig_2nd_pretrig_depth_interp[15:0]; //@apireg:group:title dbi //@apireg:title PRO_FIFO_DEPTH_DBI_IN //@apireg:software:name DBI_pro_fifo_depth_in //@apireg:value:appoint bit-width:14 ; dbi前级fifo深度设置 //@apireg:desc abs-addr:0X8B34; none //@apireg:note reg_hw_name:pro_fifo_depth_dbi_in //@apireg:0xaddr 0X8800 | (((0XCD&0XFF) << 2) | ((0XCD&0X100) << 6)) 9'H0CD : pro_read_wreg_data <= {{2{1'B0}},pro_fifo_depth_dbi_in[13:0]}; //@apireg:group:title dbi //@apireg:title IIR_BADPOINT_SET //@apireg:software:name iir_badpoint_set //@apireg:value:appoint bit-width:16 ; iir坏点设置 //@apireg:desc abs-addr:0X8B44; none //@apireg:note reg_hw_name:iir_badpoint_set //@apireg:0xaddr 0X8800 | (((0XD1&0XFF) << 2) | ((0XD1&0X100) << 6)) 9'H0D1 : pro_read_wreg_data <= iir_badpoint_set[15:0] ; //@apireg:group:title dbi //@apireg:title DBI_CH_OFFSET_ADJUST_CH12 //@apireg:software:name dbi_ch_offset_adjust_ch12 //@apireg:value:appoint bit-width:16 ; 16g+5g模式两个通道间偏移调整 //@apireg:desc abs-addr:0XC96C; none //@apireg:note reg_hw_name:dbi_ch_offset_adjust_ch12 //@apireg:0xaddr 0X8800 | (((0X15B&0XFF) << 2) | ((0X15B&0X100) << 6)) 9'H15B : pro_read_wreg_data <= dbi_ch_offset_adjust_ch12[15:0]; //@apireg:group:title dbi //@apireg:title DBI_CH_OFFSET_ADJUST_CH34 //@apireg:software:name dbi_ch_offset_adjust_ch34 //@apireg:value:appoint bit-width:16 ; 16g+5g模式两个通道间偏移调整 //@apireg:desc abs-addr:0XC970; none //@apireg:note reg_hw_name:dbi_ch_offset_adjust_ch34 //@apireg:0xaddr 0X8800 | (((0X15C&0XFF) << 2) | ((0X15C&0X100) << 6)) 9'H15C : pro_read_wreg_data <= dbi_ch_offset_adjust_ch34[15:0]; //@apireg:group:title dbi //@apireg:title SEL_TRIG_OR_PRO_PROG_FULL //@apireg:software:name sel_trig_or_pro_prog_full //@apireg:value:appoint bit-width:1 ; 选择传递触发信号还是编程满信号 //@apireg:desc abs-addr:0XC978; none //@apireg:note reg_hw_name:sel_trig_or_pro_prog_full //@apireg:0xaddr 0X8800 | (((0X15E&0XFF) << 2) | ((0X15E&0X100) << 6)) 9'H15E : pro_read_wreg_data <= {{15{1'B0}},sel_trig_or_pro_prog_full[0:0]}; //@apireg:group:title debug //@apireg:title PRO_DEBUG_MODE //@apireg:software:name pro_debug_mode //@apireg:value:appoint bit-width:16 ; [0]：1 单采集板调试模式 0：正常模式 //@apireg:desc abs-addr:0X8B24; none //@apireg:note reg_hw_name:pro_debug_mode //@apireg:0xaddr 0X8800 | (((0XC9&0XFF) << 2) | ((0XC9&0X100) << 6)) 9'H0C9 : pro_read_wreg_data <= pro_debug_mode[15:0] ; //@apireg:group:title ext_10m //@apireg:title EXT_10M_SEL //@apireg:software:name ext_10m_sel //@apireg:value:appoint bit-width:16 ; [0]:为1表示选择外部10m //@apireg:desc abs-addr:0XC8AC; none //@apireg:note reg_hw_name:ext_10m_sel //@apireg:0xaddr 0X8800 | (((0X12B&0XFF) << 2) | ((0X12B&0X100) << 6)) 9'H12B : pro_read_wreg_data <= ext_10m_sel[15:0] ; //@apireg:group:title fifoCtrl //@apireg:title SYS_RESETPROACQ //@apireg:software:name FIFO_RST //@apireg:value:appoint bit-width:16 ; 采集板和处理板采集复位 //@apireg:desc abs-addr:0XC9DC; none //@apireg:note reg_hw_name:sys_resetproacq //@apireg:0xaddr 0X8800 | (((0X177&0XFF) << 2) | ((0X177&0X100) << 6)) 9'H177 : pro_read_wreg_data <= sys_resetproacq[15:0] ; //@apireg:group:title la //@apireg:title LA_TRIG_2ND_PRETRIG_DEPTH //@apireg:software:name la_trig_2nd_pretrig_depth //@apireg:value:appoint bit-width:16 ; la 二级触发预触发深度 //@apireg:desc abs-addr:0X8B28; none //@apireg:note reg_hw_name:la_trig_2nd_pretrig_depth //@apireg:0xaddr 0X8800 | (((0XCA&0XFF) << 2) | ((0XCA&0X100) << 6)) 9'H0CA : pro_read_wreg_data <= la_trig_2nd_pretrig_depth[15:0]; //@apireg:group:title reverse //@apireg:title PRO_REVERSE_WR_REG_0 //@apireg:software:name pro_reverse_wr_reg_0 //@apireg:value:appoint bit-width:16 ; 处理板备用写寄存器 //@apireg:desc abs-addr:0X8B1C; none //@apireg:note reg_hw_name:pro_reverse_wr_reg_0 //@apireg:0xaddr 0X8800 | (((0XC7&0XFF) << 2) | ((0XC7&0X100) << 6)) 9'H0C7 : pro_read_wreg_data <= pro_reverse_wr_reg_0[15:0]; //@apireg:group:title reverse //@apireg:title PRO_REVERSE_WR_REG_1 //@apireg:software:name pro_reverse_wr_reg_1 //@apireg:value:appoint bit-width:16 ; 处理板备用写寄存器 //@apireg:desc abs-addr:0X8B20; none //@apireg:note reg_hw_name:pro_reverse_wr_reg_1 //@apireg:0xaddr 0X8800 | (((0XC8&0XFF) << 2) | ((0XC8&0X100) << 6)) 9'H0C8 : pro_read_wreg_data <= pro_reverse_wr_reg_1[15:0]; //@apireg:group:title scan_sync //@apireg:title TRIG_LOCATION_SCAN_RST //@apireg:software:name trig_location_scan_rst //@apireg:value:appoint bit-width:1 ; 1复位，0释放 处理板往采集板发送触发位置tx端复位 //@apireg:desc abs-addr:0X8BC0; none //@apireg:note reg_hw_name:trig_location_scan_rst //@apireg:0xaddr 0X8800 | (((0XF0&0XFF) << 2) | ((0XF0&0X100) << 6)) 9'H0F0 : pro_read_wreg_data <= {{15{1'B0}},trig_location_scan_rst[0:0]}; //@apireg:group:title scan_sync //@apireg:title TRIG_LOCATION_SCAN_SWITCH_PRO //@apireg:software:name trig_location_scan_switch_pro //@apireg:value:appoint bit-width:1 ; 0：test mode 1-正常数据模式 处理板往采集板发送触发位置tx端模式 //@apireg:desc abs-addr:0X8BC4; none //@apireg:note reg_hw_name:trig_location_scan_switch_pro //@apireg:0xaddr 0X8800 | (((0XF1&0XFF) << 2) | ((0XF1&0X100) << 6)) 9'H0F1 : pro_read_wreg_data <= {{15{1'B0}},trig_location_scan_switch_pro[0:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ1 //@apireg:software:name setting_trig_locat_acq1 //@apireg:value:appoint bit-width:16 ; 处理板对采集板1发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0X8BC8; none //@apireg:note reg_hw_name:sync_trig_locat_acq1 //@apireg:0xaddr 0X8800 | (((0XF2&0XFF) << 2) | ((0XF2&0X100) << 6)) 9'H0F2 : pro_read_wreg_data <= sync_trig_locat_acq1[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ1 //@apireg:software:name sync_trig_locat_TAP_start_acq1 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0X8BCC; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq1 //@apireg:0xaddr 0X8800 | (((0XF3&0XFF) << 2) | ((0XF3&0X100) << 6)) 9'H0F3 : pro_read_wreg_data <= sync_trig_locat_tap_start_acq1[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ1 //@apireg:software:name sync_trig_locat_TAP_stop_acq1 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0X8BD0; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq1 //@apireg:0xaddr 0X8800 | (((0XF4&0XFF) << 2) | ((0XF4&0X100) << 6)) 9'H0F4 : pro_read_wreg_data <= sync_trig_locat_tap_stop_acq1[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ2 //@apireg:software:name setting_trig_locat_acq2 //@apireg:value:appoint bit-width:16 ; 处理板对采集板2发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0X8BD4; none //@apireg:note reg_hw_name:sync_trig_locat_acq2 //@apireg:0xaddr 0X8800 | (((0XF5&0XFF) << 2) | ((0XF5&0X100) << 6)) 9'H0F5 : pro_read_wreg_data <= sync_trig_locat_acq2[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ2 //@apireg:software:name sync_trig_locat_TAP_start_acq2 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0X8BD8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq2 //@apireg:0xaddr 0X8800 | (((0XF6&0XFF) << 2) | ((0XF6&0X100) << 6)) 9'H0F6 : pro_read_wreg_data <= sync_trig_locat_tap_start_acq2[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ2 //@apireg:software:name sync_trig_locat_TAP_stop_acq2 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0X8BDC; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq2 //@apireg:0xaddr 0X8800 | (((0XF7&0XFF) << 2) | ((0XF7&0X100) << 6)) 9'H0F7 : pro_read_wreg_data <= sync_trig_locat_tap_stop_acq2[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ3 //@apireg:software:name setting_trig_locat_acq3 //@apireg:value:appoint bit-width:16 ; 处理板对采集板3发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0X8BE0; none //@apireg:note reg_hw_name:sync_trig_locat_acq3 //@apireg:0xaddr 0X8800 | (((0XF8&0XFF) << 2) | ((0XF8&0X100) << 6)) 9'H0F8 : pro_read_wreg_data <= sync_trig_locat_acq3[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ3 //@apireg:software:name sync_trig_locat_TAP_start_acq3 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0X8BE4; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq3 //@apireg:0xaddr 0X8800 | (((0XF9&0XFF) << 2) | ((0XF9&0X100) << 6)) 9'H0F9 : pro_read_wreg_data <= sync_trig_locat_tap_start_acq3[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ3 //@apireg:software:name sync_trig_locat_TAP_stop_acq3 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0X8BE8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq3 //@apireg:0xaddr 0X8800 | (((0XFA&0XFF) << 2) | ((0XFA&0X100) << 6)) 9'H0FA : pro_read_wreg_data <= sync_trig_locat_tap_stop_acq3[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ4 //@apireg:software:name setting_trig_locat_acq4 //@apireg:value:appoint bit-width:16 ; 处理板对采集板4发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0X8BEC; none //@apireg:note reg_hw_name:sync_trig_locat_acq4 //@apireg:0xaddr 0X8800 | (((0XFB&0XFF) << 2) | ((0XFB&0X100) << 6)) 9'H0FB : pro_read_wreg_data <= sync_trig_locat_acq4[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ4 //@apireg:software:name sync_trig_locat_TAP_start_acq4 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0X8BF0; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq4 //@apireg:0xaddr 0X8800 | (((0XFC&0XFF) << 2) | ((0XFC&0X100) << 6)) 9'H0FC : pro_read_wreg_data <= sync_trig_locat_tap_start_acq4[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ4 //@apireg:software:name sync_trig_locat_TAP_stop_acq4 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0X8BF4; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq4 //@apireg:0xaddr 0X8800 | (((0XFD&0XFF) << 2) | ((0XFD&0X100) << 6)) 9'H0FD : pro_read_wreg_data <= sync_trig_locat_tap_stop_acq4[15:0]; //@apireg:group:title scan_sync //@apireg:title FIFO_CTRL_SCAN_RST //@apireg:software:name fifo_ctrl_scan_rst //@apireg:value:appoint bit-width:1 ; 1复位，0释放 处理板往采集板发送fifo_ctrl 信号 tx端复位 //@apireg:desc abs-addr:0X8BF8; none //@apireg:note reg_hw_name:fifo_ctrl_scan_rst //@apireg:0xaddr 0X8800 | (((0XFE&0XFF) << 2) | ((0XFE&0X100) << 6)) 9'H0FE : pro_read_wreg_data <= {{15{1'B0}},fifo_ctrl_scan_rst[0:0]}; //@apireg:group:title scan_sync //@apireg:title FIFO_CTRL_SCAN_SWITCH_PRO //@apireg:software:name fifo_ctrl_scan_switch_pro //@apireg:value:appoint bit-width:1 ; 0：test mode 1-正常数据模式 处理板往采集板发送fifo_ctrl信号 tx端切换 //@apireg:desc abs-addr:0X8BFC; none //@apireg:note reg_hw_name:fifo_ctrl_scan_switch_pro //@apireg:0xaddr 0X8800 | (((0XFF&0XFF) << 2) | ((0XFF&0X100) << 6)) 9'H0FF : pro_read_wreg_data <= {{15{1'B0}},fifo_ctrl_scan_switch_pro[0:0]}; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_ACQ1 //@apireg:software:name setting_trig_acq1 //@apireg:value:appoint bit-width:16 ; 处理板对采集板1发出的触发信号做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC814; none //@apireg:note reg_hw_name:sync_trig_acq1 //@apireg:0xaddr 0X8800 | (((0X105&0XFF) << 2) | ((0X105&0X100) << 6)) 9'H105 : pro_read_wreg_data <= sync_trig_acq1[15:0] ; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_START_ACQ1 //@apireg:software:name sync_trig_TAP_start_acq1 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC818; none //@apireg:note reg_hw_name:sync_trig_tap_start_acq1 //@apireg:0xaddr 0X8800 | (((0X106&0XFF) << 2) | ((0X106&0X100) << 6)) 9'H106 : pro_read_wreg_data <= sync_trig_tap_start_acq1[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_STOP_ACQ1 //@apireg:software:name sync_trig_TAP_stop_acq1 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC81C; none //@apireg:note reg_hw_name:sync_trig_tap_stop_acq1 //@apireg:0xaddr 0X8800 | (((0X107&0XFF) << 2) | ((0X107&0X100) << 6)) 9'H107 : pro_read_wreg_data <= sync_trig_tap_stop_acq1[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_ACQ2 //@apireg:software:name setting_trig_acq2 //@apireg:value:appoint bit-width:16 ; 处理板对采集板2发出的触发信号做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC820; none //@apireg:note reg_hw_name:sync_trig_acq2 //@apireg:0xaddr 0X8800 | (((0X108&0XFF) << 2) | ((0X108&0X100) << 6)) 9'H108 : pro_read_wreg_data <= sync_trig_acq2[15:0] ; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_START_ACQ2 //@apireg:software:name sync_trig_TAP_start_acq2 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC824; none //@apireg:note reg_hw_name:sync_trig_tap_start_acq2 //@apireg:0xaddr 0X8800 | (((0X109&0XFF) << 2) | ((0X109&0X100) << 6)) 9'H109 : pro_read_wreg_data <= sync_trig_tap_start_acq2[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_STOP_ACQ2 //@apireg:software:name sync_trig_TAP_stop_acq2 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC828; none //@apireg:note reg_hw_name:sync_trig_tap_stop_acq2 //@apireg:0xaddr 0X8800 | (((0X10A&0XFF) << 2) | ((0X10A&0X100) << 6)) 9'H10A : pro_read_wreg_data <= sync_trig_tap_stop_acq2[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_ACQ3 //@apireg:software:name setting_trig_acq3 //@apireg:value:appoint bit-width:16 ; 处理板对采集板3发出的触发信号做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC82C; none //@apireg:note reg_hw_name:sync_trig_acq3 //@apireg:0xaddr 0X8800 | (((0X10B&0XFF) << 2) | ((0X10B&0X100) << 6)) 9'H10B : pro_read_wreg_data <= sync_trig_acq3[15:0] ; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_START_ACQ3 //@apireg:software:name sync_trig_TAP_start_acq3 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC830; none //@apireg:note reg_hw_name:sync_trig_tap_start_acq3 //@apireg:0xaddr 0X8800 | (((0X10C&0XFF) << 2) | ((0X10C&0X100) << 6)) 9'H10C : pro_read_wreg_data <= sync_trig_tap_start_acq3[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_STOP_ACQ3 //@apireg:software:name sync_trig_TAP_stop_acq3 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC834; none //@apireg:note reg_hw_name:sync_trig_tap_stop_acq3 //@apireg:0xaddr 0X8800 | (((0X10D&0XFF) << 2) | ((0X10D&0X100) << 6)) 9'H10D : pro_read_wreg_data <= sync_trig_tap_stop_acq3[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_ACQ4 //@apireg:software:name setting_trig_acq4 //@apireg:value:appoint bit-width:16 ; 处理板对采集板4发出的触发信号做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC838; none //@apireg:note reg_hw_name:sync_trig_acq4 //@apireg:0xaddr 0X8800 | (((0X10E&0XFF) << 2) | ((0X10E&0X100) << 6)) 9'H10E : pro_read_wreg_data <= sync_trig_acq4[15:0] ; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_START_ACQ4 //@apireg:software:name sync_trig_TAP_start_acq4 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC83C; none //@apireg:note reg_hw_name:sync_trig_tap_start_acq4 //@apireg:0xaddr 0X8800 | (((0X10F&0XFF) << 2) | ((0X10F&0X100) << 6)) 9'H10F : pro_read_wreg_data <= sync_trig_tap_start_acq4[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_STOP_ACQ4 //@apireg:software:name sync_trig_TAP_stop_acq4 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC840; none //@apireg:note reg_hw_name:sync_trig_tap_stop_acq4 //@apireg:0xaddr 0X8800 | (((0X110&0XFF) << 2) | ((0X110&0X100) << 6)) 9'H110 : pro_read_wreg_data <= sync_trig_tap_stop_acq4[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ1 //@apireg:software:name tap_load_set_trig_acq1 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC88C; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq1 //@apireg:0xaddr 0X8800 | (((0X123&0XFF) << 2) | ((0X123&0X100) << 6)) 9'H123 : pro_read_wreg_data <= sync_trig_tap_load_set_acq1[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ2 //@apireg:software:name tap_load_set_trig_acq2 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC890; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq2 //@apireg:0xaddr 0X8800 | (((0X124&0XFF) << 2) | ((0X124&0X100) << 6)) 9'H124 : pro_read_wreg_data <= sync_trig_tap_load_set_acq2[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ3 //@apireg:software:name tap_load_set_trig_acq3 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC894; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq3 //@apireg:0xaddr 0X8800 | (((0X125&0XFF) << 2) | ((0X125&0X100) << 6)) 9'H125 : pro_read_wreg_data <= sync_trig_tap_load_set_acq3[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ4 //@apireg:software:name tap_load_set_trig_acq4 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC898; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq4 //@apireg:0xaddr 0X8800 | (((0X126&0XFF) << 2) | ((0X126&0X100) << 6)) 9'H126 : pro_read_wreg_data <= sync_trig_tap_load_set_acq4[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ1 //@apireg:software:name tap_load_set_trig_locat_acq1 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC89C; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq1 //@apireg:0xaddr 0X8800 | (((0X127&0XFF) << 2) | ((0X127&0X100) << 6)) 9'H127 : pro_read_wreg_data <= sync_trig_locat_tap_load_set_acq1[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ2 //@apireg:software:name tap_load_set_trig_locat_acq2 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8A0; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq2 //@apireg:0xaddr 0X8800 | (((0X128&0XFF) << 2) | ((0X128&0X100) << 6)) 9'H128 : pro_read_wreg_data <= sync_trig_locat_tap_load_set_acq2[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ3 //@apireg:software:name tap_load_set_trig_locat_acq3 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8A4; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq3 //@apireg:0xaddr 0X8800 | (((0X129&0XFF) << 2) | ((0X129&0X100) << 6)) 9'H129 : pro_read_wreg_data <= sync_trig_locat_tap_load_set_acq3[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ4 //@apireg:software:name tap_load_set_trig_locat_acq4 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8A8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq4 //@apireg:0xaddr 0X8800 | (((0X12A&0XFF) << 2) | ((0X12A&0X100) << 6)) 9'H12A : pro_read_wreg_data <= sync_trig_locat_tap_load_set_acq4[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ5 //@apireg:software:name tap_load_set_trig_acq5 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8C4; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq5 //@apireg:0xaddr 0X8800 | (((0X131&0XFF) << 2) | ((0X131&0X100) << 6)) 9'H131 : pro_read_wreg_data <= sync_trig_tap_load_set_acq5[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ6 //@apireg:software:name tap_load_set_trig_acq6 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8C8; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq6 //@apireg:0xaddr 0X8800 | (((0X132&0XFF) << 2) | ((0X132&0X100) << 6)) 9'H132 : pro_read_wreg_data <= sync_trig_tap_load_set_acq6[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ7 //@apireg:software:name tap_load_set_trig_acq7 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8CC; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq7 //@apireg:0xaddr 0X8800 | (((0X133&0XFF) << 2) | ((0X133&0X100) << 6)) 9'H133 : pro_read_wreg_data <= sync_trig_tap_load_set_acq7[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_TAP_LOAD_SET_ACQ8 //@apireg:software:name tap_load_set_trig_acq8 //@apireg:value:appoint bit-width:16 ; 处理板trig [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8D0; none //@apireg:note reg_hw_name:sync_trig_tap_load_set_acq8 //@apireg:0xaddr 0X8800 | (((0X134&0XFF) << 2) | ((0X134&0X100) << 6)) 9'H134 : pro_read_wreg_data <= sync_trig_tap_load_set_acq8[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ5 //@apireg:software:name tap_load_set_trig_locat_acq5 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8D4; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq5 //@apireg:0xaddr 0X8800 | (((0X135&0XFF) << 2) | ((0X135&0X100) << 6)) 9'H135 : pro_read_wreg_data <= sync_trig_locat_tap_load_set_acq5[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ6 //@apireg:software:name tap_load_set_trig_locat_acq6 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8D8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq6 //@apireg:0xaddr 0X8800 | (((0X136&0XFF) << 2) | ((0X136&0X100) << 6)) 9'H136 : pro_read_wreg_data <= sync_trig_locat_tap_load_set_acq6[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ7 //@apireg:software:name tap_load_set_trig_locat_acq7 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8DC; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq7 //@apireg:0xaddr 0X8800 | (((0X137&0XFF) << 2) | ((0X137&0X100) << 6)) 9'H137 : pro_read_wreg_data <= sync_trig_locat_tap_load_set_acq7[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_LOAD_SET_ACQ8 //@apireg:software:name tap_load_set_trig_locat_acq8 //@apireg:value:appoint bit-width:16 ; 处理板trig location [13:12]为模式选择，设为1时切换到fix模式；[8:0]下发的固定的tap值 //@apireg:desc abs-addr:0XC8E0; none //@apireg:note reg_hw_name:sync_trig_locat_tap_load_set_acq8 //@apireg:0xaddr 0X8800 | (((0X138&0XFF) << 2) | ((0X138&0X100) << 6)) 9'H138 : pro_read_wreg_data <= sync_trig_locat_tap_load_set_acq8[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ5 //@apireg:software:name setting_trig_locat_acq5 //@apireg:value:appoint bit-width:16 ; 处理板对采集板5发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC8E4; none //@apireg:note reg_hw_name:sync_trig_locat_acq5 //@apireg:0xaddr 0X8800 | (((0X139&0XFF) << 2) | ((0X139&0X100) << 6)) 9'H139 : pro_read_wreg_data <= sync_trig_locat_acq5[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ5 //@apireg:software:name sync_trig_locat_TAP_start_acq5 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC8E8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq5 //@apireg:0xaddr 0X8800 | (((0X13A&0XFF) << 2) | ((0X13A&0X100) << 6)) 9'H13A : pro_read_wreg_data <= sync_trig_locat_tap_start_acq5[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ5 //@apireg:software:name sync_trig_locat_TAP_stop_acq5 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC8EC; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq5 //@apireg:0xaddr 0X8800 | (((0X13B&0XFF) << 2) | ((0X13B&0X100) << 6)) 9'H13B : pro_read_wreg_data <= sync_trig_locat_tap_stop_acq5[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ6 //@apireg:software:name setting_trig_locat_acq6 //@apireg:value:appoint bit-width:16 ; 处理板对采集板6发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC8F0; none //@apireg:note reg_hw_name:sync_trig_locat_acq6 //@apireg:0xaddr 0X8800 | (((0X13C&0XFF) << 2) | ((0X13C&0X100) << 6)) 9'H13C : pro_read_wreg_data <= sync_trig_locat_acq6[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ6 //@apireg:software:name sync_trig_locat_TAP_start_acq6 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC8F4; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq6 //@apireg:0xaddr 0X8800 | (((0X13D&0XFF) << 2) | ((0X13D&0X100) << 6)) 9'H13D : pro_read_wreg_data <= sync_trig_locat_tap_start_acq6[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ6 //@apireg:software:name sync_trig_locat_TAP_stop_acq6 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC8F8; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq6 //@apireg:0xaddr 0X8800 | (((0X13E&0XFF) << 2) | ((0X13E&0X100) << 6)) 9'H13E : pro_read_wreg_data <= sync_trig_locat_tap_stop_acq6[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ7 //@apireg:software:name setting_trig_locat_acq7 //@apireg:value:appoint bit-width:16 ; 处理板对采集板7发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC8FC; none //@apireg:note reg_hw_name:sync_trig_locat_acq7 //@apireg:0xaddr 0X8800 | (((0X13F&0XFF) << 2) | ((0X13F&0X100) << 6)) 9'H13F : pro_read_wreg_data <= sync_trig_locat_acq7[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ7 //@apireg:software:name sync_trig_locat_TAP_start_acq7 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC900; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq7 //@apireg:0xaddr 0X8800 | (((0X140&0XFF) << 2) | ((0X140&0X100) << 6)) 9'H140 : pro_read_wreg_data <= sync_trig_locat_tap_start_acq7[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ7 //@apireg:software:name sync_trig_locat_TAP_stop_acq7 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC904; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq7 //@apireg:0xaddr 0X8800 | (((0X141&0XFF) << 2) | ((0X141&0X100) << 6)) 9'H141 : pro_read_wreg_data <= sync_trig_locat_tap_stop_acq7[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_ACQ8 //@apireg:software:name setting_trig_locat_acq8 //@apireg:value:appoint bit-width:16 ; 处理板对采集板8发出的触发位置做扫窗同步控制 ; [3]start_search，开始扫窗，需要发0再发1 ; [2]signal switch，0-test mode， 1-正常数据模式，扫窗时设为0 ; [1]delay_ctrl_rst,1-复位，0-释放 ; [0]io_rst,1-复位，0-释放 , //@apireg:desc abs-addr:0XC908; none //@apireg:note reg_hw_name:sync_trig_locat_acq8 //@apireg:0xaddr 0X8800 | (((0X142&0XFF) << 2) | ((0X142&0X100) << 6)) 9'H142 : pro_read_wreg_data <= sync_trig_locat_acq8[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_START_ACQ8 //@apireg:software:name sync_trig_locat_TAP_start_acq8 //@apireg:value:appoint bit-width:16 ; 9位：扫窗起始值 //@apireg:desc abs-addr:0XC90C; none //@apireg:note reg_hw_name:sync_trig_locat_tap_start_acq8 //@apireg:0xaddr 0X8800 | (((0X143&0XFF) << 2) | ((0X143&0X100) << 6)) 9'H143 : pro_read_wreg_data <= sync_trig_locat_tap_start_acq8[15:0]; //@apireg:group:title scan_sync //@apireg:title SYNC_TRIG_LOCAT_TAP_STOP_ACQ8 //@apireg:software:name sync_trig_locat_TAP_stop_acq8 //@apireg:value:appoint bit-width:16 ; 9位：扫窗终止值 //@apireg:desc abs-addr:0XC910; none //@apireg:note reg_hw_name:sync_trig_locat_tap_stop_acq8 //@apireg:0xaddr 0X8800 | (((0X144&0XFF) << 2) | ((0X144&0X100) << 6)) 9'H144 : pro_read_wreg_data <= sync_trig_locat_tap_stop_acq8[15:0]; //@apireg:group:title scan_sync //@apireg:title DCM_RST_READBACK_TAP //@apireg:software:name DCM_RST_BACK //@apireg:value:appoint bit-width:16 ; 8bit回读比较序列，dcm_rst扫窗 //@apireg:desc abs-addr:0XC9AC; none //@apireg:note reg_hw_name:dcm_rst_readback_tap //@apireg:0xaddr 0X8800 | (((0X16B&0XFF) << 2) | ((0X16B&0X100) << 6)) 9'H16B : pro_read_wreg_data <= dcm_rst_readback_tap[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_PRO_EN //@apireg:software:name pc_search_pro_en //@apireg:value:appoint bit-width:1 ; 波形搜索使能 //@apireg:desc abs-addr:0XC8B0; none //@apireg:note reg_hw_name:pc_search_pro_en //@apireg:0xaddr 0X8800 | (((0X12C&0XFF) << 2) | ((0X12C&0X100) << 6)) 9'H12C : pro_read_wreg_data <= {{15{1'B0}},pc_search_pro_en[0:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_DATA_NUML16 //@apireg:software:name PC_search_data_numl16 //@apireg:value:appoint bit-width:16 ; 波形搜索单次最大搜索数据量低16位 //@apireg:desc abs-addr:0XC8B4; none //@apireg:note reg_hw_name:pc_search_data_numl16 //@apireg:0xaddr 0X8800 | (((0X12D&0XFF) << 2) | ((0X12D&0X100) << 6)) 9'H12D : pro_read_wreg_data <= pc_search_data_numl16[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_DATA_NUMH16 //@apireg:software:name PC_search_data_numh16 //@apireg:value:appoint bit-width:16 ; 波形搜索单次最大搜索数据量高16位 //@apireg:desc abs-addr:0XC8B8; none //@apireg:note reg_hw_name:pc_search_data_numh16 //@apireg:0xaddr 0X8800 | (((0X12E&0XFF) << 2) | ((0X12E&0X100) << 6)) 9'H12E : pro_read_wreg_data <= pc_search_data_numh16[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_POINT_NUM //@apireg:software:name PC_search_point_num //@apireg:value:appoint bit-width:16 ; 波形搜索单次最大搜索特征点数量 //@apireg:desc abs-addr:0XC8BC; none //@apireg:note reg_hw_name:pc_search_point_num //@apireg:0xaddr 0X8800 | (((0X12F&0XFF) << 2) | ((0X12F&0X100) << 6)) 9'H12F : pro_read_wreg_data <= pc_search_point_num[15:0]; //@apireg:group:title search //@apireg:title PC_READ_EN //@apireg:software:name PC_read_en //@apireg:value:appoint bit-width:1 ; 波形搜索存储fifo单次读使能 //@apireg:desc abs-addr:0XC8C0; none //@apireg:note reg_hw_name:pc_read_en //@apireg:0xaddr 0X8800 | (((0X130&0XFF) << 2) | ((0X130&0X100) << 6)) 9'H130 : pro_read_wreg_data <= {{15{1'B0}},pc_read_en[0:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_TYPE //@apireg:software:name pc_search_type //@apireg:value:appoint bit-width:11 ; 搜索类型选择[2:0]表示单双或la触发选择（0代表单通道二级触发） [6:3]代表单通道触发类型选择 [10:7]代表多通道触发类型选择 //@apireg:desc abs-addr:0XC914; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_type //@apireg:0xaddr 0X8800 | (((0X145&0XFF) << 2) | ((0X145&0X100) << 6)) 9'H145 : pro_read_wreg_data <= {{5{1'B0}},pc_search_type[10:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_SOURCE_SEL //@apireg:software:name pc_search_source_sel //@apireg:value:appoint bit-width:3 ; 搜索数据源选择 //@apireg:desc abs-addr:0XC918; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_source_sel //@apireg:0xaddr 0X8800 | (((0X146&0XFF) << 2) | ((0X146&0X100) << 6)) 9'H146 : pro_read_wreg_data <= {{13{1'B0}},pc_search_source_sel[2:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_EDGE_SEL //@apireg:software:name pc_search_edge_sel //@apireg:value:appoint bit-width:1 ; 边沿选择 1：上升沿 0：下降沿 //@apireg:desc abs-addr:0XC91C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_edge_sel //@apireg:0xaddr 0X8800 | (((0X147&0XFF) << 2) | ((0X147&0X100) << 6)) 9'H147 : pro_read_wreg_data <= {{15{1'B0}},pc_search_edge_sel[0:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_PW_SET //@apireg:software:name pc_search_pw_set //@apireg:value:appoint bit-width:4 ; 脉宽设置(高2位代表极性，低两位判定条件) //@apireg:desc abs-addr:0XC920; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_pw_set //@apireg:0xaddr 0X8800 | (((0X148&0XFF) << 2) | ((0X148&0X100) << 6)) 9'H148 : pro_read_wreg_data <= {{12{1'B0}},pc_search_pw_set[3:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_WINDOW_SET //@apireg:software:name pc_search_window_set //@apireg:value:appoint bit-width:3 ; 最高位判断极性，低两位判断搜索条件 //@apireg:desc abs-addr:0XC924; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_window_set //@apireg:0xaddr 0X8800 | (((0X149&0XFF) << 2) | ((0X149&0X100) << 6)) 9'H149 : pro_read_wreg_data <= {{13{1'B0}},pc_search_window_set[2:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_RUNT_SET //@apireg:software:name pc_search_runt_set //@apireg:value:appoint bit-width:3 ; 最高位判断极性，低两位判断搜索条件 //@apireg:desc abs-addr:0XC928; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_runt_set //@apireg:0xaddr 0X8800 | (((0X14A&0XFF) << 2) | ((0X14A&0X100) << 6)) 9'H14A : pro_read_wreg_data <= {{13{1'B0}},pc_search_runt_set[2:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_SLOPE_SET //@apireg:software:name pc_search_slope_set //@apireg:value:appoint bit-width:3 ; 最高位判断极性，低两位判断搜索条件 //@apireg:desc abs-addr:0XC92C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_slope_set //@apireg:0xaddr 0X8800 | (((0X14B&0XFF) << 2) | ((0X14B&0X100) << 6)) 9'H14B : pro_read_wreg_data <= {{13{1'B0}},pc_search_slope_set[2:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_TIMEOUT_SET //@apireg:software:name pc_search_timeout_set //@apireg:value:appoint bit-width:1 ; 超时极性判断 //@apireg:desc abs-addr:0XC930; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_timeout_set //@apireg:0xaddr 0X8800 | (((0X14C&0XFF) << 2) | ((0X14C&0X100) << 6)) 9'H14C : pro_read_wreg_data <= {{15{1'B0}},pc_search_timeout_set[0:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_DROPOUT_SET //@apireg:software:name pc_search_dropout_set //@apireg:value:appoint bit-width:1 ; 跌落极性判断 //@apireg:desc abs-addr:0XC934; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_dropout_set //@apireg:0xaddr 0X8800 | (((0X14D&0XFF) << 2) | ((0X14D&0X100) << 6)) 9'H14D : pro_read_wreg_data <= {{15{1'B0}},pc_search_dropout_set[0:0]}; //@apireg:group:title search //@apireg:title PC_SEAECH_CMP1_LEVEL_L //@apireg:software:name pc_seaech_cmp1_level_l //@apireg:value:appoint bit-width:12 ; 低电平组低电平 //@apireg:desc abs-addr:0XC938; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_seaech_cmp1_level_l //@apireg:0xaddr 0X8800 | (((0X14E&0XFF) << 2) | ((0X14E&0X100) << 6)) 9'H14E : pro_read_wreg_data <= {{4{1'B0}},pc_seaech_cmp1_level_l[11:0]}; //@apireg:group:title search //@apireg:title PC_SEAECH_CMP1_LEVEL_H //@apireg:software:name pc_seaech_cmp1_level_h //@apireg:value:appoint bit-width:12 ; 低电平组高电平 //@apireg:desc abs-addr:0XC93C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_seaech_cmp1_level_h //@apireg:0xaddr 0X8800 | (((0X14F&0XFF) << 2) | ((0X14F&0X100) << 6)) 9'H14F : pro_read_wreg_data <= {{4{1'B0}},pc_seaech_cmp1_level_h[11:0]}; //@apireg:group:title search //@apireg:title PC_SEAECH_CMP2_LEVEL_L //@apireg:software:name pc_seaech_cmp2_level_l //@apireg:value:appoint bit-width:12 ; 高电平组低电平 //@apireg:desc abs-addr:0XC940; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_seaech_cmp2_level_l //@apireg:0xaddr 0X8800 | (((0X150&0XFF) << 2) | ((0X150&0X100) << 6)) 9'H150 : pro_read_wreg_data <= {{4{1'B0}},pc_seaech_cmp2_level_l[11:0]}; //@apireg:group:title search //@apireg:title PC_SEAECH_CMP2_LEVEL_H //@apireg:software:name pc_seaech_cmp2_level_h //@apireg:value:appoint bit-width:12 ; 高电平组高电平 //@apireg:desc abs-addr:0XC944; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_seaech_cmp2_level_h //@apireg:0xaddr 0X8800 | (((0X151&0XFF) << 2) | ((0X151&0X100) << 6)) 9'H151 : pro_read_wreg_data <= {{4{1'B0}},pc_seaech_cmp2_level_h[11:0]}; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA1_SETL //@apireg:software:name pc_search_configure_data1_setL //@apireg:value:appoint bit-width:16 ; 低电平组对应脉冲宽度设置低16位 //@apireg:desc abs-addr:0XC948; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data1_setl //@apireg:0xaddr 0X8800 | (((0X152&0XFF) << 2) | ((0X152&0X100) << 6)) 9'H152 : pro_read_wreg_data <= pc_search_configure_data1_setl[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA1_SETM //@apireg:software:name pc_search_configure_data1_setM //@apireg:value:appoint bit-width:16 ; 低电平组对应脉冲宽度设置中16位 //@apireg:desc abs-addr:0XC94C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data1_setm //@apireg:0xaddr 0X8800 | (((0X153&0XFF) << 2) | ((0X153&0X100) << 6)) 9'H153 : pro_read_wreg_data <= pc_search_configure_data1_setm[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA1_SETH //@apireg:software:name pc_search_configure_data1_setH //@apireg:value:appoint bit-width:16 ; 低电平组对应脉冲宽度设置高16位 //@apireg:desc abs-addr:0XC950; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data1_seth //@apireg:0xaddr 0X8800 | (((0X154&0XFF) << 2) | ((0X154&0X100) << 6)) 9'H154 : pro_read_wreg_data <= pc_search_configure_data1_seth[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA2_SETL //@apireg:software:name pc_search_configure_data2_setL //@apireg:value:appoint bit-width:16 ; 高电平组对应脉冲宽度设置低16位 //@apireg:desc abs-addr:0XC954; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data2_setl //@apireg:0xaddr 0X8800 | (((0X155&0XFF) << 2) | ((0X155&0X100) << 6)) 9'H155 : pro_read_wreg_data <= pc_search_configure_data2_setl[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA2_SETM //@apireg:software:name pc_search_configure_data2_setM //@apireg:value:appoint bit-width:16 ; 高电平组对应脉冲宽度设置中16位 //@apireg:desc abs-addr:0XC958; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data2_setm //@apireg:0xaddr 0X8800 | (((0X156&0XFF) << 2) | ((0X156&0X100) << 6)) 9'H156 : pro_read_wreg_data <= pc_search_configure_data2_setm[15:0]; //@apireg:group:title search //@apireg:title PC_SEARCH_CONFIGURE_DATA2_SETH //@apireg:software:name pc_search_configure_data2_setH //@apireg:value:appoint bit-width:16 ; 高电平组对应脉冲宽度设置高16位 //@apireg:desc abs-addr:0XC95C; 版本信息，备注,,,, //@apireg:note reg_hw_name:pc_search_configure_data2_seth //@apireg:0xaddr 0X8800 | (((0X157&0XFF) << 2) | ((0X157&0X100) << 6)) 9'H157 : pro_read_wreg_data <= pc_search_configure_data2_seth[15:0]; //@apireg:group:title seg //@apireg:title PRO_DDR_RCD_RST_EN //@apireg:software:name pro_ddr_rcd_rst_en //@apireg:value:appoint bit-width:1 ; 处理板接收分段存储复位选择 //@apireg:desc abs-addr:0XC974; none //@apireg:note reg_hw_name:pro_ddr_rcd_rst_en //@apireg:0xaddr 0X8800 | (((0X15D&0XFF) << 2) | ((0X15D&0X100) << 6)) 9'H15D : pro_read_wreg_data <= {{15{1'B0}},pro_ddr_rcd_rst_en[0:0]}; //@apireg:group:title trig_exclude //@apireg:title TRIG_1ST_PRO_EXCLUDE_WIDTH1_L //@apireg:software:name pro_1st_exclude_width1_l //@apireg:value:appoint bit-width:16 ; 处理板一级排除触发下限 //@apireg:desc abs-addr:0XC86C; none //@apireg:note reg_hw_name:trig_1st_pro_exclude_width1_l //@apireg:0xaddr 0X8800 | (((0X11B&0XFF) << 2) | ((0X11B&0X100) << 6)) 9'H11B : pro_read_wreg_data <= trig_1st_pro_exclude_width1_l[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_1ST_PRO_EXCLUDE_WIDTH1_H //@apireg:software:name pro_1st_exclude_width1_h //@apireg:value:appoint bit-width:16 ; 处理板一级排除触发下限 //@apireg:desc abs-addr:0XC870; none //@apireg:note reg_hw_name:trig_1st_pro_exclude_width1_h //@apireg:0xaddr 0X8800 | (((0X11C&0XFF) << 2) | ((0X11C&0X100) << 6)) 9'H11C : pro_read_wreg_data <= trig_1st_pro_exclude_width1_h[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_1ST_PRO_EXCLUDE_WIDTH2_L //@apireg:software:name pro_1st_exclude_width2_l //@apireg:value:appoint bit-width:16 ; 处理板一级排除触发上限 //@apireg:desc abs-addr:0XC874; none //@apireg:note reg_hw_name:trig_1st_pro_exclude_width2_l //@apireg:0xaddr 0X8800 | (((0X11D&0XFF) << 2) | ((0X11D&0X100) << 6)) 9'H11D : pro_read_wreg_data <= trig_1st_pro_exclude_width2_l[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_1ST_PRO_EXCLUDE_WIDTH2_H //@apireg:software:name pro_1st_exclude_width2_h //@apireg:value:appoint bit-width:16 ; 处理板一级排除触发上限 //@apireg:desc abs-addr:0XC878; none //@apireg:note reg_hw_name:trig_1st_pro_exclude_width2_h //@apireg:0xaddr 0X8800 | (((0X11E&0XFF) << 2) | ((0X11E&0X100) << 6)) 9'H11E : pro_read_wreg_data <= trig_1st_pro_exclude_width2_h[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_2ND_PRO_EXCLUDE_WIDTH1_L //@apireg:software:name pro_2nd_exclude_width1_l //@apireg:value:appoint bit-width:16 ; 处理二级排除触发下限 //@apireg:desc abs-addr:0XC87C; none //@apireg:note reg_hw_name:trig_2nd_pro_exclude_width1_l //@apireg:0xaddr 0X8800 | (((0X11F&0XFF) << 2) | ((0X11F&0X100) << 6)) 9'H11F : pro_read_wreg_data <= trig_2nd_pro_exclude_width1_l[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_2ND_PRO_EXCLUDE_WIDTH1_H //@apireg:software:name pro_2nd__exclude_width1_h //@apireg:value:appoint bit-width:16 ; 处理二级排除触发下限 //@apireg:desc abs-addr:0XC880; none //@apireg:note reg_hw_name:trig_2nd_pro_exclude_width1_h //@apireg:0xaddr 0X8800 | (((0X120&0XFF) << 2) | ((0X120&0X100) << 6)) 9'H120 : pro_read_wreg_data <= trig_2nd_pro_exclude_width1_h[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_2ND_PRO_EXCLUDE_WIDTH2_L //@apireg:software:name pro_2nd__exclude_width2_l //@apireg:value:appoint bit-width:16 ; 处理二级排除触发上限 //@apireg:desc abs-addr:0XC884; none //@apireg:note reg_hw_name:trig_2nd_pro_exclude_width2_l //@apireg:0xaddr 0X8800 | (((0X121&0XFF) << 2) | ((0X121&0X100) << 6)) 9'H121 : pro_read_wreg_data <= trig_2nd_pro_exclude_width2_l[15:0]; //@apireg:group:title trig_exclude //@apireg:title TRIG_2ND_PRO_EXCLUDE_WIDTH2_H //@apireg:software:name pro_2nd__exclude_width2_h //@apireg:value:appoint bit-width:16 ; 处理二级排除触发上限 //@apireg:desc abs-addr:0XC888; none //@apireg:note reg_hw_name:trig_2nd_pro_exclude_width2_h //@apireg:0xaddr 0X8800 | (((0X122&0XFF) << 2) | ((0X122&0X100) << 6)) 9'H122 : pro_read_wreg_data <= trig_2nd_pro_exclude_width2_h[15:0]; default: begin pro_read_wreg_data[15:0] <=16'h0000; end endcase end endmodule //@generatedtime : 2022-11-09 17:00:53